74AHC1G08GW-G [NXP]

2-input AND gate; 2输入与门
74AHC1G08GW-G
型号: 74AHC1G08GW-G
厂家: NXP    NXP
描述:

2-input AND gate
2输入与门

栅极 逻辑集成电路 光电二极管
文件: 总6页 (文件大小:63K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
74AHC1G08; 74AHCT1G08  
2-input AND gate  
Product data sheet  
1. General description  
74AHC1G08 and 74AHCT1G08 are high-speed Si-gate CMOS devices. They provide a  
2-input AND function.  
The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V.  
The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V.  
2. Features  
I Symmetrical output impedance  
I High noise immunity  
I Low power dissipation  
I Balanced propagation delays  
I SOT353-1 and SOT753 package options  
I ESD protection:  
N HBM JESD22-A114E: exceeds 2000 V  
N MM JESD22-A115-A: exceeds 200 V  
N CDM JESD22-C101C: exceeds 1000 V  
I Specified from 40 °C to +125 °C  
3. Ordering information  
Table 1.  
Ordering information  
Type number  
Package  
Temperature range  
40 °C to +125 °C  
Name  
Description  
Version  
74AHC1G08GW  
74AHCT1G08GW  
74AHC1G08GV  
74AHCT1G08GV  
TSSOP5  
plastic thin shrink small outline package;  
5 leads; body width 1.25 mm  
SOT353-1  
40 °C to +125 °C  
SC-74A  
plastic surface-mounted package; 5 leads  
SOT753  
74AHC1G08; 74AHCT1G08  
NXP Semiconductors  
2-input AND gate  
7. Functional description  
Table 4.  
Function table  
H = HIGH voltage level; L = LOW voltage level  
Inputs  
Output  
A
L
B
L
Y
L
L
L
H
L
H
L
H
H
H
8. Limiting values  
Table 5.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol  
VCC  
VI  
Parameter  
Conditions  
Min  
0.5  
0.5  
20  
-
Max  
+7.0  
+7.0  
-
Unit  
V
supply voltage  
input voltage  
V
IIK  
input clamping current  
output clamping current  
output current  
VI < 0.5 V  
mA  
mA  
mA  
mA  
mA  
°C  
[1]  
IOK  
VO < 0.5 V or VO > VCC + 0.5 V  
0.5 V < VO < VCC + 0.5 V  
±20  
±25  
75  
IO  
-
ICC  
supply current  
-
IGND  
Tstg  
Ptot  
ground current  
75  
65  
-
-
storage temperature  
total power dissipation  
+150  
250  
[2]  
Tamb = 40 °C to +125 °C  
mW  
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
[2] For both TSSOP5 and SC-74A packages: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K.  
9. Recommended operating conditions  
Table 6.  
Recommended operating conditions  
Voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
74AHC1G08  
74AHCT1G08  
Unit  
Min  
2.0  
0
Typ  
Max  
5.5  
Min  
4.5  
0
Typ  
Max  
VCC  
VI  
supply voltage  
input voltage  
5.0  
5.0  
5.5  
5.5  
V
V
V
-
5.5  
-
VO  
output voltage  
ambient temperature  
0
-
VCC  
+125  
100  
20  
0
-
VCC  
Tamb  
t/V  
40  
-
+25  
40  
-
+25  
+125 °C  
input transition rise  
and fall rate  
VCC = 3.3 V ± 0.3 V  
VCC = 5.0 V ± 0.5 V  
-
-
-
-
-
ns/V  
ns/V  
-
-
20  
74AHC_AHCT1G08_6  
© NXP B.V. 2007. All rights reserved.  
Product data sheet  
3 of 11  
74AHC1G08; 74AHCT1G08  
NXP Semiconductors  
2-input AND gate  
10. Static characteristics  
Table 7.  
Static characteristics  
Voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
25 °C  
40 °C to +85 °C 40 °C to +125 °C Unit  
Min Typ Max  
Min  
Max  
Min  
Max  
For type 74AHC1G08  
VIH  
HIGH-level  
input voltage  
VCC = 2.0 V  
1.5  
-
-
-
-
-
-
-
-
1.5  
-
-
1.5  
-
-
V
V
V
V
V
V
VCC = 3.0 V  
2.1  
2.1  
2.1  
VCC = 5.5 V  
3.85  
-
3.85  
-
3.85  
-
VIL  
LOW-level  
input voltage  
VCC = 2.0 V  
-
-
-
0.5  
0.9  
1.65  
-
-
-
0.5  
0.9  
1.65  
-
-
-
0.5  
0.9  
1.65  
VCC = 3.0 V  
VCC = 5.5 V  
VOH  
HIGH-level  
VI = VIH or VIL  
output voltage  
IO = 50 µA; VCC = 2.0 V  
IO = 50 µA; VCC = 3.0 V  
IO = 50 µA; VCC = 4.5 V  
IO = 4.0 mA; VCC = 3.0 V  
IO = 8.0 mA; VCC = 4.5 V  
VI = VIH or VIL  
1.9  
2.9  
2.0  
3.0  
4.5  
-
-
-
-
-
-
1.9  
2.9  
-
-
-
-
-
1.9  
2.9  
-
-
-
-
-
V
V
V
V
V
4.4  
4.4  
4.4  
2.58  
3.94  
2.48  
3.8  
2.40  
3.70  
-
VOL  
LOW-level  
output voltage  
IO = 50 µA; VCC = 2.0 V  
IO = 50 µA; VCC = 3.0 V  
IO = 50 µA; VCC = 4.5 V  
IO = 4.0 mA; VCC = 3.0 V  
IO = 8.0 mA; VCC = 4.5 V  
-
-
-
-
-
-
0
0
0
-
0.1  
0.1  
-
-
-
-
-
-
0.1  
0.1  
-
-
-
-
-
-
0.1  
0.1  
V
V
0.1  
0.1  
0.1  
V
0.36  
0.36  
0.1  
0.44  
0.44  
1.0  
0.55  
0.55  
2.0  
V
-
V
II  
input leakage VI = 5.5 V or GND;  
current CC = 0 V to 5.5 V  
-
µA  
V
ICC  
CI  
supply current VI = VCC or GND; IO = 0 A;  
CC = 5.5 V  
-
-
-
1.0  
10  
-
-
10  
10  
-
-
40  
10  
µA  
V
input  
1.5  
pF  
capacitance  
For type 74AHCT1G08  
VIH  
HIGH-level  
input voltage  
VCC = 4.5 V to 5.5 V  
VCC = 4.5 V to 5.5 V  
2.0  
-
-
-
-
2.0  
-
-
2.0  
-
-
V
V
VIL  
LOW-level  
0.8  
0.8  
0.8  
input voltage  
VOH  
HIGH-level  
output voltage  
VI = VIH or VIL; VCC = 4.5 V  
IO = 50 µA  
4.4  
4.5  
-
-
-
4.4  
3.8  
-
-
4.4  
-
-
V
V
IO = 8.0 mA  
3.94  
3.70  
VOL  
LOW-level  
output voltage  
VI = VIH or VIL; VCC = 4.5 V  
IO = 50 µA  
-
-
-
0
-
0.1  
0.36  
0.1  
-
-
-
0.1  
0.44  
1.0  
-
-
-
0.1  
0.55  
2.0  
V
IO = 8.0 mA  
V
II  
input leakage VI = 5.5 V or GND;  
current CC = 0 V to 5.5 V  
-
µA  
V
74AHC_AHCT1G08_6  
© NXP B.V. 2007. All rights reserved.  
Product data sheet  
4 of 11  
74AHC1G08; 74AHCT1G08  
NXP Semiconductors  
2-input AND gate  
Table 7.  
Static characteristics …continued  
Voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
25 °C  
40 °C to +85 °C 40 °C to +125 °C Unit  
Min Typ Max  
Min  
Max  
Min  
Max  
ICC  
supply current VI = VCC or GND; IO = 0 A;  
CC = 5.5 V  
-
-
1.0  
-
10  
-
40  
µA  
V
ICC  
additional  
per input pin; VI = 3.4 V;  
-
-
1.35  
-
-
1.5  
10  
-
-
1.5  
10  
mA  
supply current other inputs at VCC or GND;  
IO = 0 A; VCC = 5.5 V  
CI  
input  
-
1.5  
10  
pF  
capacitance  
11. Dynamic characteristics  
Table 8.  
Dynamic characteristics  
GND = 0 V; tr = tf = 3.0 ns. For test circuit see Figure 6.  
Symbol Parameter  
Conditions  
25 °C  
40 °C to +85 °C 40 °C to +125 °C Unit  
Min Typ Max  
Min  
Max  
Min  
Max  
For type 74AHC1G08  
[1]  
[2]  
tpd  
propagation  
delay  
A and B to Y;  
see Figure 5  
VCC = 3.0 V to 3.6 V  
CL = 15 pF  
-
-
4.6  
8.8  
1.0  
1.0  
10.5  
14.0  
1.0  
1.0  
12.0  
16.0  
ns  
ns  
CL = 50 pF  
6.5 12.3  
[3]  
[4]  
VCC = 4.5 V to 5.5 V  
CL = 15 pF  
-
-
-
3.2  
4.6  
17  
5.9  
7.9  
-
1.0  
1.0  
-
7.0  
9.0  
-
1.0  
1.0  
-
8.0  
10.5  
-
ns  
ns  
pF  
CL = 50 pF  
CPD  
power  
per buffer;  
dissipation  
capacitance  
CL = 50 pF; f = 1 MHz;  
VI = GND to VCC  
For type 74AHCT1G08  
[1]  
[3]  
tpd  
propagation  
delay  
A and B to Y;  
see Figure 5  
VCC = 4.5 V to 5.5 V  
CL = 15 pF  
-
-
-
3.6  
5.1  
19  
6.2  
7.9  
-
1.0  
1.0  
-
7.1  
9.0  
-
1.0  
1.0  
-
8.0  
10.5  
-
ns  
ns  
pF  
CL = 50 pF  
[4]  
CPD  
power  
per buffer;  
dissipation  
capacitance  
CL = 50 pF; f = 1 MHz;  
VI = GND to VCC  
[1] tpd is the same as tPLH and tPHL  
.
[2] Typical values are measured at VCC = 3.3 V.  
[3] Typical values are measured at VCC = 5.0 V.  
[4] CPD is used to determine the dynamic power dissipation PD (µW).  
PD = CPD × VCC2 × fi + (CL × VCC2 × fo) where:  
fi = input frequency in MHz; fo = output frequency in MHz;  
CL = output load capacitance in pF;  
VCC = supply voltage in Volts  
74AHC_AHCT1G08_6  
© NXP B.V. 2007. All rights reserved.  
Product data sheet  
5 of 11  
74AHC1G08; 74AHCT1G08  
NXP Semiconductors  
2-input AND gate  
13. Package outline  
TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm  
SOT353-1  
D
E
A
X
c
y
H
v
M
A
E
Z
5
4
A
2
A
(A )  
3
A
1
θ
L
L
p
1
3
e
w M  
b
p
detail X  
e
1
0
1.5  
3 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
(1)  
(1)  
(1)  
A
A
A
b
c
D
E
e
e
1
H
L
L
p
UNIT  
v
w
y
Z
θ
1
2
3
p
E
max.  
0.1  
0
1.0  
0.8  
0.30  
0.15  
0.25  
0.08  
2.25  
1.85  
1.35  
1.15  
2.25  
2.0  
0.46  
0.21  
0.60  
0.15  
7°  
0°  
mm  
1.1  
0.65  
1.3  
0.15  
0.425  
0.3  
0.1  
0.1  
Note  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
VERSION  
PROJECTION  
IEC  
JEDEC  
JEITA  
SOT353-1  
MO-203  
SC-88A  
Fig 7. Package outline SOT353-1 (TSSOP5)  
74AHC_AHCT1G08_6  
© NXP B.V. 2007. All rights reserved.  
Product data sheet  
7 of 11  
74AHC1G08; 74AHCT1G08  
NXP Semiconductors  
2-input AND gate  
Plastic surface-mounted package; 5 leads  
SOT753  
D
B
E
A
X
y
H
v
M
A
E
5
4
Q
A
A
1
c
L
p
1
2
3
detail X  
e
b
p
w
M B  
0
1
2 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
UNIT  
A
A
b
c
D
E
e
H
L
Q
v
w
y
p
1
p
E
0.100  
0.013  
0.40  
0.25  
1.1  
0.9  
0.26  
0.10  
3.1  
2.7  
1.7  
1.3  
3.0  
2.5  
0.6  
0.2  
0.33  
0.23  
mm  
0.95  
0.2  
0.2  
0.1  
REFERENCES  
JEDEC JEITA  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
IEC  
SOT753  
SC-74A  
Fig 8. Package outline SOT753 (SC-74A)  
74AHC_AHCT1G08_6  
© NXP B.V. 2007. All rights reserved.  
Product data sheet  
8 of 11  

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