W567C100 [NUVOTON]
16-CHANNEL SPEECHMELODY PROCESSOR;型号: | W567C100 |
厂家: | NUVOTON |
描述: | 16-CHANNEL SPEECHMELODY PROCESSOR |
文件: | 总13页 (文件大小:710K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
W567CXXX DATASHEET
16-CHANNEL SPEECH+MELODY PROCESSOR
(BandDirectorTM Series)
Table of Contents-
1.
2.
3.
4.
5.
6.
GENERAL DESCRIPTION.............................................................................................................2
FEATURES ....................................................................................................................................3
PIN DESCRIPTION........................................................................................................................4
BLOCK DIAGRAM .........................................................................................................................5
ITEM VS PIN TABLE......................................................................................................................6
ELECTRICAL CHARACTERISTICS..............................................................................................7
6.1 Absolute Maximum Ratings..................................................................................................7
6.2 DC Characteristics................................................................................................................7
6.3 AC Characteristics ................................................................................................................8
7.
8.
TYPICAL APPLICATION CIRCUIT................................................................................................9
REVISION HISTORY ...................................................................................................................12
Publication Release Date: Sep. 2012
- 1 -
Revision A12
W567CXXX
1. GENERAL DESCRIPTION
The W567Cxxx is a powerful microcontroller (uC) dedicated to speech and melody synthesis
applications. With the help of the embedded 8-bit microprocessor & dedicated H/W, the W567Cxxx
can synthesize 16-channel speech+melody simultaneously.
The two channels of synthesized speech can be in different kinds of format, for example ADPCM
and MDPCM. The W567Cxxx can provide 16-channel high-quality WinMelodyTM , which can emulate
the characteristics of musical instruments, such as piano and violin. The output of speech/melody
channels are mixed together through the on-chip digital mixer to produce colorful effects. With these
hardware resources, the W567Cxxx is very suitable for high-quality and sophisticated scenario
applications.
The W567Cxxx provides at most 24 bi-directional I/Os, maximum 512 bytes RAM, IR carrier,
Serial Interface Management, and 32KHz-Divider for more and more sophisticated applications, such
as interactive toys, cartridge toys and final count down function. 3 LED output pins with 256-level
control means that numerous combination of RGB colors may result in a versatility of colorful effects.
In addition, W567Cxxx also provides PWM mode output to save power during playback and Watch
Dog Timer to prevent latch-up situation occurring.
The W567Cxxx family contains several items with different playback duration as shown below.
Item
*Duration
Item
W567C070
81 sec.
W567C080
102 sec.
W567C100
115 sec.
W567C120
127 sec.
W567C151
162 sec.
W567C171
196 sec.
W567C210
230 sec.
W567C260
263 sec.
W567C300
320 sec.
W567C340
358 sec.
W567C380
400 sec.
Duration
Item
W567C126
127 sec.
W567C266
263 sec.
W567C306
320 sec.
W567C346
358 sec.
W567C386
400 sec.
Duration
Note:
*: The duration time is based on 5-bit MDPCM at 6 KHz sampling rate. The firmware library and timber library have been
excluded from user’s ROM space for the duration estimation.
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W567CXXX
2. FEATURES
Wide range of operating voltage:
8 MHz @ 3.0 volt ~ 5.5 volt
6 MHz @ 2.4 volt ~ 5.5 volt
Power management:
4 ~ 8 MHz system clocks, with Ring type or crystal type.
Stop mode for stopping all IC operations
Provides up to 24 I/O pins
F/W speech synthesis:
Multiple format parser that supports
New 4-bit MDPCM(NM4), 5-bit MDPCM(MDM), 4-bit MDPCM(MD4), 4-bit
ADPCM(APM), 8-bit Log PCM(LP8) algorithm can be used
Pitch shippable ADPCM for voice changer application
Programmable sample rate
Melody synthesis:
16 melody channels that can emulate characteristics of musical instruments
Multi-MIDI simultaneous
Multi-MIDI channels dynamic control
More MIDI events are supported for colorful melody playback
Built-in IR carrier generation circuit for simplifying firmware IR application
Built-in TimerG0 for general purpose applications
Harmonized synchronization among MIDI, Speech, LED, and Motor
Build-in 3 LED outputs with 256-level control of brightness.
Built-in Watch-Dog Timer (WDT) and Low Voltage Reset (LVR)
Built-in 32KHz crystal oscillator with divider for time-keeping application
Provide serial interface to access the external memory
W55Fxx, W551Cxx
SPI flash
Dynamic control of the Pan assignment to the dual speaker output for stereo effects in the parts of
W567Cxx6
Stereophonic current type digital-to-analog converters (DAC) with 13-bit resolution to drive speaker
output
Stereophonic direct-drive 12-bit PWM output to save power consumption
Support PowerScriptTM for developing codes in easy way
Full-fledged development system
Source-level ICE debugger (Assembly & PowerScriptTM format)
Ultra I/OTM tool for event synchronization mechanism
ICE system with USB port
User-friendly GUI environment
Available package form:
COB is essential
- 3 -
W567CXXX
3. PIN DESCRIPTION
PIN NAME
/RESET
I/O
FUNCTION
I
I
IC reset input, low active.
OSCIN
Main-clock oscillation input. When Ring type is used, connects Rosc
between OSCIN and VSS to generate the system clock frequency.
Reserved one 100pF~200pF capacity to Vdd from OSCin pin to make
Ring frequency stability
When use X’tal, it is X’tal IN.
OSCOUT
X32I
O
I
Main-clock oscillation output only for X’tal.
32 KHz crystal oscillator with divider for time-keeping application
32 KHz crystal oscillator with divider for time-keeping application
X32O
Out
General input/output pins. When used as output pin, it can be open–drain
or CMOS type and it can sink 25mA for high-current applications. When
used as input pin, there may have a pull-high option and generate
interrupt request to release IC from STOP mode.
BP00~BP07
I/O
When BP07 is used as output pin, it can be the IR transmission carrier for
IR applications. BP04~BP06 are used as 3 LED outputs with 256-level
control.
General input/output pins. When used as output pin, it can be open–drain
or CMOS type. When used as input pin, there may have a pull-high option
and generate interrupt request to release IC from STOP mode.
BP10~BP17
BP20~BP27
I/O
I/O
When serial interface is enabled, and set memory type as W55F/W551C,
BP14~BP16 are used to be an interface with the external memory,
W55Fxx or W551Cxxx. If set memory to SPI flash, BP13~BP16 are used
to be an interface.
General input/output pins. When used as output pin, it can be open–drain
or CMOS type. When used as input pin, there may have a pull-high option
and generate interrupt request to release IC from STOP mode.
PWM+/DAC
PWM-
PWM1+/DAC11
O
O
O
O
I
PWM driver positive output or Current type DAC output
PWM driver negative output
PWM driver positive output or Current type DAC output
PWM driver negative output
PWM1-
TEST
Test input, internally pulled low. Do not connect during normal operation.
Positive power supply for uP and peripherals.
VDD
Power
Power
All VDD pins must be bonded out and connect to VDD
Only W567C151/171 for Positive power supply for uP and peripherals.
It needs be bonded out and connect to VDD.
VDD1
VSS
Power Negative power supply for uP and peripherals.
Power Positive power supply for oscillation.
VDDOSC
1
Only W567Cxx6 series provides these pins for dual speaker output.
- 4 -
W567CXXX
PIN NAME
VDDSPK
I/O
FUNCTION
Power Positive power supply for speaker driver.
Power Negative power supply for speaker driver.
VSSSPK
VDD_BP1
CVDD
Positive power supply for BP1 including serial interface Management
(SIM).
Power
O
For 3 battery(3.3V~5.5V) application ,add the capacitor 0.1uF to shunts
between CVDD and GND as power stability for regulator output.
For 2 battery(2.2V~3.6V) application, CVDD will connect to VDD directly.
Note: W567C151/171 without CVDD pin, the application circuit don’t need
consider 3/2 battery application.
4. BLOCK DIAGRAM
OSCIN
OSCOUT
BP10~17 BP20~27 BP00~07
BP13~16
Timing
Generator
Timers
Interrupt
Controller
Serial
Interface
&
I/O
HQ generator
8 bits uP
RESETB
Address/Data Bus
DAC/PWM+
PWM-
Data RAM
Program ROM
DAC/
PWM
Mixer
WDT
- 5 -
W567CXXX
5. ITEM VS PIN TABLE
PIN name
C070/ 080/ C151/ 171
C210/
C126/
Comment
100/ 120
260/ 300/
340/ 380
266/ 306/
346/ 386
BP00~BP07
BP10~BP17
BP20~BP27
/RESET
TEST
V
V
V
V
V
V
V
-
V
V
V
V
V
V
V
-
V
V
V
V
V
V
V
-
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
PWM+/DAC
PWM-
PWM1+/DAC
PWM1-
-
-
-
OSCIN
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
OSCOUT
X32I
Crystal mode
X32O
VDD
VSS
VDDSPK
VSSSPK
VDD_BP1
Support speaker power
Support BP10~BP17
including SIM interface
power
VDDOSC
V
V
V
V
Support OSCIN/OUT
power
VSSOSC
CVDD
V
V
V
-
V
V
V
V
Regulator out
VDD1
V
Connect to VDD
- 6 -
W567CXXX
6. ELECTRICAL CHARACTERISTICS
6.1 Absolute Maximum Ratings
PARAMETER
Supply Voltage to Ground Potential
D.C. Voltage on Any Pin to Ground Potential
Operating Temperature
RATING
-0.3 to +7.0
-0.3 to VDD +0.3
0 to +70
UNIT
V
V
C
C
Storage Temperature
-55 to +150
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability
of the device.
6.2 DC Characteristics
(VDDVSS = 4.5 V, FM = 8 MHz, Ta = 25C, No Load unless otherwise specified)
SPEC.
PARAMETER
SYM.
TEST CONDITIONS
UNIT
Min.
Typ.
Max.
FSYS = 6 MHz
2.4
-
5.5
V
V
Operating Voltage
VDD
FSYS = 8 MHz
3.0
-
5.5
10
2
Operating Current
Standby Current
IOP1
ISB
No load, FSYS = 6 MHz
STOP mode
-
-
6
1
mA
A
FOSC disable, No load,
Wake up frequency: 2Hz
32KHz Crystal current
I32K
VIL
-
6
-
15
A
Input Low Voltage
Input High Voltage
All input pins
All input pins
VSS
0.3 VDD
V
VIH
0.7 VDD
-5
-
VDD
-14
V
Input Current
IIN1
VIN = 0V, pulled-high
resistor = 500k ohm
-9
A
BP0, BP1, BP2, /RESET
Input Current
IIN2
VIN = 0V, pulled-high
resistor = 150k ohm
-15
-30
-45
A
BP0,BP1,BP2, /RESET
IOL
IOH
IOL
VDD = 3V, VOUT = 0.4V
VDD = 3V, VOUT = 2.6V
VDD = 4.5V, VOUT = 1.0V
8
-4
-
12
-6
-
-
-
mA
mA
mA
Output Current (BP0)
25
IOH
VDD = 4.5V, VOUT = 3.5V
-
-12
-
mA
- 7 -
W567CXXX
IOL
IOH
IOL
IOH
VDD = 3V, VOUT = 0.4V
VDD = 3V, VOUT = 2.6V
VDD = 4.5V, VOUT = 1.0V
VDD = 4.5V, VOUT = 3.5V
4
-4
-
8
-
-
-
-
mA
mA
mA
mA
-6
Output Current
(BP1, BP2)
12
-12
-
-2.4
-4.0
-3.0
-5.0
-3.6
-6.0
DAC Full Scale Current
IDAC
IOL1
mA
VDD
=
4.5V, RL = 100
+200
-200
75
-
-
-
-
mA
mA
K
Output Current
PWM+ / PWM-
RL= 8 Ohm,
[PWM+]----[RL]----[PWM-]
IOH1
Pull-high Resistor Test
RPL
150
225
6.3 AC Characteristics
(VDD-VSS = 4.5 V, FM = 8 MHz, Ta = 25C; No Load unless otherwise specified)
SPEC.
Typ.
PARAMETER
SYM.
FM
TEST CONDITIONS
UNIT
Min.
Max.
5.4
7.2
6
8
6.6
Ring type, *Rosc = TBD
Ring type, *Rosc = TBD
Main-Clock
MHz
8.8
5
Main-Clock Wake-up
Stable Time
TWSM
-
-
3
3
mS
%
Ring type, R = TBD K
F
F
FMAX - FMIN
FMIN
Main-Clock Frequency
Deviation, Ring type
7.5
Cycle Time
TCYC
TRES
CPU clock = 6 MHz
After FSYS stable
166
4
-
-
DC
-
nS
RESETB Active Width
TCYC
*: Typical ROSC value for each part number should refer to design guide.
- 8 -
W567CXXX
7. TYPICAL APPLICATION CIRCUIT
(a) Rosc with 2 Battery
(3)
VDDSPK
BP00
|
BP07
4.7uF
VDD/ VDDOSC
VDD_BP1/ VDD1
VDDSPK
10ohm
BP10
|
BP17
0 .1uF
(2)
Speaker 1
(5)
BP20
|
BP27
8050
Rs
120pF
OSCIN
PWM1+/DAC
PWM1-
(4)
ROSC
OSCOUT
TEST
Speaker1
VDDSPK
X32I
X32O
Speaker 0
(5)
8050
Rs
/RESET
Reset
Switch
PWM+/DAC
0.1uF
VSS
VSSSPK
CVDD
(1)
PWM-
Speaker0
Notes:
1. The block (1): If the project is two-battery application (Voltage 3.6V~2.2V), it is necessary to connect CVDD to VDD.
2. The block (2): The low-pass filter circuit is necessary for VDD stability, in order to avoid VDDSPK noise.
3. The block (3): The capacitor, 4.7uF, shunted between VDD and GND is necessary for power stability. However, the
value of capacitor depends on the power loading of the application.
4. The typical value of Rosc is 300 K for 8MHz and 390 K for 6MHz, and the Rosc should be connected to GND
(VSS). Please refer to design guide to get typical Rosc value for each part number.
5. The block (4):The capacitor, 120pF, shunted between OSCIN and VDD is optional for Fosc stability, which can
prevent noise from happening, because it can block the affection of larger current while playing. However, the value
of capacitor depends on the application (100pF~200pF is recommended)
6. The block (5): The Rs value is suggested of 270 ~ 1K to limit large DAC output current flowing into transistor.
7. The above application circuit is for reference only. No warranty for mass production.
- 9 -
W567CXXX
(b) Rosc with 3 Battery
(3)
VDDSPK
BP00
|
BP07
4.7uF
VDD/ VDDOSC
VDD_BP1/
VDD1
VDDSPK
10ohm
BP10
|
BP17
0 .1uF
(2)
Speaker 1
(5)
BP20
|
BP27
8050
Rs
120pF
OSCIN
PWM1+/DAC
PWM1-
(4)
ROSC
OSCOUT
TEST
Speaker1
VDDSPK
X32I
X32O
Speaker 0
(5)
8050
Rs
/
RESET
Reset
0.1uF
Switch
PWM+/DAC
VSSSPK
VSS
CVDD
PWM-
Speaker0
(1)
0.1uF
Notes:
1. The block (1): If the project is three-battery application (Voltage 5.5V~3.0V), it is necessary to connect a 0.1uF
between CVDD and GND (VSS).
2. The block (2): The low-pass filter circuit is necessary for VDD stability, in order to avoid VDDSPK noise
3. The block (3): The capacitor, 4.7uF, shunted between VDD and GND is necessary for power stability. However,
the value of capacitor depends on the power loading of the application.
4. The typical value of Rosc is 300 K for 8MHz and 390 K for 6MHz, and the Rosc should be connected to
GND (VSS). Please refer to design guide to get typical Rosc value for each part number.
5. The block (4)The capacitor, 120pF, shunted between OSCIN and VDD is optional for Fosc, which can prevent
noise from happening, because it can block the affection of larger current while playing. However, the value of
capacitor depends on the application (100pF~200pF is recommended)
6. The block (5): The Rs value is suggested of 270 ~ 1K to limit large DAC output current flowing into
transistor.
7. The above application circuit is for reference only. No warranty for mass production.
- 10 -
W567CXXX
(c) Crystal
(3)
VDDSPK
BP00
|
BP07
4.7uF
VDD/ VDDOSC
VDD_BP1/ VDD1
VDDSPK
10ohm
BP10
|
0 .1uF
(2)
BP17
Speaker 1
(5)
BP20
|
8050
Rs
BP27
OSCIN
Cp1
Cp2
PWM1+/DAC
PWM1-
(4)
(4)
OSCOUT
Speaker1
X32I
VDDSPK
Cp3
Cp4
X32O
Speaker 0
(5)
8050
Rs
/
RESET
Reset
0.1uF
Switch
PWM+/DAC
VSS
VSSSPK
CVDD
PWM-
Speaker0
(1)
Notes:
1. The block (1): Please refer to (a) and (b) circuits for two-battery or three-battery application.
2. The block (2): The low-pass filter circuit is necessary for VDD stability, in order to avoid VDDSPK noise.
3. The block (3): The capacitor, 4.7uF, shunted between VDD and GND is necessary for power stability. However the
value of capacitor depends on the power loading of the application
4. The block (4): Cp1 and Cp2 (15~30pF) are optional for main Crystal, which can be skipped normally.
5. The block (5): The Rs value is suggested of 270 ~ 1K to limit large DAC output current flowing into transistor.
6. Cp3 and Cp4 (15~30pF) are optional for 32KHz Crystal, which can be skipped normally.
7. Please connect all VDD pins include VDDOSC/VDD_BP1 to VDD. If with SIM application, the VDD_BP1 pin can
connect to different voltage for SPI flash or W551Cxx and the BP10~BP17 also use the same power VDD_BP1.
8. The above application circuit is for reference only. No warranty for mass production.
9. Other application circuits please refer to Design Guide.
- 11 -
W567CXXX
(d) PCB layout guide
1.
2.
The IC substrate should be connected to VSS in PCB layout, but VSSSPK can’t connect with
IC substrate directly. Both VSS and VSSSPK tie together in battery negative power.
Each VDD, VDDOSC, VDD_BP1, VDD1 and VDDSPK pad must connect to positive power to
support stable voltage for individual function work successfully. (Don’t let them be floating.)
8. REVISION HISTORY
VERSION
DATE
REASONS FOR CHANGE
PAGE
A0.0
Dec 2006
Preliminary release.
Add IO description for different body
A1.0
A2.0
May 2007
Nov 2007
Modify application circuit
Modify application circuit (naming)
Modify Logo
A3.0
A4.0
A5.0
Sep. 2008
Jun. 2009
Jun. 2010
Change logo
Modify application circuit
Add application circuit for 2 battery
7
Update output current for BP1/2 @4.5V/3.0V and update BP0 @4.5V
Add application circuit for Ring OSCin pin to 120pF to VDD for option
Modify the description for application circuit
9~15
A6.0
Dec. 2010
Support MD4 format for F/W library
9~15
3
2, 5
9~18
2
A7.0
A8.0
July 2011
Aug. 2011
Add new chip W567C151/171 application circuit
Remove W567C150/170
5
Add new chip W567C151/171 pad description
9~20
20
Add new chip W567C151/171 application circuit
Add SIM application circuits
2
7
Add W567CP80 OTP chip
A9.0
Jan. 2012
Add items vs pad table
Modify application circuits
4
9
BP00~BP03 share pins as OTP writer in W567CP80.
Update operating current DC spec.
A10.0
A11.0
Mar. 2012
Jun. 2012
5, 7
Revised VDD_SIM to VDD_BP1
11~13
- 12 -
W567CXXX
Important Notice
Nuvoton Products are neither intended nor warranted for usage in systems or equipment, any
malfunction or failure of which may cause loss of human life, bodily injury or severe property
damage. Such applications are deemed, “Insecure Usage”.
Insecure usage includes, but is not limited to: equipment for surgical implementation, atomic
energy control instruments, airplane or spaceship instruments, the control or operation of
dynamic, brake or safety systems designed for vehicular use, traffic signal instruments, all
types of safety devices, and other applications intended to support or sustain life.
All Insecure Usage shall be made at customer’s risk, and in the event that third parties lay
claims to Nuvoton as a result of customer’s Insecure Usage, customer shall indemnify the
damages and liabilities thus incurred by Nuvoton.
- 13 -
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