LV86 [NSC]
3V Enhanced CMOS Quad Differential Line Receiver; 3V增强型CMOS四路差动线路接收器
| 型号： | LV86 |
| 厂家： | 
National Semiconductor |
| 描述： | 3V Enhanced CMOS Quad Differential Line Receiver |
| 文件： | 总10页 (文件大小：195K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
February 1997
DS34LV86T
3V Enhanced CMOS Quad Differential Line Receiver
General Description
Features
n Low power CMOS design (30 mW typical)
n Interoperable with existing 5V RS-422 networks
n Industrial temperature range
The DS34LV86T is a high speed quad differential CMOS re-
ceiver that meets the requirements of both TIA/EIA-422-B
and ITU-T V.11. The CMOS DS34LV86T features typical low
static ICC of 9 mA which makes it ideal for battery powered
and power conscious applications. The TRI-STATE® en-
ables, EN, allow the device to be disabled when not in use to
minimize power consumption. The dual enable scheme al-
lows for flexibility in turning receivers on and off.
n Meets TIA/EIA-422-B (RS-422) and ITU-T V.11
recommendation
n 3.3V Operation
±
±
n
n
7V common mode range VID = 3V
10V common mode range VID = 0.2V
The receiver output (RO) is guaranteed to be High when the
inputs are left open. The receiver can detect signals as low
n Receiver OPEN input failsafe feature
n Guaranteed AC parameter:
Maximum Receiver Skew: 4 ns
Transition time: 10 ns
n Pin compatible with DS34C86T
n 32 MHz Toggle Frequency
n 6.5k ESD Tolerance (HBM)
n Available in SOIC packaging
±
±
as 200 mV over the common mode range of 10V. The re-
ceiver outputs (RO) are compatible with TTL and LVCMOS
levels.
Connection Diagram
Truth Table
Enable
Inputs
RI+–RI−
X
Output
Dual-In-Line Package
EN
L
RO
Z
H
VID ≥ +0.2V
VID ≤ −0.2V
H
H
L
†
H
Open
H
L = Logic Low
H = Logic High
X = Irrelevant
Z = TRI-STATE
†
= Open, Not Terminated
DS012644-1
Top View
Order Number DS34LV86TN, DS34LV86TM
See NS Package Number M16A or N16E
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
© 1998 National Semiconductor Corporation
DS012644
www.national.com
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Derate N Package
13.9 mW/˚C above +25˚C
65˚C to +150˚C
Storage Temperature Range
Lead Temperature Range
Soldering (4 Seconds)
ESD Ratings (HBM, 1.5k, 100 pF)
Receiver Inputs and Enables
Other Pins
+260˚C
Supply Voltage (VCC
)
+7V
+7V
≥6.5 kV
≥2 kV
Enable Input Voltage (EN)
Receiver Input Voltage
(VID: RI+, RI−)
±
±
14V
14V
Recommended Operating
Conditions
Receiver Input Voltage
(VCM: RI+, RI−)
Receiver Output Voltage (RO)
Receiver Output Current (RO)
Maximum Package Power Dissipation +25˚C
M Package
−0.5V to VCC + 0.5V
Min
Typ
Max
Units
±
25 mA
Supply Voltage (VCC
Operating Free Air
Temperature (TA)
)
3.0
3.3
3.6
V
1190 mW
1645 mW
−40
+25
+85
˚C
N Package
Derate M Package
9.8 mW/˚C above +25˚C
Electrical Characteristics (Notes 2, 3)
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified.
Symbol
Parameter
Conditions
VOUT = VOH or VOL
Pin
Min
Typ
Max
Units
±
VTH
Differential Input Threshold
−200
17.5
+200
mV
RI+,
RI−
<
<
−7V VCM +7V
VHY
VIH
Hysteresis
VCM = 1.5V
35
mV
V
Minimum High Level Input
Voltage
2.0
EN
VIL
Minimum Low Level Input
Voltage
0.8
1.8
V
RIN
Input Resistance
VIN = −7V, +7V
5.0
8.5
kΩ
(Other Input = GND)
VIN = +10V
IIN
Input Current
(Other Input = 0V,
Power On or VCC = 0V)
0
0
1.1
mA
mA
mA
mA
mA
µA
V
RI+,
RI−
VIN = +3V
0.27
VIN = 0.5V
−0.02
−0.43
−1.26
VIN = −3V
0
0
VIN = −10V
−2.2
±
1
IEN
VIN = 0V to VCC
EN
RO
VCC
VOH
High Level Output Voltage
High Level Output Voltage
Low Level Output Voltage
IOH = −6 mA, VID = +1V
IOH = −6 mA, VID = OPEN
IOH = −100 µA, VID = +1V
IOH = −100 µA, VID = OPEN
IOL = +6 mA, VID = −1V
VIN = VCC or GND
EN = VIL
2.4
3
VOH
VCC − 0.1
0.13
V
VOL
IOZ
0.5
V
±
Output TRI-STATE
Leakage Current
50
−70
15
µA
ISC
Output Short Circuit Current
VO = 0V, VID ≥ |200 mV|
(Note 4)
−10
−35
9
mA
mA
ICC
Power Supply Current
No Load, All RI+, RI− = Open,
EN = VCC or GND
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2
Switching Characteristics (Notes 3, 9, 10)
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified.
Symbol
tPHL
tPLH
tr
Parameter
Propagation Delay High to Low
Propagation DeIay Low to High
Rise Time (20% to 80%)
Fall Time (80% to 20%)
Disable Time
Conditions
CL = 15 pF
(Figures 1, 2 )
Min
6
Typ
17.5
17.8
4.1
Max
35
35
10
10
40
40
40
40
4
Units
ns
6
ns
ns
tf
3.3
ns
tPHZ
tPLZ
tPZH
tPZL
tSK1
tSK2
tSK3
fMAX
CL = 50 pF
ns
Disable Time
(Figures 3, 4)
ns
Enable Time
ns
Enable Time
ns
Skew, |tPHL − tPLH|(Note 5)
Skew, Pin to Pin (Note 6)
Skew, Part to Part (Note 7)
Maximum Operating Frequency
(Note 8)
CL = 15 pF
CL = 15 pF
0.3
0.6
7
ns
4
ns
17
ns
32
MHz
Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices
should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation.
Note 2: Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground except V
.
ID
Note 3: All typicals are given for: V
CC
= +3.3V, T = +25˚C.
A
Note 4: Short one output at a time to ground. Do not exceed package power dissipation ratings.
Note 5:
Note 6:
Note 7:
t
t
t
is the |t
PHL
− t | of a channel.
PLH
SK1
SK2
SK3
is the maximum skew between any two channels within a device, on either edge.
is the difference in propagation delay times between any channels of any devices. This specification (maximum limit) applies to devices within V
CC
=
±
±
5˚C (between devices) within the operating temperature range. This parameter is guaranteed by design and characterization.
0.1V of one another,and a Delta T
A
Note 8: All channels switching, output duty cycle criteria is 40%/60% measured at 50% Input = 1V to 2V, 50% Duty Cycle, t /t ≤ 5 ns. This parameter is guaranteed
r
f
by design and characterization.
Parameter Measurement Information
DS012644-2
FIGURE 1. Receiver Propagation Delay and Transition Time Test Circuit (Notes 9, 10)
DS012644-3
FIGURE 2. Receiver Propagation Delay and Transition Time Waveform (Notes 9, 10)
Note 9: Generator waveform for all tests unless otherwise specified: f = 1 MHz, Duty Cycle = 50%, Z = 50Ω, t ≤ 10 ns, t ≤ 10 ns.
O
r
f
Note 10:
C includes probe and jig capacitance.
L
3
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Parameter Measurement Information (Continued)
DS012644-4
FIGURE 3. Receiver TRI-STATE Test Circuit
DS012644-5
FIGURE 4. Receiver TRI-STATE Output Enable and Disable Waveforms (Notes 9, 10)
Power Decoupling Recommendations: Bypass caps must be
used on power pins. High frequency ceramic (surface mount
is recommended) 0.1 µF in paraIIel with 0.01 µF at the power
supply pin. A 10 µF or greater solid tantalum or electrolytic
should be connected at the power entry point on the printed
circuit board.
Typical Application Information
General application guidelines and hints for differential driv-
ers receivers may be found in the following application
notes:
AN-214, AN-457, AN-805, AN-847, AN-903, AN-912, AN-916
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4
Typical Application Information (Continued)
DS012644-6
R
is optional although highly recommended to reduce reflection
T
DS012644-7
FIGURE 5. Typical Receiver Connections
DS012644-8
FIGURE 6. Typical Receiver Output Waveforms
DS012644-9
FIGURE 7. Typical Receiver Input Circuit
5
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Typical Application Information (Continued)
DS012644-10
FIGURE 8. Typical ICC vs Frequency
DS012644-11
FIGURE 9. IIN vs VIN (Power On, Power Off)
DS012644-12
FIGURE 10. IOL vs VOL
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6
Typical Application Information (Continued)
DS012644-13
FIGURE 11. IOH vs VOH
7
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8
Physical Dimensions inches (millimeters) unless otherwise noted
Dual-In-Line Package
Order Number DS34LV86TM
NS Package Number M16A
Dual-In-Line Package
Order Number DS34LV86TN
See NS Package Number N16E
9
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NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DE-
VICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMI-
CONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or sys-
tems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, and whose fail-
ure to perform when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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