LP339N [NSC]

Ultra-Low Power Quad Comparator; 超低功耗四路比较器
LP339N
型号: LP339N
厂家: National Semiconductor    National Semiconductor
描述:

Ultra-Low Power Quad Comparator
超低功耗四路比较器

比较器 放大器 放大器电路 光电二极管
文件: 总11页 (文件大小:232K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
September 1999  
LP339  
Ultra-Low Power Quad Comparator  
n Single supply operation  
n Sensing at ground  
n Compatible with CMOS logic family  
n Pin-out identical to LM339  
General Description  
The LP339 consists of four independent voltage compara-  
tors designed specifically to operate from a single power  
supply and draw typically 60 µA of power supply drain cur-  
rent over a wide range of power supply voltages. Operation  
from split supplies is also possible and the ultra-low power  
supply drain current is independent of the power supply volt-  
Features  
n Ultra-low power supply current drain  
(60 µA) — independent of the supply voltage  
(75 µW/comparator at +5 VDC  
n Low input biasing current: 3 nA  
age. These comparators also feature  
range which includes ground, even when operated from a  
single supply.  
a common-mode  
)
Applications  
include  
limit  
comparators,  
simple  
±
±
n Low input offset current:  
n Low input offset voltage:  
0.5 nA  
2 mV  
analog-to-digital converters, pulse, square and time delay  
generators; VCO’s; multivibrators; high voltage logic gates.  
The LP339 was specifically designed to interface with the  
CMOS logic family. The ultra-low supply current makes the  
LP339 valuable in battery powered applications.  
n Input common-mode voltage includes ground  
n Output voltage compatible with MOS and CMOS logic  
n High output sink current capability (30 mA at VO 2 VDC  
n Supply Input protected against reverse voltages  
=
)
Advantages  
n Ultra-low power supply drain suitable for battery  
applications  
Schematic and Connection Diagrams  
DS005226-2  
Order Number LP339M for S.O. Package  
See NS Package Number M14A  
DS005226-1  
Order Number LP339N for Dual-In-Line Package  
See NS Package Number N14A  
Typical Applications (V+ 5.0 VDC  
)
=
Basic Comparator  
Driving CMOS  
DS005226-3  
DS005226-4  
© 1999 National Semiconductor Corporation  
DS005226  
www.national.com  
Absolute Maximum Ratings (Note 1)  
If Military/Aerospace specified devices are required,  
please contact the National Semiconductor Sales Office/  
Distributors for availability and specifications.  
Operating Temperature Range  
Storage Temperature Range  
Soldering Information:  
Dual-In-Line Package (10 sec.)  
S.O. Package:  
0˚C to +70˚C  
−65˚ to +150˚C  
+260˚C  
±
36 VDC or 18 VDC  
Supply Voltage  
Vapor Phase (60 sec.)  
Infrared (15 sec.)  
+215˚C  
+220˚C  
±
Differential Input Voltage  
Input Voltage  
36 VDC  
−0.3 VDC to 36 VDC  
See AN-450 “Surface Mounting Methods and Their Effect on  
Product Reliability” for other methods of soldering surface  
mount devices.  
Power Dissipation (Note 2)  
Molded DIP  
570 mW  
Continuous  
50 mA  
Output Short Circuit to GND (Note 3)  
<
Input Current VIN −0.3 VDC (Note 4)  
Electrical Characteristics  
=
(V+ 5 VDC) (Note 5)  
Parameter  
Input Offset Voltage  
Input Bias Current  
Conditions  
Min  
Typ  
Max  
Units  
mVDC  
nADC  
=
±
±
5
TA 25˚C (Note 10)  
2
IIN(+) or IIN(−) with the  
2.5  
25  
=
Output in the Linear Range, TA 25˚C (Note 6)  
=
±
±
5
Input Offset Current  
Input Common  
I
IN(+)−IIN(−), TA 25˚C  
0.5  
nADC  
VDC  
=
TA 25˚C (Note 7)  
0
V+−1.5  
Mode Voltage Range  
Supply Current  
=
=
RL Infinite on all Comparators, TA 25˚C  
60  
100  
µADC  
V/mV  
=
Voltage Gain  
VO 1 VDC to 11 VDC  
,
500  
+
=
=
=
RL 15 k, V 15 VDC, TA 25˚C  
=
=
Large Signal  
VIN TTL Logic Swing, VREF 1.4 VDC  
,
1.3  
µSec  
= = =  
VRL 5 VDC, RL 5.1 k, TA 25˚C  
Response Time  
Response Time  
Output Sink Current  
=
=
=
VRL 5 VDC, RL 5.1 k, TA 25˚C (Note 8)  
8
µSec  
=
=
=
V
IN(−) 1 VDC, VIN(+) 0, VO 2 VDC  
,
15  
30  
mADC  
=
TA 25˚C (Note 12)  
=
VO 0.4 VDC  
0.20  
0.70  
0.1  
mADC  
nADC  
mVDC  
nADC  
nADC  
VDC  
=
=
=
=
Output Leakage Current  
Input Offset Voltage  
Input Offset Current  
Input Bias Current  
VIN(+) 1 VDC, VIN(−) 0, VO 5 VDC, TA 25˚C  
±
(Note 10)  
9
±
±
IIN(+)−IIN(−)  
1
15  
IIN(+) or IIN(−) with Output in Linear Range  
Single Supply  
4
40  
Input Common  
0
V+−2.0  
Mode Voltage Range  
Output Sink Current  
Output Leakage Current  
Differential Input Voltage  
=
=
=
V
IN(−) 1 VDC, VIN(+) 0, VO 2 VDC  
10  
mADC  
µADC  
VDC  
=
=
=
VIN(+) 1 VDC, VIN(−) 0, VO 30 VDC  
1.0  
36  
All VIN’s0 VDC (or Von split supplies) (Note 9)  
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is func-  
tional, but do not guarantee specific performance limits.  
Note 2: For elevated temperature operation, T max is 125˚C for the LP339. θ (junction to ambient) is 175˚C/W for the LP339N and 120˚C/W for the LP339M when  
ja  
j
either device is soldered in a printed circuit board in a still air environment. The low bias dissipation and the “ON-OFF” characteristic of the outputs keeps the chip  
dissipation very small (P 100 mW), provided the output transistors are allowed to saturate.  
D
+
Note 3: Short circuits from the output to V can cause excessive heating and eventual destruction. The maximum output current is approximately 50 mA.  
Note 4: This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector-base junction of the input PNP tran-  
sistors becoming forward biased and thereby acting as input clamp diodes. In addition to this diode action, there is also lateral NPN parasitic transistor action on the  
IC chip. This transistor action can cause the output voltage of the comparators to go to the V+ voltage level (or to ground for a large input overdrive) for the time du-  
ration that an input is driven negative. This is not destructive and normal output states will re-establish when the input voltage, which is negative, again returns to a  
=
(T 25˚C).  
A
value greater than −0.3 V  
DC  
+
=
Note 5: These specifications apply for V 5V and 0˚CT 70˚ C, unless otherwise stated. The temperature extremes are guaranteed but not 100% production  
DC  
A
tested. These parameters are not used to calculate outgoing AQL.  
Note 6: The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the state of the output, so  
no loading change exists on the reference or the input lines as long as the common-mode range is not exceeded.  
Note 7: The input common-mode voltage or either input voltage should not be allowed to go negative by more than 0.3V. The upper end of the common-mode volt-  
+
=
age range is V −1.5V (T 25˚C), but either or both inputs can go to 30 V  
without damage.  
A
DC  
Note 8: The response time specified is for a 100 mV input step with 5 mV overdrive. For larger overdrive signals 1.3 µs can be obtained. See Typical Performance  
Characteristics section.  
www.national.com  
2
Electrical Characteristics (Continued)  
Note 9: Positive excursions of input voltage may exceed the power supply level. As long as the other voltage remains within the common-mode range, the compara-  
tor will provide a proper output state. The low input voltage state must not be less than −0.3 V (or 0.3 V below the magnitude of the negative power supply, if  
DC DC  
=
used) at T 25˚C.  
A
+
+
=
=
S
Note 10: At output switch point, V 1.4V, R 0with V from 5 V ; and over the full input common-mode range (0 V  
to V −1.5 V ).  
DC  
O
D
C
D
C
+
Note 11: For input signals that exceed V , only the overdriven comparator is affected. With a 5V supply, V should be limited to 25V maximum, and a limiting resistor  
IN  
should be used on all inputs that might exceed the positive supply.  
Note 12: The output sink current is a function of the output voltage. The LP339 has a bi-modal output section which allows it to sink large currents via a Darlington  
connection at output voltages greater than approximately 1.5 V and sink lower currents below this point. (See typical characteristics section and applications sec-  
DC  
tion).  
Typical Performance Characteristics  
Supply Current  
Input Current  
Output Sink Current  
DS005226-35  
DS005226-37  
DS005226-36  
Output Sink Current  
Response Times for  
Various Input  
Overdrives —  
Response Times for  
Various Input  
Overdrives —  
Negative Transition  
Positive Transition  
DS005226-38  
DS005226-39  
DS005226-40  
3
www.national.com  
Application Hints  
All pins of any unused comparators should be tied to the  
negative supply.  
The bias network of the LP339 establishes a drain current  
which is independent of the magnitude of the power supply  
voltage over the range of from 2 VDC to 30 VDC  
.
It is usually unnecessary to use a bypass capacitor across  
the power supply line.  
The differential input voltage may be larger than V+ without  
damaging the device. Protection should be provided to pre-  
vent the input voltages from going negative more than −0.3  
VDC (at 25˚C). An input clamp diode can be used as shown  
in the application section.  
DS005226-11  
The output section of the LP339 has two distinct modes of  
operation-a Darlington mode and a grounded emitter mode.  
This unique drive circuit permits the LP339 to sink 30 mA at  
FIGURE 1.  
Notice that the output section is configured in a Darlington  
connection (ignoring Q3). Therefore, if the output voltage is  
held high enough (VO1 VDC), Q1 is not saturated and the  
output current is limited only by the product of the betas of  
Q1, Q2 and I1 (and the 60RSAT of Q2). The LP339 is thus  
capable of driving LED’s, relays, etc. in this mode while  
maintaining an ultra-low power supply current of typically  
60 µA.  
=
=
VO 2 VDC (Darlington mode) and 700 µA at VO 0.4 VDC  
(grounded emitter mode). Figure 1 is a simplified schematic  
diagram of the LP339 output section.  
If transistor Q3 were omitted, and the output voltage allowed  
to drop below about 0.8 VDC, transistor Q1 would saturate  
and the output current would drop to zero. The circuit would,  
therefore, be unable to “pull” low current loads down to  
ground (or the negative supply, if used). Transistor Q3 has  
been included to bypass transistor Q1 under these condi-  
tions and apply the current I1 directly to the base of Q2. The  
output sink current is now approximately I1 times the beta of  
=
Q2 (700 µA at VO 0.4 VDC). The output of the LP339 exhib-  
its a bi-modal characteristic with a smooth transition be-  
tween modes. (See Output Sink Current graphs in Typical  
Performance Characteristics section.)  
It is also important to note that in both cases the output is an  
uncommitted collector. Therefore, many collectors can be  
tied together to provide an output OR’ing function. An output  
pull-up resistor can be connected to any available power  
supply voltage within the permitted power supply voltage  
range and there is no restriction on this voltage due to the  
magnitude of the voltage which is applied to the V+ terminal  
of the LP339 package.  
Typical Applications (V+ 15 VDC  
)
=
One-Shot Multivibrator  
DS005226-13  
www.national.com  
4
Typical Applications (V+ 15 VDC) (Continued)  
=
Time-Delay Generator  
DS005226-15  
ORing the Outputs  
DS005226-16  
5
www.national.com  
Typical Applications (V+ 15 VDC) (Continued)  
=
Squarewave Oscillator  
DS005226-17  
Three Level Audio Peak Indicator  
DS005226-19  
LED Driver  
DS005226-22  
www.national.com  
6
Typical Applications (V+ 15 VDC) (Continued)  
=
Pulse Generator  
DS005226-18  
Bi-Stable Multivibrator  
DS005226-21  
Relay Driver  
DS005226-23  
7
www.national.com  
Typical Applications (V+ 15 VDC) (Continued)  
=
Buzzer Driver  
Comparator With 60 mA Sink Capability  
DS005226-24  
DS005226-25  
Non-Inverting Comparator with Hysteresis  
Inverting Comparator with Hysteresis  
DS005226-26  
DS005226-27  
Comparing Input Voltages  
of Opposite Polarity  
Basic Comparator  
Output Strobing  
DS005226-29  
DS005226-30  
DS005226-28  
www.national.com  
8
Typical Applications (V+ 15 VDC) (Continued)  
=
Transducer Amplifier  
Zero Crossing Detector (Single Power Supply)  
DS005226-32  
DS005226-31  
Split-Supply Applications  
Zero Crossing Detector  
Comparator With a Negative Reference  
DS005226-34  
DS005226-33  
9
www.national.com  
Physical Dimensions inches (millimeters) unless otherwise noted  
S.O. Package (M)  
Order Number LP339M  
NS Package M14A  
Molded Dual-In-Line Package (N)  
Order Number LP339N  
NS Package Number N14A  
www.national.com  
10  
Notes  
LIFE SUPPORT POLICY  
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL  
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:  
1. Life support devices or systems are devices or  
systems which, (a) are intended for surgical implant  
into the body, or (b) support or sustain life, and  
whose failure to perform when properly used in  
accordance with instructions for use provided in the  
labeling, can be reasonably expected to result in a  
significant injury to the user.  
2. A critical component is any component of a life  
support device or system whose failure to perform  
can be reasonably expected to cause the failure of  
the life support device or system, or to affect its  
safety or effectiveness.  
National Semiconductor  
Corporation  
Americas  
Tel: 1-800-272-9959  
Fax: 1-800-737-7018  
Email: support@nsc.com  
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Europe  
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Response Group  
Tel: 65-2544466  
Fax: 65-2504466  
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Tel: 81-3-5639-7560  
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Email: europe.support@nsc.com  
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www.national.com  
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.  

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