LMV339MTX/NOPB [NSC]

IC QUAD COMPARATOR, 7000 uV OFFSET-MAX, 450 ns RESPONSE TIME, PDSO14, LEAD FREE, TSSOP-14, Comparator;


型号：	LMV339MTX/NOPB
厂家：	National Semiconductor
描述：	IC QUAD COMPARATOR, 7000 uV OFFSET-MAX, 450 ns RESPONSE TIME, PDSO14, LEAD FREE, TSSOP-14, Comparator
文件：	总21页 (文件大小：483K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

August 1999

LMV331 Single / LMV393 Dual / LMV339 Quad

General Purpose, Low Voltage, TinyPack Comparators

General Description

Features

The LMV393 and LMV339 are low voltage (2.7-5V) versions

of the dual and quad comparators, LM393/339, which are

specified at 5-30V. The LMV331 is the single version, which

is available in space saving SC70-5 and SOT23-5 packages.

SC70-5 is approximately half the size of SOT23-5.

(For 5V Supply, Typical Unless Otherwise Noted)

Space Saving SC70-5 Package (2.0 x 2.1 x 1.0

mm)

Space Saving SOT23-5 Package (3.00 x 3.01 x

1.43 mm)

The LMV393 is available in 8-pin SOIC and 8-pin MSOP. The

LMV339 is available in 14-pin SOIC and 14-pin TSSOP.

Guaranteed 2.7V and 5V Performance

The LMV331/393/339 is the most cost-effective solution

where space, low voltage, low power and price are the pri-

mary specification in circuit design for portable consumer

products. They offer specifications that meet or exceed the

familiar LM393/339 at a fraction of the supply current.

Industrial Temperature Range

Low Supply Current

−40˚C to +85˚C

60µA/Channel

Input Common Mode Voltage Range Includes Ground

Low Output Saturation Voltage

200 mV

The chips are built with National’s advanced Submicron

Silicon-Gate BiCMOS process. The LMV331/393/339 have

bipolar input and output stages for improved noise perfor-

mance.

Applications

n Mobile Communications

n Notebooks and PDA’s

n Battery Powered Electronics

n General Purpose Portable Device

n General Purpose Low Voltage Applications

Connection Diagrams

5-Pin SC70-5/SOT23-5

14-Pin SO/TSSOP

DS100080-1

Top View

8-Pin SO/MSOP

DS100080-3

Top View

DS100080-2

Top View

DS100080

www.national.com

Ordering Information

Temperature Range

Packaging

Marking

Transport

Media

NSC

Drawing

Package

5-pin SC70-5

Industrial

−40˚C to +85˚C

LMV331M7

C13

1k Units Tape and Reel

3k Units Tape and Reel

1k Units Tape and Reel

3k Units Tape and Reel

Rails

MAA05

MA05B

LMV331M7X

LMV331M5

LMV331M5X

LMV393M

C13

5-pin SOT23-5

8-pin Small Outline

8-pin MSOP

C12

LMV393M

LMV393

LMV339M

LMV339MT

M08A

MUA08A

M14A

LMV393MX

LMV393MM

LMV393MMX

LMV339M

2.5k Units Tape and Reel

1k UnitsTape and Reel

3.5k Units Tape and Reel

Rails

14-pin Small Outline

14-pin TSSOP

LMV339MX

LMV339MT

LMV339MTX

2.5k Units Tape and Reel

Rails

MTC14

2.5k Units Tape and Reel

www.national.com

Absolute Maximum Ratings (Note 1)

Operating Ratings(Note 1)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

Supply Voltage

2.7V to 5.0V

Temperature Range

LMV393, LMV339,

LMV331

−40˚C ≤ T_J≤ +85˚C

ESD Tolerance (Note 2)

Human Body Model

Thermal Resistance (θ_JA

)

LMV331/ 393/ 339

800V

120V

M Package, 8-pin Surface

Mount

190˚C/W

145˚C/W

155˚C/W

478˚C/W

265˚C/W

235˚C/W

Machine Model LMV331/339/393

Differential Input Voltage

Supply Voltage

5.5V

M Package, 14-pin Surface

Mount

Voltage on any pin

(referred to V⁻pin)

MTC Package, 14-pin

TSSOP

Soldering Information

Infrared or Convection (20 sec)

Storage Temp. Range

235˚C

MAA05 Package, 5-pin

SC70-5

−65˚C to +150˚C

150˚C

M05A Package 5 -pin

SOT23-5

Junction Temperature (Note 3)

MM Package, 8-pin Mini

Surface Mount

2.7V DC Electrical Characteristics

Unless otherwise specified, all limits guaranteed for T_J= 25˚C, V+ 2.7V, V− 0V. Boldface limits apply at the temperature

extremes.

Symbol

Parameter

Conditions

Typ

(Note 4)

LMV331/

393/339

Limit

Units

(Note 5)

V_OS

TCV_OS

I_B

Input Offset Voltage

max

1.7

Input Offset Voltage

Average Drift

µV/˚C

Input Bias Current

Input Offset Current

Input Voltage Range

250

400

nA max

I_OS

150

V_CM

−0.1

2.0

200

V_SAT

I_O

Saturation Voltage

Output Sink Current

Supply Current

I_sink≤ 1mA

V_O≤ 1.5V

mA min

µA max

I_S

LMV331

100

140

LMV393

Both Comparators

LMV339

All four Comparators

140

200

µA max

Output Leakage Current

.003

2.7V AC Electrical Characteristics

T_J= 25˚C, V+ 2.7V, R_L5.1 kΩ, V− 0V.

Symbol

Parameter

Conditions

Typ

Units

(Note 4)

1000

350

t_PHL

Propagation Delay (High to Low)

Input Overdrive 10 mV

Input Overdrive 100 mV

t_PLH

Propagation Delay (Low to High)

Input Overdrive 10 mV

500

Input Overdrive 100 mV

400

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5V DC Electrical Characteristics

Unless otherwise specified, all limits guaranteed for T_J= 25˚C, V+ 5V, V− 0V. Boldface limits apply at the temperature

extremes.

Symbol

Parameter

Conditions

Typ

(Note 4)

LMV331/

393/339

Limit

Units

(Note 5)

V_OS

TCV_OS

I_B

Input Offset Voltage

1.7

max

Input Offset Voltage

Average Drift

µV/˚C

Input Bias Current

Input Offset Current

Input Voltage Range

250

400

nA max

I_OS

150

V_CM

−0.1

4.2

A_V

Voltage Gain

V/mV min

V_sat

Saturation Voltage

I_sink≤ 4 mA

200

400

700

max

I_O

I_S

Output Sink Current

Supply Current

V_O≤ 1.5V

LMV331

120

µA max

150

LMV393

Both Comparators

100

170

.003

200

250

µA max

LMV339

All four Comparators

300

350

Output Leakage Current

5V AC Electrical Characteristics

T_J= 25˚C, V+ 5V, R_L5.1 kΩ, V− 0V.

Symbol

Parameter

Conditions

Typ

(Note 4)

Units

t_PHL

Propagation Delay (High to Low)

Input Overdrive 10 mV

600

Input Overdrive 100 mV

200

t_PLH

Propagation Delay (Low to High)

Input Overdrive 10 mV

450

Input Overdrive 100 mV

300

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is in-

tended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical characteristics.

Note 2: : Human body model, 1.5kΩ in series with 100 pF. Machine model, 200Ω in series with 100 pF.

J(max)

Note 3: The maximum power dissipation is a function of T

, θ , and T . The maximum allowable power dissipation at any ambient temperature is P

J(max) JA

- T )/θ . All numbers apply for packages soldered directly into a PC board.

Note 4: Typical Values represent the most likely parametric norm.

Note 5: All limits are guaranteed by testing or statistical analysis.

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Typical Performance Characteristics Unless otherwise specified, V_S+5V, single supply, T_A25˚C

Supply Current vs

Supply Voltage Output High

(LMV331)

Supply Voltage Output Low

(LMV331)

Output Voltage vs

Output Current at 5V Supply

DS100080-34

DS100080-33

DS100080-37

Output Voltage vs

Output Current

at 2.7 Supply

Input Bias Current vs

Supply Voltage

Response Time vs

Input Overdrives

Negative Transition

DS100080-36

DS100080-38

DS100080-42

Response Time for

Input Overdrive

Positive Transition

Response Time vs

Input Overdrives

Negative Transition

Response Time for

Input Overdrive

Positive Transition

DS100080-43

DS100080-41

DS100080-40

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Simplified Schematic

DS100080-47

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Application Circuits

Basic Comparator

A basic comparator circuit is used for converting analog sig-

nals to

a digital output. The LMV331/393/339 have an

open-collector output stage, which requires a pull-up resistor

to a positive supply voltage for the output to switch properly.

When the internal output transistor is off, the output voltage

will be pulled up to the external positive voltage.

The output pull-up resistor should be chosen high enough so

as to avoid excessive power dissipation yet low enough to

supply enough drive to switch whatever load circuitry is used

on the comparator output. On the LMV331/393/339 the

pull-up resistor should range between 1k to 10kΩ.

DS100080-26

The comparator compares the input voltage (V_in) at the

non-inverting pin to the reference voltage (V_ref) at the invert-

ing pin. If V_inis less than V_ref, the output voltage (V_o) is at the

saturation voltage. On the other hand, if V_inis greater than

_ref, the output voltage (V_o) is at V_cc..

DS100080-4

FIGURE 1. Basic Comparator

Comparator with Hysteresis

The basic comparator configuration may oscillate or produce

a noisy output if the applied differential input voltage is near

the comparator’s offset voltage. This usually happens when

the input signal is moving very slowly across the compara-

tor’s switching threshold. This problem can be prevented by

the addition of hysteresis or positive feedback.

Inverting Comparator with Hysteresis

The inverting comparator with hysteresis requires a three re-

sistor network that are referenced to the supply voltage V_cc

of the comparator. When Vin at the inverting input is less

than V_a, the voltage at the non-inverting node of the com-

parator (V_in

V_a), the output voltage is high (for simplicity

assume V_oswitches as high as V_cc). The three network re-

sistors can be represented as R₁//R₃in series with R₂. The

lower input trip voltage V_a1is defined as

When V_inis greater than Va (V_inV_a), the output voltage is

low very close to ground. In this case the three network re-

sistors can be presented as R₂//R₃in series with R₁. The up-

per trip voltage V_a2is defined as

The total hysteresis provided by the network is defined as

∆V_aV_a1- V_a2

To assure that the comparator will always switch fully to V_cc

and not be pulled down by the load the resistors values

should be chosen as follow:

R_pull-up

R_load

and R₁R_pull-up

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Application Circuits (Continued)

DS100080-25

FIGURE 2. Inverting Comparator with Hysteresis

Non-Inverting Comparator with Hysteresis

Non inverting comparator with hysteresis requires a two re-

sistor network, and a voltage reference (V_ref) at the inverting

input. When V_inis low, the output is also low. For the output

to switch from low to high, V_inmust rise up to V_in1where V_in1

is calculated by

When V_inis high, the output is also high, to make the com-

parator switch back to it’s low state, V_inmust equal V_refbe-

fore V_awill again equal V_ref. V_incan be calculated by:

DS100080-22

The hysteresis of this circuit is the difference between V_in1

and V_in2

∆V_in= V_ccR₁/R₂

DS100080-23

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Capacitor C₁must now discharge through R₄towards

ground. The output will return to its high state when the volt-

age across the capacitor has discharged to a value equal to

Application Circuits (Continued)

Square Wave Oscillator

V_a2

Comparators are ideal for oscillator applications. This square

wave generator uses the minimum number of components.

The output frequency is set by the RC time constant of the

capacitor C₁and the resistor in the negative feedback R₄.

The maximum frequency is limited only by the large signal

propagation delay of the comparator in addition to any ca-

pacitive loading at the output, which would degrade the out-

put slew rate.

For the circuit shown, the period for one cycle of oscillation

will be twice the time it takes for a single RC circuit to charge

up to one half of its final value. The time to charge the ca-

pacitor can be calculated from

Where V_maxis the max applied potential across the capaci-

tor = (2V_cc/3)

and V_CVmax/2 V_CC/3

One period will be given by:

1/freq = 2t

or calculating the exponential gives:

1/freq = 2(0.694) R₄C₁

Resistors R₃and R₄must be at least two times larger than

R₅to insure that V_owill go all the way up to V_ccin the high

state. The frequency stability of this circuit should strictly be

a function of the external components.

Free Running Multivibrator

A simple yet very stable oscillator that generates a clock for

slower digital systems can be obtained by using a resonator

as the feedback element. It is similar to the free running mul-

tivibrator, except that the positive feedback is obtained

through a quartz crystal. The circuit oscillates when the

transmission through the crystal is at a maximum, so the

crystal in its series-resonant mode.

DS100080-8

The value of R₁and R₂are equal so that the comparator will

switch symmetrically about +V_cc/2. The RC constant of R₃

and C₁is set to be several times greater than the period of

the oscillating frequency, insuring a 50% duty cycle by main-

taining a DC voltage at the inverting input equal to the abso-

lute average of the output waveform.

When specifying the crystal, be sure to order series resonant

with the desired temperature coefficient

DS100080-24

FIGURE 5. Squarewave Oscillator

To analyze the circuit, assume that the output is initially high.

For this to be true, the voltage at the inverting input V_chas to

be less than the voltage at the non-inverting input V_a. For V_c

to be low, the capacitor C₁has to be discharged and will

charge up through the negative feedback resistor R₄. When

it has charged up to value equal to the voltage at the positive

input V_a1, the comparator output will switch.

V_a1will be given by:

If:

Then:

R₁R₂R₃

V_a12V_cc/3

DS100080-7

When the output switches to ground, the value of V_ais re-

duced by the hysteresis network to a value given by:

FIGURE 6. Crystal controlled Oscillator

V_a2V_cc/3

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These terms will have a slight error due to the fact that V_max

is not exactly equal to 2/3 V_CCbut is actually reduced by the

diode drop to:

Application Circuits (Continued)

Pulse generator with variable duty cycle:

The pulse generator with variable duty cycle is just a minor

modification of the basic square wave generator. Providing a

separate charge and discharge path for capacitor C₁gener-

ates a variable duty cycle. One path, through R₂and D₂will

charge the capacitor and set the pulse width (t₁). The other

path, R₁and D₁will discharge the capacitor and set the time

between pulses (t₂).

By varying resistor R₁, the time between pulses of the gen-

erator can be changed without changing the pulse width.

Similarly, by varying R₂, the pulse width will be altered with-

out affecting the time between pulses. Both controls will

change the frequency of the generator. The pulse width and

time between pulses can be found from:

Positive Peak Detector:

Positive peak detector is basically the comparator operated

as a unit gain follower with a large holding capacitor from the

output to ground. Additional transistor is added to the output

to provide a low impedance current source. When the output

of the comparator goes high, current is passed through the

transistor to charge up the capacitor. The only discharge

path will be the 1M ohm resistor shunting C1 and any load

that is connected to the output. The decay time can be al-

tered simply by changing the 1M ohm resistor. The output

should be used through a high impedance follower to a avoid

loading the output of the peak detector.

DS100080-9

FIGURE 7. Pulse Generator

DS100080-17

FIGURE 8. Positive Peak Detector

Negative Peak Detector:

For the negative detector, the output transistor of the com-

parator acts as a low impedance current sink. The only dis-

charge path will be the 1 MΩ resistor and any load imped-

ance used. Decay time is changed by varying the 1 MΩ

resistor

Solving these equations for t₁and t₂

DS100080-18

t₁R₄C₁ln2

FIGURE 9. Negative Peak Detector

t₂R₅C₁ln2

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Application Circuits (Continued)

Driving CMOS and TTL

The comparator’s output is capable of driving CMOS and

TTL Logic circuits.

DS100080-5

DS100080-11

FIGURE 10. Driving CMOS

FIGURE 12. AND Gate

OR Gates

A three input OR gate is achieved from the basic AND gate

simply by increasing the resistor value connected from the

inverting input to V_cc, thereby reducing the reference volt-

age.

A logic ″1″ at any of the inputs will produce a logic ″1″ at the

output.

DS100080-6

FIGURE 11. Driving TTL

AND Gates

The comparator can be used as three input AND gate. The

operation of the gate is as follow:

The resistor divider at the inverting input establishes a refer-

ence voltage at that node. The non-inverting input is the sum

of the voltages at the inputs divided by the voltage dividers.

The output will go high only when all three inputs are high,

casing the voltage at the non-inverting input to go above that

at inverting input. The circuit values shown work for a ″0″

equal to ground and a ″1″ equal to 5V.

The resistor values can be altered if different logic levels are

desired. If more inputs are required, diodes are recom-

mended to improve the voltage margin when all but one of

the inputs are high.

DS100080-10

FIGURE 13. OR Gate

ORing the Output

By the inherit nature of an open collector comparator, the

outputs of several comparators can be tied together with a

pull up resistor to V_cc. If one or more of the comparators out-

puts goes low, the output V_owill go low.

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Application Circuits (Continued)

DS100080-12

FIGURE 14. ORing the Outputs

DS100080-13

FIGURE 15. Large Fan-In AND Gate

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SC70-5 Tape and Reel Specification

DS100080-44

SOT-23-5 Tape and Reel Specification

TAPE FORMAT

Tape Section

Leader

# Cavities

0 (min)

75 (min)

3000

Cavity Status

Empty

Cover Tape Status

Sealed

(Start End)

Carrier

Empty

Sealed

Filled

Sealed

250

Filled

Sealed

Trailer

125 (min)

0 (min)

Empty

Sealed

(Hub End)

Empty

Sealed

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SOT-23-5 Tape and Reel Specification (Continued)

TAPE DIMENSIONS

DS100080-45

0.315 0.012

8 mm

0.130

(3.3)

0.124

(3.15)

0.130

(3.3)

0.126

(3.2)

0.138 0.002

0.055 0.004

0.157

(4)

(3.5 0.05)

(1.4 0.11)

(8 0.3)

Tape Size

DIM A

DIM Ao

DIM B

DIM Bo

DIM F

DIM Ko

DIM P1

DIM W

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SOT-23-5 Tape and Reel Specification (Continued)

REEL DIMENSIONS

DS100080-46

8 mm

7.00 0.059 0.512 0.795 2.165 0.331 + 0.059/−0.000 0.567

W1+ 0.078/−0.039

330.00 1.50 13.00 20.20 55.00

8.40 + 1.50/−0.00

14.40

W1 + 2.00/−1.00

Tape Size

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Physical Dimensions inches (millimeters) unless otherwise noted

5-Pin SC70-5 Tape and Reel

Order Number LMV331M7 and LMV331M7X

NS Package Number MAA05A

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