LMH6626 [NSC]
Single/Dual Ultra Low Noise Wideband Operational Amplifier; 单/双超低噪声宽带运算放大器
| 型号： | LMH6626 |
| 厂家： | 
National Semiconductor |
| 描述： | Single/Dual Ultra Low Noise Wideband Operational Amplifier |
| 文件： | 总19页 (文件大小：1348K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
September 2005
LMH6624/LMH6626
Single/Dual Ultra Low Noise Wideband Operational
Amplifier
General Description
The LMH6624/LMH6626 offer wide bandwidth (1.5GHz for
single, 1.3GHz for dual) with very low input noise (0.92nV/
Features
VS
=
6V, TA = 25˚C, AV = 20, (Typical values unless
specified)
, 2.3pA/
) and ultra low dc errors (100µV VOS,
n Gain bandwidth (LMH6624)
n Input voltage noise
n Input offset voltage (limit over temp)
n Slew rate
1.5GHz
0.92nV/
0.1µV/˚C drift) providing very precise operational amplifiers
with wide dynamic range. This enables the user to achieve
closed-loop gains of greater than 10, in both inverting and
non-inverting configurations.
700uV
350V/µs
400V/µs
−63dBc
−80dBc
n Slew rate (AV = 10)
The LMH6624 (single) and LMH6626’s (dual) traditional volt-
age feedback topology provide the following benefits: bal-
anced inputs, low offset voltage and offset current, very low
offset drift, 81dB open loop gain, 95dB common mode rejec-
tion ratio, and 88dB power supply rejection ratio.
@
n HD2 f = 10MHz, RL = 100Ω
@
n HD3 f = 10MHz, RL = 100Ω
n Supply voltage range (dual supply)
n Supply voltage range (single supply)
n Improved replacement for the CLC425
n Stable for closed loop |AV| ≥ 10
2.5V to 6V
+5V to +12V
(LMH6624)
The LMH6624/LMH6626 operate from
dual supply mode and from +5V to +12V in single supply
configuration.
2.5V to
6V in
Applications
LMH6624 is offered in SOT23-5 and SOIC-8 packages.
The LMH6626 is offered in SOIC-8 and MSOP-8 packages.
n Instrumentation sense amplifiers
n Ultrasound pre-amps
n Magnetic tape & disk pre-amps
n Wide band active filters
n Professional Audio Systems
n Opto-electronics
n Medical diagnostic systems
Connection Diagrams
5-Pin SOT23
8−Pin SOIC
8−Pin SOIC/MSOP
20058961
20058952
20058951
Top View
Top View
Top View
© 2005 National Semiconductor Corporation
DS200589
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Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Wave Soldering (10 sec.)
260˚C
−65˚C to +150˚C
+150˚C
Storage Temperature Range
Junction Temperature (Note 3), (Note 4)
ESD Tolerance
Operating Ratings (Note 1)
Operating Temperature Range
Human Body Model
Machine Model
2000V (Note 2)
200V (Note 9)
1.2V
(Note 3), (Note 4)
−40˚C to +125˚C
VIN Differential
Package Thermal Resistance (θJA)(Note 4)
Supply Voltage (V+ - V−)
Voltage at Input pins
Soldering Information
Infrared or Convection (20 sec.)
13.2V
V+ +0.5V, V− −0.5V
SOIC-8
166˚C/W
265˚C/W
235˚C/W
SOT23–5
MSOP-8
235˚C
2.5V Electrical Characteristics
Unless otherwise specified, all limits guaranteed at TA = 25˚C, V+ = 2.5V, V− = −2.5V, VCM = 0V, AV = +20, RF = 500Ω, RL
100Ω. Boldface limits apply at the temperature extremes. See (Note 12).
=
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Note 6)
(Note 5)
(Note 6)
Dynamic Performance
fCL
SR
−3dB BW
VO = 400mVPP (LMH6624)
90
80
MHz
V/µs
VO = 400mVPP (LMH6626)
Slew Rate(Note 8)
VO = 2VPP, AV = +20 (LMH6624)
VO = 2VPP, AV = +20 (LMH6626)
VO = 2VPP, AV = +10 (LMH6624)
VO = 2VPP, AV = +10 (LMH6626)
VO = 400mV Step, 10% to 90%
VO = 400mV Step, 10% to 90%
VO = 2VPP (Step)
300
290
360
340
4.1
4.1
20
tr
tf
Rise Time
ns
ns
ns
Fall Time
ts
Settling Time 0.1%
Distortion and Noise Response
en
in
Input Referred Voltage Noise
f = 1MHz (LMH6624)
0.92
1.0
nV/
pA/
dBc
f = 1MHz (LMH6626)
Input Referred Current Noise
f = 1MHz (LMH6624)
2.3
f = 1MHz (LMH6626)
1.8
HD2
HD3
2nd Harmonic Distortion
3rd Harmonic Distortion
fC = 10MHz, VO = 1VPP, RL 100Ω
fC = 10MHz, VO = 1VPP, RL 100Ω
−60
−76
dBc
Input Characteristics
VOS
IOS
IB
Input Offset Voltage
VCM = 0V
−0.75
−0.25
+0.75
mV
−0.95
+0.95
Average Drift (Note 7)
Input Offset Current
VCM = 0V
VCM = 0V
0.25
µV/˚C
µA
−1.5
−0.05
+1.5
−2.0
+2.0
Average Drift (Note 7)
Input Bias Current
VCM = 0V
VCM = 0V
2
nA/˚C
µA
13
+20
+25
Average Drift (Note 7)
VCM = 0V
12
6.6
4.6
0.9
2.0
nA/˚C
MΩ
kΩ
RIN
Input Resistance (Note 10)
Common Mode
Differential Mode
Common Mode
Differential Mode
Input Referred,
CIN
Input Capacitance (Note 10)
pF
CMRR
Common Mode Rejection
Ratio
dB
VCM = −0.5 to +1.9V
VCM = −0.5 to +1.75V
87
90
85
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2
2.5V Electrical Characteristics (Continued)
Unless otherwise specified, all limits guaranteed at TA = 25˚C, V+ = 2.5V, V− = −2.5V, VCM = 0V, AV = +20, RF = 500Ω, RL
100Ω. Boldface limits apply at the temperature extremes. See (Note 12).
=
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Note 6)
(Note 5)
(Note 6)
Transfer Characteristics
AVOL Large Signal Voltage Gain
(LMH6624)
75
70
72
67
79
79
RL = 100Ω, VO = −1V to +1V
(LMH6626)
dB
dB
RL = 100Ω, VO = −1V to +1V
f = 1MHz (LMH6626)
Xt
Crosstalk Rejection
−75
1.5
1.7
Output Characteristics
VO
Output Swing
RL = 100Ω
1.1
1.0
V
No Load
1.4
1.25
RO
ISC
Output Impedance
f ≤ 100KHz
10
mΩ
Output Short Circuit Current
(LMH6624)
90
145
Sourcing to Ground
∆VIN = 200mV (Note 3), (Note 11)
(LMH6624)
75
90
145
120
120
100
75
Sinking to Ground
∆VIN = −200mV (Note 3), (Note 11)
(LMH6626)
75
mA
60
Sourcing to Ground
∆VIN = 200mV (Note 3),(Note 11)
(LMH6626)
50
60
Sinking to Ground
∆VIN = −200mV (Note 3),(Note 11)
(LMH6624)
50
IOUT
Output Current
Sourcing, VO = +0.8V
Sinking, VO = −0.8V
(LMH6626)
mA
Sourcing, VO = +0.8V
Sinking, VO = −0.8V
Power Supply
PSRR
Power Supply Rejection Ratio VS
=
2.0V to 3.0V
82
90
dB
80
IS
Supply Current (per channel) No Load
11.4
16
mA
18
6V Electrical Characteristics
Unless otherwise specified, all limits guaranteed at TA = 25˚C, V+ = 6V, V− = −6V, VCM = 0V, AV = +20, RF = 500Ω, RL
100Ω. Boldface limits apply at the temperature extremes. See (Note 12).
=
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Note 6)
(Note 5)
(Note 6)
Dynamic Performance
fCL
SR
−3dB BW
VO = 400mVPP (LMH6624)
95
85
MHz
V/µs
VO = 400mVPP (LMH6626)
Slew Rate (Note 8)
VO = 2VPP, AV = +20 (LMH6624)
VO = 2VPP, AV = +20 (LMH6626)
VO = 2VPP, AV = +10 (LMH6624)
VO = 2VPP, AV = +10 (LMH6626)
VO = 400mV Step, 10% to 90%
350
320
400
360
3.7
tr
Rise Time
ns
3
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6V Electrical Characteristics (Continued)
Unless otherwise specified, all limits guaranteed at TA = 25˚C, V+ = 6V, V− = −6V, VCM = 0V, AV = +20, RF = 500Ω, RL
100Ω. Boldface limits apply at the temperature extremes. See (Note 12).
=
Symbol
Parameter
Conditions
Min
(Note 6)
Typ
(Note 5)
3.7
Max
(Note 6)
Units
tf
ts
Distortion and Noise Response
Fall Time
VO = 400mV Step, 10% to 90%
VO = 2VPP (Step)
ns
ns
Settling Time 0.1%
18
en
Input Referred Voltage Noise
f = 1MHz (LMH6624)
0.92
1.0
nV/
pA/
dBc
f = 1MHz (LMH6626)
in
Input Referred Current Noise
f = 1MHz (LMH6624)
2.3
f = 1MHz (LMH6626)
1.8
HD2
HD3
2nd Harmonic Distortion
3rd Harmonic Distortion
fC = 10MHz, VO = 1VPP, RL 100Ω
fC = 10MHz, VO = 1VPP, RL 100Ω
−63
−80
dBc
Input Characteristics
VOS Input Offset Voltage
VCM = 0V
−0.5
0.10
+0.5
mV
−0.7
+0.7
Average Drift (Note 7)
Input Offset Current Average
Drift (Note 7)
VCM = 0V
(LMH6624)
VCM = 0V
(LMH6626)
VCM = 0V
VCM = 0V
VCM = 0V
0.2
µV/˚C
µA
IOS
−1.1
−2.5
−2.0
−2.5
0.05
1.1
2.5
2.0
2.5
0.1
0.7
13
nA/˚C
µA
IB
Input Bias Current
+20
+25
Average Drift (Note 7)
VCM = 0V
12
6.6
4.6
0.9
2.0
nA/˚C
MΩ
RIN
Input Resistance (Note 10)
Common Mode
Differential Mode
Common Mode
Differential Mode
Input Referred,
kΩ
CIN
Input Capacitance (Note 10)
pF
dB
CMRR
Common Mode Rejection
Ratio
VCM = −4.5 to +5.25V
VCM = −4.5 to +5.0V
90
95
87
Transfer Characteristics
AVOL Large Signal Voltage Gain
(LMH6624)
77
72
74
70
81
80
RL = 100Ω, VO = −3V to +3V
(LMH6626)
dB
dB
RL = 100Ω, VO = −3V to +3V
f = 1MHz (LMH6626)
Xt
Crosstalk Rejection
−75
4.9
5.2
4.8
5.2
10
Output Characteristics
VO
Output Swing
(LMH6624)
RL = 100Ω
(LMH6624)
No Load
4.4
4.3
4.8
4.65
4.3
V
(LMH6626)
RL = 100Ω
(LMH6626)
No Load
4.2
4.8
4.65
RO
Output Impedance
f ≤ 100KHz
mΩ
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4
6V Electrical Characteristics (Continued)
Unless otherwise specified, all limits guaranteed at TA = 25˚C, V+ = 6V, V− = −6V, VCM = 0V, AV = +20, RF = 500Ω, RL
100Ω. Boldface limits apply at the temperature extremes. See (Note 12).
=
Symbol
Parameter
Conditions
Min
(Note 6)
100
Typ
(Note 5)
156
Max
(Note 6)
Units
ISC
Output Short Circuit Current
(LMH6624)
Sourcing to Ground
∆VIN = 200mV (Note 3), (Note 11)
(LMH6624)
85
100
156
120
120
100
80
Sinking to Ground
85
∆VIN = −200mV (Note 3), (Note 11)
(LMH6626)
mA
65
Sourcing to Ground
∆VIN = 200mV (Note 3), (Note 11)
(LMH6626)
55
65
Sinking to Ground
55
∆VIN = −200mV (Note 3), (Note 11)
(LMH6624)
IOUT
Output Current
Sourcing, VO = +4.3V
Sinking, VO = −4.3V
(LMH6626)
mA
Sourcing, VO = +4.3V
Sinking, VO = −4.3V
Power Supply
PSRR
Power Supply Rejection Ratio VS
=
5.4V to 6.6V
82
88
12
dB
80
IS
Supply Current (per channel) No Load
16
mA
18
Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.
Note 2: Human body model, 1.5kΩ in series with 100pF.
Note 3: Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the
maximum allowed junction temperature of 150˚C.
Note 4: The maximum power dissipation is a function of T
, θ , and T . The maximum allowable power dissipation at any ambient temperature is
JA A
J(MAX)
P
= (T
- T )/ θ . All numbers apply for packages soldered directly onto a PC board.
D
J(MAX) A JA
Note 5: Typical Values represent the most likely parametric norm.
Note 6: All limits are guaranteed by testing or statistical analysis.
Note 7: Average drift is determined by dividing the change in parameter at temperature extremes into the total temperature change.
Note 8: Slew rate is the slowest of the rising and falling slew rates.
Note 9: Machine Model, 0Ω in series with 200pF.
Note 10: Simulation results.
Note 11: Short circuit test is a momentary test. Output short circuit duration is 1.5ms.
Note 12: Electrical table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of
>
the device such that T = T . No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where T
Absolute maximum ratings indicate junction temperature limits beyond which the device may be permanently degraded, either mechanically or electrically.
T .
A
J
A
J
Ordering Information
Package
Part Number
LMH6624MF
LMH6624MFX
LMH6624MA
LMH6624MAX
LMH6626MA
LMH6626MAX
LMH6626MM
LMH6626MMX
Package Marking
Transport Media
1k Units Tape and Reel
3k Units Tape and Reel
95 Units/Rail
NSC Drawing
SOT23-5
A94A
MF05A
SOIC-8
SOIC-8
MSOP-8
LMH6624MA
LMH6626MA
A98A
M08A
M08A
2.5k Units Tape and Reel
95 Units/Rail
2.5k Units Tape and Reel
1k Units Tape and Reel
3.5k Units Tape and Reel
MUA08A
5
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Typical Performance Characteristics
Voltage Noise vs. Frequency
Current Noise vs. Frequency
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20058963
Inverting Frequency Response
Inverting Frequency Response
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20058988
Non-Inverting Frequency Response
Non-Inverting Frequency Response
20058904
20058903
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6
Typical Performance Characteristics (Continued)
Open Loop Frequency Response Over Temperature
Open Loop Frequency Response Over Temperature
20058964
20058966
Frequency Response with Cap. Loading
Frequency Response with Cap. Loading
20058984
20058986
Frequency Response with Cap. Loading
Frequency Response with Cap. Loading
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20058985
7
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Typical Performance Characteristics (Continued)
Non-Inverting Frequency Response Varying VIN
Non-Inverting Frequency Response Varying VIN
20058906
20058905
Non-Inverting Frequency Response Varying VIN
(LMH6624)
Non-Inverting Frequency Response Varying VIN
(LMH6626)
20058908
20058981
Non-Inverting Frequency Response Varying VIN
(LMH6624)
Non-Inverting Frequency Response Varying VIN
(LMH6626)
20058907
20058980
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8
Typical Performance Characteristics (Continued)
Sourcing Current vs. VOUT (LMH6624)
Sourcing Current vs. VOUT (LMH6626)
20058957
20058972
Sourcing Current vs. VOUT (LMH6624)
Sourcing Current vs. VOUT (LMH6626)
20058954
20058969
VOS vs. VSUPPLY (LMH6624)
VOS vs. VSUPPLY (LMH6626)
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20058968
9
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Typical Performance Characteristics (Continued)
Sinking Current vs. VOUT (LMH6624)
Sinking Current vs. VOUT (LMH6626)
20058958
20058971
Sinking Current vs. VOUT (LMH6624)
Sinking Current vs. VOUT (LMH6626)
20058956
20058970
IOS vs. VSUPPLY
Crosstalk Rejection vs. Frequency (LMH6626)
20058979
20058953
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10
Typical Performance Characteristics (Continued)
Distortion vs. Frequency
Distortion vs. Frequency
20058944
20058946
Distortion vs. Frequency
Distortion vs. Gain
20058945
20058978
Distortion vs. VOUT Peak to Peak
Distortion vs. VOUT Peak to Peak
20058943
20058977
11
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Typical Performance Characteristics (Continued)
Non-Inverting Large Signal Pulse Response
Non-Inverting Large Signal Pulse Response
20058973
20058974
Non-Inverting Small Signal Pulse Response
Non-Inverting Small Signal Pulse Response
20058975
20058976
PSRR vs. Frequency
PSRR vs. Frequency
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20058949
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12
Typical Performance Characteristics (Continued)
Input Referred CMRR vs. Frequency
Input Referred CMRR vs. Frequency
20058901
20058902
Amplifier Peaking with Varying RF
Amplifier Peaking with Varying RF
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20058983
13
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Application Section
20058919
20058918
FIGURE 2. Inverting Amplifier Configuration
FIGURE 1. Non-Inverting Amplifier Configuration
INTRODUCTION
TOTAL INPUT NOISE vs. SOURCE RESISTANCE
To determine maximum signal-to-noise ratios from the
LMH6624/LMH6626, an understanding of the interaction be-
tween the amplifier’s intrinsic noise sources and the noise
arising from its external resistors is necessary.
The LMH6624/LMH6626 are very wide gain bandwidth, ultra
low noise voltage feedback operational amplifiers. Their ex-
cellent performances enable applications such as medical
diagnostic ultrasound, magnetic tape & disk storage and
fiber-optics to achieve maximum high frequency signal-to-
noise ratios. The set of characteristic plots in the "Typical
Performance" section illustrates many of the performance
trade offs. The following discussion will enable the proper
selection of external components to achieve optimum sys-
tem performance.
Figure 3 describes the noise model for the non-inverting
amplifier configuration showing all noise sources. In addition
to the intrinsic input voltage noise (en) and current noise
+
(in = in = in−) source, there is also thermal voltage noise
√
(et = (4KTR)) associated with each of the external resistors.
Equation 1 provides the general form for total equivalent
input voltage noise density (eni). Equation 2 is a simplifica-
tion of Equation 1 that assumes
BIAS CURRENT CANCELLATION
To cancel the bias current errors of the non-inverting con-
figuration, the parallel combination of the gain setting (Rg)
and feedback (Rf) resistors should equal the equivalent
source resistance (Rseq) as defined in Figure 1. Combining
this constraint with the non-inverting gain equation also seen
in Figure 1, allows both Rf and Rg to be determined explicitly
from the following equations:
Rf = AVRseq and Rg = Rf/(AV-1)
When driven from a 0Ω source, such as the output of an op
amp, the non-inverting input of the LMH6624/LMH6626
should be isolated with at least a 25Ω series resistor.
As seen in Figure 2, bias current cancellation is accom-
plished for the inverting configuration by placing a resistor
(Rb) on the non-inverting input equal in value to the resis-
tance seen by the inverting input (Rf||(Rg+Rs)). Rb should to
be no less than 25Ω for optimum LMH6624/LMH6626 per-
formance. A shunt capacitor can minimize the additional
noise of Rb.
20058920
FIGURE 3. Non-Inverting Amplifier Noise Model
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14
Rf||Rg should be as low as possible to minimize noise.
Results similar to Equation 1 are obtained for the inverting
configuration of Figure 2 if Rseq is replaced by Rb and Rg is
replaced by Rg + Rs. With these substitutions, Equation 1 will
yield an eni referred to the non-inverting input. Referring eni
to the inverting input is easily accomplished by multiplying
eni by the ratio of non-inverting to inverting gains.
Application Section (Continued)
(1)
Rf||Rg = Rseq for bias current cancellation. Figure 4 illustrates
the equivalent noise model using this assumption. Figure 5
is a plot of eni against equivalent source resistance (Rseq
)
NOISE FIGURE
with all of the contributing voltage noise source of Equation
2. This plot gives the expected eni for a given (Rseq) which
assumes Rf||Rg = Rseq for bias current cancellation. The total
equivalent output voltage noise (eno) is eni*AV.
Noise Figure (NF) is a measure of the noise degradation
caused by an amplifier.
(3)
The Noise Figure formula is shown in Equation 3. The addi-
tion of a terminating resistor RT, reduces the external ther-
mal noise but increases the resulting NF. The NF is in-
creased because RT reduces the input signal amplitude thus
reducing the input SNR.
20058921
FIGURE 4. Noise Model with Rf||Rg = Rseq
(4)
The noise figure is related to the equivalent source resis-
tance (Rseq) and the parallel combination of Rf and Rg. To
minimize noise figure.
(2)
As seen in Figure 5, eni is dominated by the intrinsic voltage
noise (en) of the amplifier for equivalent source resistances
below 33.5Ω. Between 33.5Ω and 6.43kΩ, eni is dominated
•
•
Minimize Rf||Rg
Choose the Optimum RS (ROPT
)
√
(4kT(2Rseq)) of the external
by the thermal noise (et
=
ROPT is the point at which the NF curve reaches a minimum
and is approximated by:
resistor. Above 6.43kΩ, eni is dominated by the amplifier’s
√
(2) inRseq). When Rseq = 464Ω (ie.,
current noise (in
=
ROPT ≈ en/in
√
en/ (2) in) the contribution from voltage noise and current
noise of LMH6624/LMH6626 is equal.. For example, config-
ured with a gain of +20V/V giving a −3dB of 90MHz and
driven from Rseq = 25Ω, the LMH6624 produces a total
SINGLE SUPPLY OPERATION
The LMH6624/LMH6626 can be operated with single power
supply as shown in Figure 6. Both the input and output are
capacitively coupled to set the DC operating point.
equivalent input noise voltage (eni
16.5µVrms
x
1.57*90MHz) of
.
20058926
20058922
FIGURE 6. Single Supply Operation
FIGURE 5. Voltage Noise Density vs. Source
Resistance
LOW NOISE TRANSIMPEDANCE AMPLIFIER
Figure 7 implements a low-noise transimpedance amplifier
commonly used with photo-diodes. The transimpedance
gain is set by Rf. Equation 4 provides the total input current
If bias current cancellation is not a requirement, then Rf||Rg
need not equal Rseq. In this case, according to Equation 1,
15
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Application Section (Continued)
noise density (ini) equation for the basic transimpedance
configuration and is plotted against feedback resistance (Rf)
showing all contributing noise sources in Figure 8. This plot
indicates the expected total equivalent input current noise
density (ini) for a given feedback resistance (Rf). The total
equivalent output voltage noise density (eno) is ini*Rf.
20058929
FIGURE 9. Low Noise Integrator
HIGH-GAIN SALLEN-KEY ACTIVE FILTERS
20058927
The LMH6624/LMH6626 are well suited for high gain Sallen-
Key type of active filters. Figure 10 shows the 2nd order
Sallen-Key low pass filter topology. Using component predis-
tortion methods discussed in OA-21 enables the proper
selection of components for these high-frequency filters.
FIGURE 7. Transimpedance Amplifier Configuration
20058930
20058928
FIGURE 10. Sallen-Key Active Filter Topology
FIGURE 8. Current Noise Density vs. Feedback
Resistance
LOW NOISE MAGNETIC MEDIA EQUALIZER
The LMH6624/LMH6626 implement a high-performance low
noise equalizer for such application as magnetic tape chan-
nels as shown in Figure 11. The circuit combines an integra-
tor with a bandpass filter to produce the low noise equaliza-
tion. The circuit’s simulated frequency response is illustrated
in Figure 12.
(5)
LOW NOISE INTEGRATOR
The LMH6624/LMH6626 implement a deBoo integrator
shown in Figure 9. Positive feedback maintains integration
linearity. The LMH6624/LMH6626’s low input offset voltage
and matched inputs allow bias current cancellation and pro-
vide for very precise integration. Keeping RG and RS low
helps maintain dynamic stability.
www.national.com
16
the PCB layout is mandatory. Generally, a good high fre-
quency layout exhibits a separation of power supply and
ground traces from the inverting input and output pins. Para-
sitic capacitances between these nodes and ground may
cause frequency response peaking and possible circuit os-
cillations (see Application Note OA-15 for more information).
Use high quality chip capacitors with values in the range of
1000pF to 0.1F for power supply bypassing. One terminal of
each chip capacitor is connected to the ground plane and the
other terminal is connected to a point that is as close as
possible to each supply pin as allowed by the manufacturer’s
design rules. In addition, connect a tantalum capacitor with a
value between 4.7µF and 10µF in parallel with the chip
capacitor. Signal lines connecting the feedback and gain
resistors should be as short as possible to minimize induc-
tance and microstrip line effect. Place input and output ter-
mination resistors as close as possible to the input/output
pins. Traces greater than 1 inch in length should be imped-
ance matched to the corresponding load termination.
Application Section (Continued)
20058931
FIGURE 11. Noise Magnetic Media Equalizer
Symmetry between the positive and negative paths in the
layout of differential circuitry should be maintained to mini-
mize the imbalance of amplitude and phase of the differential
signal.
These free evaluation boards are shipped when a device
sample request is placed with National Semiconductor.
Component value selection is another important parameter
in working with high speed/high performance amplifiers.
Choosing external resistors that are large in value compared
to the value of other critical components will affect the closed
loop behavior of the stage because of the interaction of
these resistors with parasitic capacitances. These parasitic
capacitors could either be inherent to the device or be a
by-product of the board layout and component placement.
Moreover, a large resistor will also add more thermal noise to
the signal path. Either way, keeping the resistor values low
will diminish this interaction. On the other hand, choosing
very low value resistors could load down nodes and will
contribute to higher overall power dissipation and high dis-
tortion.
20058932
FIGURE 12. Equalizer Frequency Response
Device
Package
Evaluation Board Part
Number
LAYOUT CONSIDERATION
LMH6624MF
SOT23–5
CLC730216
National Semiconductor suggests the copper patterns on the
evaluation boards listed below as a guide for high frequency
layout. These boards are also useful as an aid in device
testing and characterization. As is the case with all high-
speed amplifiers, accepted-practice RF design technique on
LMH6624MA SOIC-8
LMH6626MA SOIC-8
LMH6626MM MSOP-8
CLC730227
CLC730036
CLC730123
17
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Physical Dimensions inches (millimeters) unless otherwise noted
5-Pin SOT23
NS Package Number MF05A
8-Pin SOIC
NS Package Number M08A
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18
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
8-Pin MSOP
NS Package Number MUA08A
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves
the right at any time without notice to change said circuitry and specifications.
For the most current product information visit us at www.national.com.
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(b) support or sustain life, and whose failure to perform when
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相关型号：
LMH6628
DUAL WIDEBAND, LOW-NOISE, VOLTAGE FEEDBACK OP AMP, GUARANTEED TO 300k rd (si) TESTED TO MIL-STD-883, METHOD 1019
NSC
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