LM3208TLX [NSC]
650mA Miniature, Adjustable, Step-Down DC-DC Converter for RF Power Amplifiers; 650毫安微型，可调节，降压型DC -DC转换器，用于射频功率放大器
| 型号： | LM3208TLX |
| 厂家： | 
National Semiconductor |
| 描述： | 650mA Miniature, Adjustable, Step-Down DC-DC Converter for RF Power Amplifiers |
| 文件： | 总17页 (文件大小：1651K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
April 2006
LM3208
650mA Miniature, Adjustable, Step-Down DC-DC
Converter for RF Power Amplifiers
General Description
Features
n 2 MHz (typ.) PWM Switching Frequency
The LM3208 is a DC-DC converter optimized for powering
RF power amplifiers (PAs) from a single Lithium-Ion cell.
However, it may be used in many other applications. It steps
down an input voltage in the range from 2.7V to 5.5V to an
adjustable output voltage of 0.8V to 3.6V. Output voltage is
set by using a VCON analog input to control power levels and
efficiency of the RF PA.
n Operates from a single Li-Ion cell (2.7V to 5.5V)
n Adjustable Output Voltage (0.8V to 3.6V)
n Fast Output Voltage Transient (0.8V to 3.4V in 25µs
typ.)
n 650mA Maximum load capability
n High Efficiency (95% typ. at 3.9VIN, 3.4VOUT at 400mA)
n 8-pin micro SMD Package
The LM3208 offers superior performance for mobile phones
and similar RF PA applications. Fixed-frequency PWM op-
eration minimizes RF interference. A shutdown function turns
the device off and reduces battery consumption to 0.01 µA
(typ.).
n Current Overload Protection
n Thermal Overload Protection
Applications
n Cellular Phones
n Hand-Held Radios
n RF PC Cards
The LM3208 is available in an 8-pin lead-free micro SMD
package. A high switching frequency (2 MHz typ.) allows use
of tiny surface-mount components. Only three small external
surface-mount components, an inductor and two ceramic
capacitors, are required.
n Battery Powered RF Devices
Typical Application
20166301
FIGURE 1. LM3208 Typical Application
© 2006 National Semiconductor Corporation
DS201663
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Connection Diagrams
20166399
8–Bump Thin Micro SMD Package, Large Bump
NS Package Number TLA08GNA
Order Information
Order Number
LM3208TL
Package Marking (Note)
XVS/33
Supplied As
250 units, Tape-and-Reel
LM3208TLX
XVS/33
3000 units, Tape-and-Reel
Note: The actual physical placement of the package marking will vary from part to part. The package marking “X” designates the date
code. “V” is a NSC internal code for die traceability. Both will vary in production. “S” designates device type as switcher and “33” identifies
the device (part number).
Pin Descriptions
Pin #
Name
PVIN
VDD
Description
Power Supply Voltage Input to the internal PFET switch.
Analog Supply Input.
A1
B1
C1
C2
C3
B3
EN
Enable Input. Set this digital input high for normal operation. For shutdown, set this pin low.
Voltage Control Analog input. VCON controls VOUT in PWM mode.
Feedback Analog Input. Connect to the output at the output filter capacitor.
Analog and Control Ground
VCON
FB
SGND
PGND
SW
A3
Power Ground
A2
Switch node connection to the internal PFET switch and NFET synchronous rectifier.
Connect to an inductor with a saturation current rating that exceeds the maximum Switch Peak
Current Limit specification of the LM3208.
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2
Absolute Maximum Ratings (Notes 1, 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
ESD Rating (Notes 4, 13)
Human Body Model:
Machine Model:
2kV
200V
VDD, PVIN to SGND
PGND to SGND
EN, FB, VCON
−0.2V to +6.0V
−0.2V to +0.2V
(SGND −0.2V)
to (VDD +0.2V)
w/6.0V max
Operating Ratings (Notes 1, 2)
Input Voltage Range
2.7V to 5.5V
Recommended Load Current
0mA to 650mA
Junction Temperature (TJ) Range
Ambient Temperature (TA) Range
(Note 5)
−30˚C to +125˚C
−30˚C to +85˚C
SW
(PGND −0.2V)
to (PVIN +0.2V)
w/6.0V max
PVIN to VDD
−0.2V to +0.2V
Thermal Properties
Junction-to-Ambient Thermal
Resistance (θJA), TLA08 Package
(Note 6)
Continuous Power Dissipation
(Note 3)
100˚C/W
Internally Limited
+150˚C
Junction Temperature (TJ-MAX
Storage Temperature Range
Maximum Lead Temperature
(Soldering, 10 sec)
)
−65˚C to +150˚C
+260˚C
Electrical Characteristics (Notes 2, 7, 8) Limits in standard typeface are for TA = TJ = 25˚C. Limits in bold-
face type apply over the full operating ambient temperature range (−30˚C ≤ TA = TJ ≤ +85˚C). Unless otherwise noted, all
specifications apply to the LM3208 with: PVIN = VDD = EN = 3.6V.
Symbol
Parameter
Conditions
Min
Typ
Max
0.85
Units
VFB, MIN Feedback Voltage at minimum VCON = 0.32V(Note 8)
0.75
0.80
V
setting
VFB, MAX Feedback Voltage at maximum VCON = 1.44V, VIN = 4.2V(Note 8)
setting
3.537
3.600
0.01
0.6
3.683
2
V
ISHDN
Shutdown supply current
EN = SW = VCON = 0V,
(Note 9)
µA
IQ
DC bias current into VDD
VCON = 0V, FB = 0V,
No Switching (Note 10)
ISW = 200mA, VCON = 0.5V
0.7
mA
mΩ
mΩ
mΩ
mA
mA
RDSON(P) Pin-pin resistance for Large
PFET
180
140
210
RDSON(P) Pin-pin resistance for Small
PFET
ISW = 200mA, VCON = 0.32V
ISW = -200mA, VCON = 0.5V
VCON = 0.5V (Note 11)
960
RDSON(N) Pin-pin resistance for NFET
375
300
450
ILIM
Large PFET (L) Switch peak
985
650
1100
1200
(L_PFET) current limit
ILIM
Small PFET (S) Switch peak
VCON = 0.32V (Note 11)
800
2.0
900
2.2
(S_PFET) current limit
FOSC
Internal oscillator frequency
1.8
1.2
MHz
V
VIH,EN
VIL,EN
IPIN,EN
Logic high input threshold
Logic low input threshold
EN pin pull down current
0.5
10
V
5
µA
VCON,ON VCON Threshold for turning on
switches
0.15
V
ICON
Gain
VCON pin leakage current
VCON to VOUT Gain
VCON = 1.0V
1
µA
0.32V ≤ VCON ≤ 1.44V
2.5
V/V
3
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System Characteristics The following spec table entries are guaranteed by design providing the component
values in the typical application circuit are used (L = 3.0µH, DCR = 0.12Ω, FDK MIPW3226D3R0M; CIN = 10µF, 6.3V, 0805,
TDK C2012X5R0J106K; COUT = 4.7µF, 6.3V, 0603, TDK C1608X5R0J475M). These parameters are not guaranteed by
production testing. Min and Max values are specified over the ambient temperature range TA = −30˚C to 85˚C. Typical val-
ues are specified at PVIN = VDD = EN = 3.6V and TA = 25˚C unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
TRESPONSE Time for VOUT to rise from 0.8V VIN = 4.2V, RLOAD = 5.5Ω
to 3.4V (to reach 3.35V)
25
40
µs
Time for VOUT to fall from 3.4V VIN = 4.2V, RLOAD = 15Ω
to 0.8V
35
5
45
10
µs
pF
pF
V
CCON
CEN
VCON input capacitance
VCON = 1V, VIN=2.7V to 5.5V,
Test frequency = 100kHz
EN input capacitance
EN = 2V, VIN= 2.7V to 5.5V,
Test frequency = 100kHz
5
10
VCON
RDSON(P) management
threshold
Threshold for PFET RDSON(P) to change
from 960mΩ to 140mΩ
0.39
0.37
650
400
0.42
0.40
0.45
0.43
>
(S L)
VCON
RDSON(P) management
threshold
Threshold for PFET RDSON(P) to change
from 140mΩ to 960mΩ
V
>
(L S)
IOUT, MAX
Maximum Output Current
VIN = 2.7V to 5.5V, VCON = 0.45V to
1.44V, L = MIPW3226D3R0
VIN = 2.7V to 5.5V, VCON = 0.32V to
0.45V, L = MIPW3226D3R0
mA
mA
Linearity
TON
Linearity in control range 0.32V VIN = 3.9V (Note 14)
−3
+3
%
to 1.44V
Monotonic in nature
−50
+50
mV
Turn on time
EN = Low to High, VIN = 4.2V, VOUT
=
(time for output to reach 97% of 3.4V,
40
60
µs
final value after Enable low to
high transition)
IOUT ≤ 1mA
η
Efficiency
VIN = 3.6V, VOUT = 0.8V, IOUT = 90mA
VIN = 3.6V, VOUT = 1.5V, IOUT = 150mA
VIN = 3.9V, VOUT = 3.4V, IOUT = 400mA
VIN = 2.7V to 4.5V, VOUT = 0.8V to 3.4V,
81
89
95
%
%
%
V
OUT_ripple Ripple voltage at
>
no pulse skip condition
Differential voltage = VIN - VOUT 1V,
10
60
50
50
mVp-p
mVp-p
mVpk
IOUT = 0mA to 400mA (Note 12)
VIN = 5.5V to dropout, VOUT = 3.4V,
IOUT = 650mA (Note 12)
VIN = 3.6V to 4.2V,
Ripple voltage at
pulse skip condition
Line transient response
Line_tr
TR = TF = 10µs,
VOUT = 0.8V, IOUT = 100mA
VIN = 3.1/3.6/4.5V, VOUT = 0.8V,
IOUT = 50mA to 150mA
Load_tr
Load transient response
Maximum duty cycle
mVpk
%
Max Duty
cycle
100
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of
the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the
Electrical Characteristics tables.
Note 2: All voltages are with respect to the potential at the GND pins. The LM3208 is designed for mobile phone applications where turn-on after power-up is
controlled by the system controller and where requirements for a small package size overrule increased die size for internal Under Voltage Lock-Out (UVLO) circuitry.
Thus, it should be kept in shutdown by holding the EN pin low until the input voltage exceeds 2.7V.
Note 3: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at T = 150˚C (typ.) and disengages at T
=
J
J
125˚C (typ.).
Note 4: The Human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin. (MIL-STD-883 3015.7) The machine model is a 200pF
capacitor discharged directly into each pin.
Note 5: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be
de-rated. Maximum ambient temperature (T
) is dependent on the maximum operating junction temperature (T
= 125˚C), the maximum power
A-MAX
J-MAX-OP
dissipation of the device in the application (P
), and the junction-to ambient thermal resistance of the part/package in the application (θ ), as given by the
D-MAX
JA
following equation: T
= T
– (θ x P
).
A-MAX
J-MAX-OP
JA
D-MAX
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Note 6: Junction-to-ambient thermal resistance (θ ) is taken from thermal measurements, performed under the conditions and guidelines set forth in the JEDEC
JA
standard JESD51-7. A 4 layer, 4" x 4", 2/1/1/2 oz. Cu board as per JEDEC standards is used for the measurements.
Note 7: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm. Due
to the pulsed nature of the testing T = T for the electrical characteristics table.
A
J
Note 8: The parameters in the electrical characteristics table are tested under open loop conditions at PV = V
= 3.6V unless otherwise specified. For
DD
IN
performance over the input voltage range and closed-loop results, refer to the datasheet curves.
Note 9: Shutdown current includes leakage current of PFET.
Note 10: I specified here is when the part is not switching. For operating quiescent current at no load, refer to datasheet curves.
Q
Note 11: Current limit is built-in, fixed, and not adjustable. Electrical Characteristic table reflects open loop data (FB = 0V and current drawn from SW pin ramped
up until cycle by cycle limit is activated). Refer to System Characteristics table for maximum output current.
Note 12: Ripple voltage should be measured at C
electrode on a well-designed PC board and using the suggested inductor and capacitors.
OUT
Note 13: National Semiconductor recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper ESD handling
procedures can result in damage.
Note 14: Linearity limits are 3% or 50mV whichever is larger.
5
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Typical Performance Characteristics (Circuit in Figure 3, PVIN = VDD = EN = 3.6V and TA = 25˚C
unless otherwise specified.).
Quiescent Current vs Supply Voltage
(VCON = 0V, FB = 0V, No Switching)
Shutdown Current vs Temperature
(VCON = 0V, EN = 0V)
20166328
20166326
Switching Frequency vs Temperature
(VOUT = 1.3V, IOUT = 200mA)
Output Voltage vs Supply Voltage
(VOUT = 1.3V)
20166310
20166311
Output Voltage vs Temperature
(VIN = 3.6V, VOUT = 0.8V)
Output Voltage vs Temperature
(VIN = 4.2V, VOUT = 3.4V)
20166347
20166327
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Typical Performance Characteristics (Circuit in Figure 3, PVIN = VDD = EN = 3.6V and TA = 25˚C
unless otherwise specified.). (Continued)
Current Limit vs Temperature
(Large PFET)
Current Limit vs Temperature
(Small PFET)
20166330
20166348
VCON Voltage vs Output Voltage
VCON Voltage vs Output Voltage
(RLOAD = 10 Ω)
(RLOAD = 10 Ω)
20166317
20166316
Efficiency vs Output Voltage
(VIN = 3.9V)
EN High Threshold vs Supply Voltage
20166379
20166313
7
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Typical Performance Characteristics (Circuit in Figure 3, PVIN = VDD = EN = 3.6V and TA = 25˚C
unless otherwise specified.). (Continued)
Efficiency vs Output Current
(VOUT = 0.8V)
Efficiency vs Output Current
(VOUT = 3.6V)
20166349
20166315
Efficiency vs Output Current
(RDSON Management)
Efficiency vs Output Current
(RDSON Management, VIN=4.5V)
20166340
20166341
Dark curves are efficiency profiles of either large PFET
or small PFET whichever is higher.
RDSON vs Temperature
RDSON vs Temperature
(Large PFET, ISW = 200mA)
(Small PFET, ISW = 200mA)
20166376
20166332
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Typical Performance Characteristics (Circuit in Figure 3, PVIN = VDD = EN = 3.6V and TA = 25˚C
unless otherwise specified.). (Continued)
RDSON vs Temperature
(N-ch, ISW = -200mA)
V
IN-VOUT vs Output Current
(100% Duty Cycle)
20166377
20166344
Load Transient Response
(VOUT = 0.8V)
Load Transient Response
(VIN = 4.2V, VOUT = 3.4V)
20166342
20166343
Startup
Startup
(VIN = 3.6V, VOUT = 1.3V, RLOAD = 1kΩ)
(VIN = 4.2V, VOUT = 3.4V, RLOAD = 5kΩ)
20166318
20166333
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Typical Performance Characteristics (Circuit in Figure 3, PVIN = VDD = EN = 3.6V and TA = 25˚C
unless otherwise specified.). (Continued)
Shutdown Response
Line Transient Reponse
(VIN = 4.2V, VOUT = 3.4V, RLOAD = 10Ω)
(VIN = 3.0V to 3.6V, IOUT = 100mA)
20166339
20166319
VCON Transient Response
(VIN = 4.2V, VCON = 0.32V/1.44V, RLOAD = 10Ω)
Timed Current Limit Response
(VIN = 3.6V)
20166346
20166338
Output Voltage Ripple
(VOUT = 1.3V)
Output Voltage Ripple
(VOUT = 3.4V)
20166334
20166305
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Typical Performance Characteristics (Circuit in Figure 3, PVIN = VDD = EN = 3.6V and TA = 25˚C
unless otherwise specified.). (Continued)
Output Voltage Ripple in Pulse Skip
(VIN = 3.96V, VOUT = 3.4V, RLOAD = 5Ω)
20166337
11
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Block Diagram
20166304
FIGURE 2. Functional Block Diagram
Additional features include current overload protection and
thermal overload shutdown.
Operation Description
The LM3208 is a simple, step-down DC-DC converter opti-
mized for powering RF power amplifiers (PAs) in mobile
phones, portable communicators, and similar battery pow-
ered RF devices. It is designed to allow the RF PA to operate
at maximum efficiency over a wide range of power levels
from a single Li-Ion battery cell. It is based on a current-
mode buck architecture, with synchronous rectification for
high efficiency. It is designed for a maximum load capability
The LM3208 is constructed using a chip-scale 8-pin micro
SMD package. This package offers the smallest possible
size, for space-critical applications such as cell phones,
where board area is an important design consideration. Use
of a high switching frequency (2MHz, typ.) reduces the size
of external components. As shown in Figure 1, only three
external power components are required for implementation.
Use of a micro SMD package requires special design con-
siderations for implementation. (See Micro SMD Package
Assembly and use in the Applications Information section.)
Its fine bump-pitch requires careful board design and preci-
sion assembly equipment. Use of this package is best suited
for opaque-case applications, where its edges are not sub-
ject to high-intensity ambient red or infrared light. In addition,
the system controller should set EN low during power-up and
other low supply voltage conditions. (See Shutdown Mode in
the Device Information section.)
>
of 650mA when VOUT 1.05V (typ.) and 400mA when VOUT
<
1.00V (typ.) in PWM mode.
Maximum load range may vary from this depending on input
voltage, output voltage and the inductor chosen.
Efficiency is typically around 95% for a 400mA load with 3.4V
output, 3.9V input. The LM3208 has an RDSON management
scheme to increase efficiency when VOUT ≤ 1V. The output
voltage is dynamically programmable from 0.8V to 3.6V by
adjusting the voltage on the control pin without the need for
external feedback resistors. This prolongs battery life by
changing the PA supply voltage dynamically depending on
its transmitting power.
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Operation Description (Continued)
20166336
FIGURE 3. Typical Operating System Circuit
to ramp higher before the comparator turns off the PFET.
This increases the average current sent to the output and
adjusts for the increase in the load.
Circuit Operation
Referring to Figure 1 and Figure 2, the LM3208 operates as
follows. During the first part of each switching cycle, the
control block in the LM3208 turns on the internal PFET
(P-channel MOSFET) switch. This allows current to flow
from the input through the inductor to the output filter capaci-
tor and load. The inductor limits the current to a ramp with a
slope of around (VIN - VOUT) / L, by storing energy in a
magnetic field. During the second part of each cycle, the
controller turns the PFET switch off, blocking current flow
from the input, and then turns the NFET (N-channel MOS-
FET) synchronous rectifier on. In response, the inductor’s
magnetic field collapses, generating a voltage that forces
current from ground through the synchronous rectifier to the
output filter capacitor and load. As the stored energy is
transferred back into the circuit and depleted, the inductor
current ramps down with a slope around VOUT / L. The
output filter capacitor stores charge when the inductor cur-
rent is high, and releases it when low, smoothing the voltage
across the load.
Before appearing at the PWM comparator, a slope compen-
sation ramp from the oscillator is subtracted from the error
signal for stability of the current feedback loop. The minimum
on time of PFET is 55ns (typ.)
Shutdown Mode
<
Setting the EN digital pin low ( 0.5V) places the LM3208 in
shutdown mode (0.01µA typ.). During shutdown, the PFET
switch, NFET synchronous rectifier, reference voltage
source, control and bias circuitry of the LM3208 are turned
>
off. Setting EN high ( 1.2V) enables normal operation.
EN should be set low to turn off the LM3208 during power-up
and under voltage conditions when the power supply is less
than the 2.7V minimum operating voltage. The LM3208 is
designed for compact portable applications, such as mobile
phones. In such applications, the system controller deter-
mines power supply sequencing and requirements for small
package size outweigh the additional size required for inclu-
sion of UVLO (Under Voltage Lock-Out) circuitry.
The output voltage is regulated by modulating the PFET
switch on time to control the average current sent to the load.
The effect is identical to sending a duty-cycle modulated
rectangular wave formed by the switch and synchronous
rectifier at SW to a low-pass filter formed by the inductor and
output filter capacitor. The output voltage is equal to the
average voltage at the SW pin.
Internal Synchronous Rectification
While in PWM mode, the LM3208 uses an internal NFET as
a synchronous rectifier to reduce rectifier forward voltage
drop and associated power loss. Synchronous rectification
provides a significant improvement in efficiency whenever
the output voltage is relatively low compared to the voltage
drop across an ordinary rectifier diode.
While in operation, the output voltage is regulated by switch-
ing at a constant frequency and then modulating the energy
per cycle to control power to the load. Energy per cycle is set
by modulating the PFET switch on-time pulse width to con-
trol the peak inductor current. This is done by comparing the
signal from the current-sense amplifier with a slope compen-
sated error signal from the voltage-feedback error amplifier.
At the beginning of each cycle, the clock turns on the PFET
switch, causing the inductor current to ramp up. When the
current sense signal ramps past the error amplifier signal,
the PWM comparator turns off the PFET switch and turns on
the NFET synchronous rectifier, ending the first part of the
cycle. If an increase in load pulls the output down, the error
amplifier output increases, which allows the inductor current
The internal NFET synchronous rectifier is turned on during
the inductor current down slope in the second part of each
cycle. The synchronous rectifier is turned off prior to the next
cycle. The NFET is designed to conduct through its intrinsic
body diode during transient intervals before it turns on, elimi-
nating the need for an external diode.
RDSON(P) Management
The LM3208 has a unique RDSON(P) management function to
improve efficiency in the low output current region up to
100mA. When the VCON voltage is less than 0.40V (typ.), the
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VOUT = 2.5 x VCON
RDSON(P) Management (Continued)
When VCON is between 0.32V and 1.44V, the output voltage
will follow proportionally by 2.5 times of VCON
device uses only a small part of the PFET to minimize drive
loss of the PFET. When VCON is greater than 0.42V (typ.),
the entire PFET is used to minimize RDSON(P) loss. This
threshold has about 20mV (typ.) of hysteresis.
.
If VCON is over 1.44V (VOUT = 3.6V), sub-harmonic oscilla-
tion may occur because of insufficient slope compensation. If
VCON voltage is less than 0.32V (VOUT = 0.8V), the output
voltage may not be regulated due to the required on-time
being less than the minimum on-time (55ns). The output
voltage can go lower than 0.8V providing a limited VIN range
is used. Refer to datasheet curve (VCON Voltage vs Output
Voltage) for details. This curve is for a typical part and there
could be part-to-part variation for output voltages less than
0.8V over the limited VIN range. When the control pin voltage
is more than 0.15V (typ.), the switches are turned on. When
it is less than 0.125V (typ.), the switches are turned off. This
on/off function has 25mV (typ.) hysteresis. The quiescent
current when (VCON = 0V and VEN = Hi) is around 600µA.
VCON,ON
The output is disabled when VCON is below 125mV (typ.). It
is enabled when VCON is above 150mV (typ.). The threshold
has about 25mV (typ.) of hysteresis.
Current Limiting
A current limit feature allows the LM3208 to protect itself and
external components during overload conditions. In PWM
mode, an 1100mA (typ.) cycle-by-cycle current limit is nor-
mally used when VCON is above 0.42V (typ.), and an 800mA
(typ.) is used when VCON is below 0.40V (typ.). If an exces-
sive load pulls the output voltage down to approximately
0.375V, then the device switches to a timed current limit
mode when VCON is above 0.42V (typ.). In timed current limit
mode the internal PFET switch is turned off after the current
comparator trips and the beginning of the next cycle is
inhibited for 3.5us to force the instantaneous inductor current
to ramp down to a safe value. The synchronous rectifier is off
in timed current limit mode. Timed current limit prevents the
loss of current control seen in some products when the
output voltage is pulled low in serious overload conditions.
ESTIMATION OF MAXIMUM OUTPUT CURRENT
CAPABILITY
Referring to Figure 3, the Inductor peak to peak ripple cur-
rent can be estimated by:
IIND_PP = (VIN - VOUT ) x VOUT / (L1 x FSW x VIN
Where, Fsw is switching frequency.
)
Therefore, maximum output current can be calculated by:
IOUT_MAX = ILIM - 0.5 x IIND_PP
For the worst case calculation, the following parameters
should be used:
FSW (Lowest switching frequency): 1.8MHz
ILIM (Lowest current limit value): 985mA
Dynamically Adjustable Output
Voltage
L1 (Lowest inductor value): refer to inductor data-sheet.
Note that inductance will drop with DC bias current and
temperature. The worst case is typically at 85˚C.
The LM3208 features dynamically adjustable output voltage
to eliminate the need for external feedback resistors. The
output can be set from 0.8V to 3.6V by changing the voltage
on the analog VCON pin. This feature is useful in PA applica-
tions where peak power is needed only when the handset is
far away from the base station or when data is being trans-
mitted. In other instances, the transmitting power can be
reduced. Hence the supply voltage to the PA can be re-
duced, promoting longer battery life. See Setting the Output
Voltage in the Application Information section for further
details. The LM3208 moves into Pulse Skipping mode when
duty cycle is over 92% and the output voltage ripple in-
creases slightly.
For example, VIN = 4.2V, VOUT = 3.2V, L1 = 2.0µH (Induc-
tance value at 985mA DC bias current and 85˚C), FSW
1.8MHz , ILIM = 985mA.
=
IIND_PP = 212mA
IOUT_MAX = 985 – 106 = 876mA
The effects of switch, inductor resistance and dead time are
ignored. In real application, the ripple current would be 10%
to 15% higher than ideal case. This should be taken into
account when calculating maximum output current. Special
attention needs to be paid that a delta between maximum
output current capability and the current limit is necessary to
satisfy transient response requirements. In practice, tran-
sient response requirements may not be met for output
current greater than 650mA.
Thermal Overload Protection
The LM3208 has a thermal overload protection function that
operates to protect itself from short-term misuse and over-
load conditions. When the junction temperature exceeds
around 150˚C, the device inhibits operation. Both the PFET
and the NFET are turned off in PWM mode. When the
temperature drops below 125˚C, normal operation resumes.
Prolonged operation in thermal overload conditions may
damage the device and is considered bad practice.
INDUCTOR SELECTION
A 3.3µH inductor with saturation current rating over 1200mA
and low inductance drop at the full DC bias condition is
recommended for almost all applications. The inductor’s DC
resistance should be less than 0.2Ω for good efficiency. For
low dropout voltage, lower DCR inductors are recom-
mended. The lower limit of acceptable inductance is 1.7µH
at 1200mA over the operating temperature range. Full atten-
tion should be paid to this limit, because some small induc-
tors show large inductance drops at high DC bias. These
cannot be used with the LM3208. FDK MIPW3226D3R0M is
an example of an inductor with the lowest acceptable limit
(as of Oct./05).Table 1 suggests some inductors and suppli-
ers.
Application Information
SETTING THE OUTPUT VOLTAGE
The LM3208 features a pin-controlled variable output volt-
age to eliminate the need for external feedback resistors. It
can be programmed for an output voltage from 0.8V to 3.6V
by setting the voltage on the VCON pin, as in the following
formula:
www.national.com
14
Set EN low to turn off the LM3208 during power-up and
under voltage conditions when the power supply is less than
the 2.7V minimum operating voltage. The part is out of
regulation when the input voltage is less than 2.7V. The
LM3208 is designed for mobile phones where the system
controller controls operation mode for maximizing battery life
and requirements for small package size outweigh the addi-
tional size required for inclusion of UVLO (Under Voltage
Lock-Out) circuitry.
Application Information (Continued)
TABLE 1. Suggested Inductors And Their Suppliers
Model
Size (WxLxH) [mm]
3.2 x 2.6 x 1.0
3.0 x 2.8 x 1.2
3.0 x 3.0 x 1.5
3.0 x 2.8 x 1.2
Vendor
FDK
MIPW3226D3R0M
1098AS-3R3M
NR3015T3R3M
1098AS-2R7M
TOKO
Taiyo-Yuden
TOKO
Micro SMD PACKAGE ASSEMBLY AND USE
If a smaller inductance inductor is used in the application, the
LM3208 may become unstable during line and load tran-
sients, and VCON transient response times may be affected.
Use of the Micro SMD package requires specialized board
layout, precision mounting and careful re-flow techniques, as
detailed in National Semiconductor Application Note 1112.
Refer to the section Surface Mount Technology (SMD) As-
sembly Considerations. For best results in assembly, align-
ment ordinals on the PC board should be used to facilitate
placement of the device. The pad style used with Micro SMD
package must be the NSMD (non-solder mask defined) type.
This means that the solder-mask opening is larger than the
pad size. This prevents a lip that otherwise forms if the
solder-mask and pad overlap, from holding the device off the
surface of the board and interfering with mounting. See
Application Note 1112 for specific instructions how to do this.
For low-cost applications, an unshielded bobbin inductor is
suggested. For noise-critical applications, a toroidal or
shielded-bobbin inductor should be used. A good practice is
to lay out the board with footprints accommodating both
types for design flexibility. This allows substitution of a low-
noise toroidal inductor, in the event that noise from low-cost
bobbin models is unacceptable. Saturation occurs when the
magnetic flux density from current through the windings of
the inductor exceeds what the inductor’s core material can
support with a corresponding magnetic field. This can cause
poor efficiency, regulation errors or stress to a DC-DC con-
verter like the LM3208.
The 8-Bump package used for LM3208 has 300micron sol-
der balls and requires 10.82mil pads for mounting on the
circuit board. The trace to each pad should enter the pad
with a 90˚entry angle to prevent debris from being caught in
deep corners. Initially, the trace to each pad should be 7mil
wide, for a section approximately 7mil long, as a thermal
relief. Then each trace should neck up or down to its optimal
width. The important criterion is symmetry. This ensures the
solder bumps on the LM3208 re-flow evenly and that the
device solders level to the board. In particular, special atten-
tion must be paid to the pads for bumps A1 and A3. Because
PGND and PVIN are typically connected to large copper
planes, inadequate thermal relief’s can result in late or inad-
equate re-flow of these bumps.
CAPACITOR SELECTION
The LM3208 is designed for use with ceramic capacitors for
its input and output filters. Use a 10µF ceramic capacitor for
input and a 4.7µF ceramic capacitor for output. They should
maintain at least 50% capacitance at DC bias and tempera-
ture conditions. Ceramic capacitor types such as X5R, X7R
and B are recommended for both filters. Table 2 lists some
suggested part numbers and suppliers. DC bias character-
istics of the capacitors must be considered when selecting
the voltage rating and case size of the capacitor. If it is
necessary to choose a 0603-size capacitor for CIN and
COUT, the operation of the LM3208 should be carefully
evaluated on the system board. Use of multiple 2.2µF or 1µF
capacitors in parallel may also be considered.
The Micro SMD package is optimized for the smallest pos-
sible size in applications with red or infrared opaque cases.
Because the Micro SMD package lacks the plastic encapsu-
lation characteristic of larger devices, it is vulnerable to light.
Backside metallization and/or epoxy coating, along with
front-side shading by the printed circuit board, reduce this
sensitivity. However, the package has exposed die edges. In
particular, Micro SMD devices are sensitive to light (in the
red and infrared range) shining on the package’s exposed
die edges.
TABLE 2. Suggested Capacitors And Their Suppliers
Model
Vendor
TDK
C2012X5R0J106M,10µF, 6.3V
C1608X5R0J475M, 4.7µF, 6.3V
0805ZD475KA 4.7µF, 10V
TDK
AVX
BOARD LAYOUT CONSIDERATIONS
The input filter capacitor supplies AC current drawn by the
PFET switch of the LM3208 in the first part of each cycle and
reduces the voltage ripple imposed on the input power
source. The output filter capacitor absorbs the AC inductor
current, helps maintain a steady output voltage during tran-
sient load changes and reduces output voltage ripple. These
capacitors must be selected with sufficient capacitance and
sufficiently low ESR (Equivalent Series Resistance) to per-
form these functions. The ESR of the filter capacitors is
generally a major factor in voltage ripple.
EN PIN CONTROL
Drive the EN pin using the system controller to turn the
LM3208 ON and OFF. Use a comparator, Schmidt trigger or
>
logic gate to drive the EN pin. Set EN high ( 1.2V) for
20166308
<
normal operation and low ( 0.5V) for a 0.01µA (typ.) shut-
down mode.
FIGURE 4. Current Loop
15
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Application Information (Continued)
BOARD LAYOUT FLOW
1. Minimize C1, PVIN, and PGND loop. These traces
should be as wide and short as possible. This is the
highest priority.
The LM3208 converts higher input voltage to lower output
voltage with high efficiency. This is achieved with an
inductor-based switching topology. During the first half of the
switching cycle, the internal PMOS switch turns on, the input
voltage is applied to the inductor, and the current flows from
PVIN line into the output capacitor and the load through the
inductor. During the second half cycle, the PMOS turns off
and the internal NMOS turns on. The inductor current con-
tinues to flow via the inductor from the device PGND line into
the output capacitor and the load.
2. Minimize L1, C2, SW and PGND loop. These traces also
should be wide and short. This is the second priority.
3. The above layout patterns should be placed on the
component side of the PCB to minimize parasitic induc-
tance and resistance due to via-holes. It may be a good
idea that the SW to L1 path is routed between C1(+) and
C1(-) land patterns. If vias are used in these large cur-
rent paths, multiple via-holes should be used if possible.
Referring to Figure 4, a pulse current flows in the left hand
side loop, and a ripple current flows in the right hand side
loop. Board layout and circuit pattern design of these two
loops are the key factors for reducing noise radiation and
stable operation. In other lines, such as from battery to C1
and C2 to the load, the current is mostly DC current. There-
fore, it is not necessary to take so much care. Only pattern
width (current capability) and DCR drop considerations are
needed.
4. Connect C1(-), C2(-) and PGND with wide GND pattern.
This pattern should be short, so C1(-), C2(-), and PGND
should be as close as possible. Then connect to a PCB
common GND pattern with as many via-holes as pos-
sible.
5. SGND should not connect directly to PGND. Connecting
these pins under the device should be avoided. (If pos-
sible, connect SGND to the common port of C1(-), C2(-)
and PGND.)
6. VDD should not be connected directly to PVIN. Connect-
ing these pins under the device should be avoided. It is
good idea to connect VDD to C1(+) to avoid switching
noise injection to the VDD line.
7. The FB line should be protected from noise. It is a good
idea to use an inner GND layer (if available) as a shield.
Note: The evaluation board shown in Figure 5 for the LM3208 was designed
with these considerations, and it shows good performance. However
some aspects have not been optimized because of limitations due to
evaluation-specific requirements. The board can be used as a refer-
ence. Please refer questions to a National representative.
20166309
FIGURE 5. Evaluation Board Layout
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16
Physical Dimensions inches (millimeters) unless otherwise noted
8-Bump Thin Micro SMD, Large Bump
X1 = 1.666mm 0.030mm
X2 = 1.819mm 0.030mm
X3 = 0.600mm 0.075mm
NS Package Number TLA08GNA
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves
the right at any time without notice to change said circuitry and specifications.
For the most current product information visit us at www.national.com.
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