LF412
更新时间：2024-09-18 02:20:23
品牌：NSC
描述：Low Offset, Low Drift Dual JFET Input Operational Amplifier
概述
数据手册LF412 概述
Low Offset, Low Drift Dual JFET Input Operational Amplifier 低失调，低漂移双JFET输入运算放大器
LF412 数据手册
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PDF下载August 2000
LF412
Low Offset, Low Drift Dual JFET Input Operational
Amplifier
General Description
Features
n Internally trimmed offset voltage: 1 mV (max)
n Input offset voltage drift: 10 µV/˚C (max)
n Low input bias current: 50 pA
These devices are low cost, high speed, JFET input opera-
tional amplifiers with very low input offset voltage and guar-
anteed input offset voltage drift. They require low supply
current yet maintain a large gain bandwidth product and fast
slew rate. In addition, well matched high voltage JFET input
devices provide very low input bias and offset currents. The
LF412 dual is pin compatible with the LM1558, allowing
designers to immediately upgrade the overall performance of
existing designs.
n Low input noise current:
n Wide gain bandwidth: 3 MHz (min)
n High slew rate: 10V/µs (min)
n Low supply current: 1.8 mA/Amplifier
n High input impedance: 1012
n Low total harmonic distortion ≤0.02%
n Low 1/f noise corner: 50 Hz
n Fast settling time to 0.01%: 2 µs
Ω
These amplifiers may be used in applications such as high
speed integrators, fast D/A converters, sample and hold
circuits and many other circuits requiring low input offset
voltage and drift, low input bias current, high input imped-
ance, high slew rate and wide bandwidth.
Typical Connection
Connection Diagrams
Metal Can Package
00565642
Order Number LF412MH, LF412CH
or LF412MH/883 (Note 1)
00565641
See NS Package Number H08A
Ordering Information
LF412XYZ
Dual-In-Line Package
X indicates electrical grade
Y indicates temperature range
“M” for military
“C” for commercial
Z indicates package type
“H” or “N”
00565644
Order Number LF412ACN, LF412CN
or LF412MJ/883 (Note 1)
See NS Package Number J08A or N08E
™
BI-FET II is a trademark of National Semiconductor Corporation.
© 2004 National Semiconductor Corporation
DS005656
www.national.com
Simplified Schematic
1/2 Dual
00565643
Note 1: Available per JM38510/11905
Detailed Schematic
00565632
www.national.com
2
Absolute Maximum Ratings (Note 2)
H Package
(Note 5)
150˚C
N Package
670 mW
115˚C
(Note 12)
Tj max
θjA (Typical)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
152˚C/W
115˚C/W
(Note 6)
(Note 11)
Operating Temp. Range (Note 6)
LF412A
22V
LF412
18V
Storage Temp.
Range
−65˚C≤TA≤150˚C −65˚C≤TA≤150˚C
Supply Voltage
Differential Input Voltage
Input voltage Range
(Note 3)
38V
30V
Lead Temp.
(Soldering, 10 sec.)
ESD Tolerance
(Note 13)
260˚C
1700V
260˚C
1700V
19V
15V
Output Short Circuit
Duration (Note 4)
Continuous Continuous
H Package N Package
Power Dissipation
DC Electrical Characteristics
(Note 7)
Symbol
Parameter
Conditions
LF412A
LF412
Typ
1.0
Units
Min
Typ
0.5
7
Max Min
Max
3.0
20
VOS
Input Offset Voltage
RS=10 kΩ, TA=25˚C
1.0
10
mV
∆VOS/∆T Average TC of Input
RS=10 kΩ (Note 8)
7
µV/˚C
Offset Voltage
IOS
Input Offset Current
VS= 15V
Tj=25˚C
Tj=70˚C
Tj=125˚C
Tj=25˚C
Tj=70˚C
Tj=125˚C
25
50
100
2
25
50
100
2
pA
nA
(Notes 7, 9)
25
200
4
25
200
4
nA
IB
Input Bias Current
VS= 15V
pA
(Notes 7, 9)
nA
50
50
nA
RIN
Input Resistance
Large Signal Voltage
Gain
Tj=25˚C
1012
200
1012
200
Ω
AVOL
VS= 15V, VO= 10V,
RL=2k, TA=25˚C
Over Temperature
VS= 15V, RL=10k
50
25
15
V/mV
25
12
16
200
13.5
200
13.5
V/mV
V
VO
Output Voltage Swing
Input Common-Mode
Voltage Range
12
11
VCM
+19.5
−16.5
100
+14.5
−11.5
100
V
V
CMRR
PSRR
IS
Common-Mode
Rejection Ratio
Supply Voltage
RS≤10k
80
80
70
70
dB
(Note 10)
100
100
dB
Rejection Ratio
Supply Current
∞
VO = 0V, RL
=
3.6
5.6
3.6
6.5
mA
Note 2: “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits.
AC Electrical Characteristics
(Note 7)
Symbol
Parameter
Conditions
LF412A
Typ
LF412
Typ
Units
Min
Max
Min
Max
Amplifier to Amplifier
Coupling
TA=25˚C, f=1 Hz-20 kHz
(Input Referred)
−120
−120
dB
SR
GBW
Slew Rate
VS= 15V, TA=25˚C
VS= 15V, TA=25˚C
10
3
15
4
8
15
4
V/µs
MHz
Gain-Bandwidth Product
2.7
3
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AC Electrical Characteristics (Continued)
(Note 7)
Symbol
Parameter
Conditions
LF412A
Typ
LF412
Typ
Units
Min
Max
Min
Max
THD
Total Harmonic Dist
AV=+10, RL=10k,
VO=20 Vp-p,
≤0.02
≤0.02
%
BW=20 Hz-20 kHz
TA=25˚C, RS=100Ω,
f=1 kHz
en
in
Equivalent Input Noise
Voltage
25
25
Equivalent Input Noise
Current
TA=25˚C, f=1 kHz
0.01
0.01
Note 3: Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply voltage.
Note 4: Any of the amplifier outputs can be shorted to ground indefintely, however, more than one should not be simultaneously shorted as the maximum junction
temperature will be exceeded.
Note 5: For operating at elevated temperature, these devices must be derated based on a thermal resistance of θ
.
jA
Note 6: These devices are available in both the commercial temperature range 0˚C≤T ≤70˚C and the military temperature range −55˚C≤T ≤125˚C. The
A
A
temperature range is designated by the position just before the package type in the device number. A “C” indicates the commercial temperature range and an “M”
indicates the military temperature range. The military temperature range is available in “H” package only. In all cases the maximum operating temperature is limited
by internal junction temperature T max.
j
Note 7: Unless otherwise specified, the specifications apply over the full temperature range and for V = 20V for the LF412A and for V = 15V for the LF412. V ,
OS
S
S
I , and I
are measured at V =0.
B
OS
CM
Note 8: The LF412A is 100% tested to this specification. The LF412 is sample tested on a per amplifier basis to insure at least 85% of the amplifiers meet this
specification.
Note 9: The input bias currents are junction leakage currents which approximately double for every 10˚C increase in the junction temperature, T . Due to limited
j
production test time, the input bias currents measured are correlated to junction temperature. In normal operation the junction temperature rises above the ambient
temperature as a result of internal power dissipation, P . T =T +θ
P
where θ is the thermal resistance from junction to ambient. Use of a heat sink is
D
j
A
jA
D jA
recommended if input bias current is to be kept to a minimum.
Note 10: Supply voltage rejection ratio is measured for both supply magnitudes increasing or decreasing simultaneously in accordance with common practice. V
S
=
6V to 15V.
Note 11: Refer to RETS412X for LF412MH and LF412MJ military specifications.
Note 12: Max. Power Dissipation is defined by the package characteristics. Operating the part near the Max. Power Dissipation may cause the part to operate
outside guaranteed limits.
Note 13: Human body model, 1.5 kΩ in series with 100 pF.
Typical Performance Characteristics
Input Bias Current
Input Bias Current
00565610
00565611
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4
Typical Performance Characteristics (Continued)
Positive Common-Mode
Input Voltage Limit
Supply Current
00565612
00565613
Negative Common-Mode
Input Voltage Limit
Positive Current Limit
00565615
00565614
Negative Current Limit
Output Voltage Swing
00565616
00565617
5
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Typical Performance Characteristics (Continued)
Output Voltage Swing
Gain Bandwidth
00565619
00565618
Bode Plot
Slew Rate
00565621
00565620
Undistorted Output Voltage
Swing
Distortion vs Frequency
00565622
00565623
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6
Typical Performance Characteristics (Continued)
Open Loop Frequency
Response
Common-Mode Rejection
Ratio
00565625
00565624
Power Supply Rejection
Ratio
Equivalent Input Noise
Voltage
00565626
00565627
Open Loop Voltage Gain
Output Impedance
00565628
00565629
7
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Typical Performance Characteristics (Continued)
Inverter Settling Time
00565630
Pulse Response RL=2 kΩ, CL=10 pF
Small Signal Inverting
Small Signal Non-Inverting
00565636
00565637
Large Signal Inverting
Large Signal Non-Inverting
00565638
00565639
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8
Pulse Response RL=2 kΩ, CL=10 pF (Continued)
Current Limit (RL=100Ω)
00565640
The amplifiers will drive a 2 kΩ load resistance to 10V over
the full temperature range. If the amplifier is forced to drive
heavier load currents, however, an increase in input offset
voltage may occur on the negative voltage swing and finally
reach an active current limit on both positive and negative
swings.
Application Hints
The LF412 series of JFET input dual op amps are internally
™
trimmed (BI-FET II ) providing very low input offset voltages
and guaranteed input offset voltage drift. These JFETs have
large reverse breakdown voltages from gate to source and
drain eliminating the need for clamps across the inputs.
Therefore, large differential input voltages can easily be
accommodated without a large increase in input current. The
maximum differential input voltage is independent of the
supply voltages. However, neither of the input voltages
should be allowed to exceed the negative supply as this will
cause large currents to flow which can result in a destroyed
unit.
Precautions should be taken to ensure that the power supply
for the integrated circuit never becomes reversed in polarity
or that the unit is not inadvertently installed backwards in a
socket as an unlimited current surge through the resulting
forward diode within the IC could cause fusing of the internal
conductors and result in a destroyed unit.
As with most amplifiers, care should be taken with lead
dress, component placement and supply decoupling in order
to ensure stability. For example, resistors from the output to
an input should be placed with the body close to the input to
minimize “pick-up” and maximize the frequency of the feed-
back pole by minimizing the capacitance from the input to
ground.
Exceeding the negative common-mode limit on either input
will cause a reversal of the phase to the output and force the
amplifier output to the corresponding high or low state.
Exceeding the negative common-mode limit on both inputs
will force the amplifier output to a high state. In neither case
does a latch occur since raising the input back within the
common-mode range again puts the input stage and thus
the amplifier in a normal operating mode.
A feedback pole is created when the feedback around any
amplifier is resistive. The parallel resistance and capacitance
from the input of the device (usually the inverting input) to AC
ground set the frequency of the pole. In many instances the
frequency of this pole is much greater than the expected
3 dB frequency of the closed loop gain and consequently
there is negligible effect on stability margin. However, if the
feedback pole is less than approximately 6 times the ex-
pected 3 dB frequency a lead capacitor should be placed
from the output to the input of the op amp. The value of the
added capacitor should be such that the RC time constant of
this capacitor and the resistance it parallels is greater than or
equal to the original feedback pole time constant.
Exceeding the positive common-mode limit on a single input
will not change the phase of the output, however, if both
inputs exceed the limit, the output of the amplifier may be
forced to a high state.
The amplifiers will operate with a common-mode input volt-
age equal to the positive supply; however, the gain band-
width and slew rate may be decreased in this condition.
When the negative common-mode voltage swings to within
3V of the negative supply, an increase in input offset voltage
may occur.
Each amplifier is individually biased by a zener reference
which allows normal circuit operation on 6.0V power sup-
plies. Supply voltages less than these may result in lower
gain bandwidth and slew rate.
9
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Typical Application
Single Supply Sample and Hold
00565631
www.national.com
10
Physical Dimensions inches (millimeters)
unless otherwise noted
Metal Can Package (H)
Order Number LF412MH, LF412MH/883 or LF412CH
NS Package Number H08A
11
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Dual-In-Line Package (J)
Order Number LF412MJ/883
NS Package Number J08A
Dual-In-Line Package (N)
Order Number LF412ACN or LF412CN
NS Package Number N08E
www.national.com
12
Notes
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and
whose failure to perform when properly used in
accordance with instructions for use provided in the
labeling, can be reasonably expected to result in a
significant injury to the user.
2. A critical component is any component of a life
support device or system whose failure to perform
can be reasonably expected to cause the failure of
the life support device or system, or to affect its
safety or effectiveness.
BANNED SUBSTANCE COMPLIANCE
National Semiconductor certifies that the products and packing materials meet the provisions of the Customer Products
Stewardship Specification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification
(CSP-9-111S2) and contain no ‘‘Banned Substances’’ as defined in CSP-9-111S2.
National Semiconductor
Americas Customer
Support Center
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Europe Customer Support Center
Fax: +49 (0) 180-530 85 86
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Support Center
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Fax: 81-3-5639-7507
Email: new.feedback@nsc.com
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Email: ap.support@nsc.com
Email: jpn.feedback@nsc.com
Tel: 81-3-5639-7560
www.national.com
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
LF412 相关器件
| 型号 | 制造商 | 描述 | 价格 | 文档 |
| LF412 MD8 | TI | Military-grade, dual, 30-V, 4-MHz, FET-input operational amplifier | Y | 0 | -55 to 125 | 获取价格 |
|
| LF412-MIL | TI | Dual JFET-INPUT Operational Amplifier | 获取价格 |
|
| LF412-N | TI | 双路、44V、4MHz、高压摆率 (15V/µs)、输入接近 V+、JFET 输入运算放大器 | 获取价格 |
|
| LF412883 | TI | LF412QML Low Offset, Low Drift Dual JFET Input Operational Amplifier | 获取价格 |
|
| LF412A | Linear | Dual Precision JFET Input Operational Amplifiers | 获取价格 |
|
| LF412A | Linear Systems | Dual Precision JFET Input Operational Amplifiers | 获取价格 |
|
| LF412ACH | Linear | Dual Precision JFET Input Operational Amplifiers | 获取价格 |
|
| LF412ACH/A+ | TI | IC,OP-AMP,DUAL,BIPOLAR/JFET,CAN,8PIN,METAL | 获取价格 |
|
| LF412ACJ | TI | DUAL OP-AMP, 1000uV OFFSET-MAX, 4MHz BAND WIDTH, CDIP8, CERAMIC, DIP-8 | 获取价格 |
|
| LF412ACJ8 | Linear | Dual Precision JFET Input Operational Amplifiers | 获取价格 |
|
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