LF347MWC [NSC]

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LF347MWC
型号: LF347MWC
厂家: National Semiconductor    National Semiconductor
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运算放大器 放大器电路 光电二极管
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中文:  中文翻译
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May 1999  
LF147/LF347  
Wide Bandwidth Quad JFET Input Operational Amplifiers  
General Description  
The LF147 is a low cost, high speed quad JFET input opera-  
tional amplifier with an internally trimmed input offset voltage  
Features  
n Internally trimmed offset voltage: 5 mV max  
n Low input bias current: 50 pA  
n Low input noise current:  
(BI-FET II technology). The device requires a low supply  
current and yet maintains a large gain bandwidth product  
and a fast slew rate. In addition, well matched high voltage  
JFET input devices provide very low input bias and offset  
currents. The LF147 is pin compatible with the standard  
LM148. This feature allows designers to immediately up-  
grade the overall performance of existing LF148 and LM124  
designs.  
n Wide gain bandwidth: 4 MHz  
n High slew rate: 13 V/µs  
n Low supply current: 7.2 mA  
n High input impedance: 1012Ω  
=
<
n Low total harmonic distortion AV 10,:  
0.02%  
=
=
=
RL 10k, VO 20 Vp-p, BW 20 Hz−20 kHz  
n Low 1/f noise corner: 50 Hz  
n Fast settling time to 0.01%: 2 µs  
The LF147 may be used in applications such as high speed  
integrators, fast D/A converters, sample-and-hold circuits  
and many other circuits requiring low input offset voltage,  
low input bias current, high input impedance, high slew rate  
and wide bandwidth. The device has low noise and offset  
voltage drift.  
Simplified Schematic  
Connection Diagram  
1
4  
Quad  
Dual-In-Line Package  
DS005647-1  
Note 1: Available per SMD #8102306, JM38510/11906.  
DS005647-13  
Top View  
Order Number LF147J, LF347M, LF347BN,  
LF347N or LF147J/883 (Note 1)  
See NS Package Number J14A, M14A or N14A  
BI-FET II is a trademark of National Semiconductor Corporation.  
© 1999 National Semiconductor Corporation  
DS005647  
www.national.com  
Absolute Maximum Ratings (Note 2)  
If Military/Aerospace specified devices are required,  
please contact the National Semiconductor Sales Office/  
Distributors for availability and specifications.  
LF147  
LF347B/LF347  
85˚C/W  
Surface Mount Wide (WM)  
Operating Temperature  
Range  
(Note 6)  
(Note 6)  
Storage Temperature  
Range  
LF147  
LF347B/LF347  
−65˚CTA150˚C  
±
±
±
±
±
±
Supply Voltage  
22V  
38V  
19V  
18V  
30V  
15V  
Lead Temperature  
Differential Input Voltage  
Input Voltage Range  
(Note 3)  
(Soldering, 10 sec.)  
Soldering Information  
Dual-In-Line Package  
Soldering (10 seconds)  
Small Outline Package  
Vapor Phase (60 seconds)  
Infrared (15 seconds)  
260˚C  
260˚C  
260˚C  
Output Short Circuit  
Duration (Note 4)  
Power Dissipation  
(Notes 5, 11)  
Continuous  
900 mW  
150˚C  
Continuous  
1000 mW  
150˚C  
215˚C  
220˚C  
Tj max  
θjA  
See AN-450 “Surface Mounting Methods and Their Effect  
on Product Reliability” for other methods of soldering  
surface mount devices.  
Ceramic DIP (J) Package  
Plastic DIP (N) Package  
Surface Mount Narrow (M)  
70˚C/W  
75˚C/W  
100˚C/W  
ESD Tolerance (Note 12)  
900V  
DC Electrical Characteristics (Note 7)  
Symbol  
Parameter  
Conditions  
LF147  
LF347B  
Typ Max Min  
LF347  
Units  
Min  
Typ Max Min  
Typ Max  
=
=
VOS  
Input Offset Voltage  
RS 10 k, TA 25˚C  
1
5
8
3
5
7
5
10  
13  
mV  
mV  
Over Temperature  
=
VOS/T  
Average TC of Input Offset  
Voltage  
RS 10 kΩ  
10  
25  
50  
10  
25  
50  
10  
25  
50  
µV/˚C  
=
IOS  
Input Offset Current  
Tj 25˚C, (Notes 7, 8)  
100  
25  
100  
4
100  
4
pA  
nA  
Over Temperature  
=
IB  
Input Bias Current  
Tj 25˚C, (Notes 7, 8)  
200  
50  
200  
8
200  
8
pA  
Over Temperature  
nA  
=
RIN  
Input Resistance  
Tj 25˚C  
1012  
100  
1012  
100  
1012  
100  
=
=
±
AVOL  
Large Signal Voltage Gain  
VS 15V, TA 25˚C  
50  
25  
50  
25  
25  
15  
V/mV  
=
=
±
VO 10V, RL 2 kΩ  
Over Temperature  
V/mV  
V
=
=
±
±
±
±
±
±
±
±
VO  
Output Voltage Swing  
Input Common-Mode Voltage  
Range  
VS 15V, RL 10 kΩ  
12  
11  
13.5  
+15  
−12  
100  
100  
7.2  
12  
11  
13.5  
+15  
−12  
100  
100  
7.2  
12  
11  
13.5  
+15  
−12  
100  
100  
7.2  
=
±
±
±
VCM  
VS 15V  
V
V
CMRR  
PSRR  
IS  
Common-Mode Rejection Ratio  
Supply Voltage Rejection Ratio  
Supply Current  
RS10 kΩ  
80  
80  
80  
80  
70  
70  
dB  
dB  
mA  
(Note 9)  
11  
11  
11  
www.national.com  
2
AC Electrical Characteristics (Note 7)  
Symbol  
Parameter  
Conditions  
LF147  
LF347B  
Typ Max Min  
LF347  
Units  
Min  
Typ Max Min  
−120  
Typ Max  
−120  
=
Amplifier to Amplifier Coupling  
TA 25˚C,  
−120  
dB  
=
f
1 Hz−20 kHz  
(Input Referred)  
=
=
±
SR  
Slew Rate  
VS 15V, TA 25˚C  
8
13  
4
8
13  
4
8
13  
4
V/µs  
MHz  
=
=
±
GBW  
en  
Gain-Bandwidth Product  
Equivalent Input Noise Voltage  
VS 15V, TA 25˚C  
2.2  
2.2  
2.2  
=
=
TA 25˚C, RS 100,  
20  
20  
20  
=
f
1000 Hz  
=
=
in  
Equivalent Input Noise Current  
Tj 25˚C, f 1000 Hz  
0.01  
0.01  
0.01  
Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is func-  
tional, but do not guarantee specific performance limits.  
Note 3: Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply voltage.  
Note 4: Any of the amplifier outputs can be shorted to ground indefinitely, however, more than one should not be simultaneously shorted as the maximum junction  
temperature will be exceeded.  
Note 5: For operating at elevated temperature, these devices must be derated based on a thermal resistance of θ  
.
jA  
Note 6: The LF147 is available in the military temperature range −55˚CT 125˚C, while the LF347B and the LF347 are available in the commercial temperature  
A
=
range 0˚CT 70˚C. Junction temperature can rise to T max 150˚C.  
A
j
=
=
±
15V for the LF347B/LF347.  
±
Note 7: Unless otherwise specified the specifications apply over the full temperature range and for V  
20V for the LF147 and for V  
S
S
=
are measured at V 0.  
CM  
V
, I , and I  
OS OS  
B
Note 8: The input bias currents are junction leakage currents which approximately double for every 10˚C increase in the junction temperature, T . Due to limited pro-  
j
duction test time, the input bias currents measured are correlated to junction temperature. In normal operation the junction temperature rises above the ambient tem-  
=
perature as a result of internal power dissipation, P . T  
D
T
A
+θ  
P where θ is the thermal resistance from junction to ambient. Use of a heat sink is recommended  
D jA  
j
jA  
if input bias current is to be kept to a minimum.  
Note 9: Supply voltage rejection ratio is measured for both supply magnitudes increasing or decreasing simultaneously in accordance with common practice from  
=
=
±
±
±
±
20V to 5V for the LF147.  
V
5V to 15V for the LF347 and LF347B and from V  
S
S
Note 10: Refer to RETS147X for LF147D and LF147J military specifications.  
Note 11: Max. Power Dissipation is defined by the package characteristics. Operating the part near the Max. Power Dissipation may cause the part to operate out-  
side guaranteed limits.  
Note 12: Human body model, 1.5 kin series with 100 pF.  
3
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Typical Performance Characteristics  
Input Bias Current  
Input Bias Current  
Supply Current  
DS005647-14  
DS005647-16  
DS005647-15  
Positive Common-Mode  
Input Voltage Limit  
Negative Common-Mode  
Input Voltage Limit  
Positive Current Limit  
DS005647-19  
DS005647-17  
DS005647-18  
Negative Current Limit  
Output Voltage Swing  
Output Voltage Swing  
DS005647-20  
DS005647-21  
DS005647-22  
www.national.com  
4
Typical Performance Characteristics (Continued)  
Gain Bandwidth  
Bode Plot  
Slew Rate  
DS005647-23  
DS005647-24  
DS005647-25  
Distortion vs Frequency  
Undistorted Output Voltage  
Swing  
Open Loop Frequency  
Response  
DS005647-26  
DS005647-27  
DS005647-28  
Common-Mode Rejection  
Ratio  
Power Supply Rejection  
Ratio  
Equivalent Input Noise  
Voltage  
DS005647-29  
DS005647-30  
DS005647-31  
5
www.national.com  
Typical Performance Characteristics (Continued)  
Open Loop Voltage Gain  
Output Impedance  
Inverter Settling Time  
DS005647-34  
DS005647-33  
DS005647-32  
www.national.com  
6
=
=
Pulse Response RL 2 k, CL 10 pF  
Small Signal Inverting  
Small Signal Non-Inverting  
DS005647-5  
DS005647-4  
Large Signal Inverting  
Large Signal Non-Inverting  
DS005647-6  
DS005647-7  
=
Current Limit (RL 100)  
DS005647-8  
Exceeding the negative common-mode limit on either input  
will force the output to a high state, potentially causing a re-  
versal of phase to the output. Exceeding the negative  
common-mode limit on both inputs will force the amplifier  
output to a high state. In neither case does a latch occur  
since raising the input back within the common-mode range  
again puts the input stage and thus the amplifier in a normal  
operating mode.  
Application Hints  
The LF147 is an op amp with an internally trimmed input off-  
set voltage and JFET input devices (BI-FET II). These JFETs  
have large reverse breakdown voltages from gate to source  
and drain eliminating the need for clamps across the inputs.  
Therefore, large differential input voltages can easily be ac-  
commodated without a large increase in input current. The  
maximum differential input voltage is independent of the sup-  
ply voltages. However, neither of the input voltages should  
be allowed to exceed the negative supply as this will cause  
large currents to flow which can result in a destroyed unit.  
7
www.national.com  
or that the unit is not inadvertently installed backwards in a  
socket as an unlimited current surge through the resulting  
forward diode within the IC could cause fusing of the internal  
conductors and result in a destroyed unit.  
Application Hints (Continued)  
Exceeding the positive common-mode limit on a single input  
will not change the phase of the output; however, if both in-  
puts exceed the limit, the output of the amplifier will be forced  
to a high state.  
As with most amplifiers, care should be taken with lead  
dress, component placement and supply decoupling in order  
to ensure stability. For example, resistors from the output to  
an input should be placed with the body close to the input to  
minimize “pick-up” and maximize the frequency of the feed-  
back pole by minimizing the capacitance from the input to  
ground.  
The amplifiers will operate with a common-mode input volt-  
age equal to the positive supply; however, the gain band-  
width and slew rate may be decreased in this condition.  
When the negative common-mode voltage swings to within  
3V of the negative supply, an increase in input offset voltage  
may occur.  
A feedback pole is created when the feedback around any  
amplifier is resistive. The parallel resistance and capacitance  
from the input of the device (usually the inverting input) to AC  
ground set the frequency of the pole. In many instances the  
frequency of this pole is much greater than the expected 3  
dB frequency of the closed loop gain and consequently there  
is negligible effect on stability margin. However, if the feed-  
back pole is less than approximately 6 times the expected 3  
dB frequency a lead capacitor should be placed from the out-  
put to the input of the op amp. The value of the added ca-  
pacitor should be such that the RC time constant of this ca-  
pacitor and the resistance it parallels is greater than or equal  
to the original feedback pole time constant.  
Each amplifier is individually biased by a zener reference  
±
which allows normal circuit operation on 4.5V power sup-  
plies. Supply voltages less than these may result in lower  
gain bandwidth and slew rate.  
±
The LF147 will drive a 2 kload resistance to 10V over the  
full temperature range. If the amplifier is forced to drive  
heavier load currents, however, an increase in input offset  
voltage may occur on the negative voltage swing and finally  
reach an active current limit on both positive and negative  
swings.  
Precautions should be taken to ensure that the power supply  
for the integrated circuit never becomes reversed in polarity  
Detailed Schematic  
DS005647-9  
www.national.com  
8
Typical Applications  
Digitally Selectable Precision Attenuator  
DS005647-10  
All resistors 1% tolerance  
Accuracy of better than 0.4  
% with standard 1% value resistors  
No offset adjustment necessary  
Expandable to any number of stages  
Very high input impedance  
A1 A2 A3  
VO  
Attenuation  
0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
−1 dB  
−2 dB  
−3 dB  
−4 dB  
−5 dB  
−6 dB  
−7 dB  
9
www.national.com  
Typical Applications (Continued)  
Long Time Integrator with Reset, Hold and Starting Threshold Adjustment  
DS005647-11  
VOUT starts from zero and is equal to the integral of the input voltage with respect to the threshold voltage:  
Output starts when VINVTH  
Switch S1 permits stopping and holding any output value  
Switch S2 resets system to zero  
www.national.com  
10  
Typical Applications (Continued)  
Universal State Variable Filter  
DS005647-12  
For circuit shown:  
=
=
=
9.5 kHz  
f
Q
3 kHz, f  
3.4  
o
NOTCH  
Passband gain:  
Highpass — 0.1  
Bandpass — 1  
Lowpass — 1  
Notch — 10  
f xQ200 kHz  
o
10V peak sinusoidal output swing without slew limiting to 200 kHz  
See LM148 data sheet for design equations  
11  
www.national.com  
Physical Dimensions inches (millimeters) unless otherwise noted  
Ceramic Dual-In-Line Package (J)  
Order Number LF147J or LF147J/883  
NS Package Number J14A  
S.O. Package (M)  
Order Number LF347M  
NS Package Number M14A  
www.national.com  
12  
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)  
Molded Dual-In-Line Package (N)  
Order Number LF347BN or LF347N  
NS Package Number N14A  
LIFE SUPPORT POLICY  
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL  
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:  
1. Life support devices or systems are devices or  
systems which, (a) are intended for surgical implant  
into the body, or (b) support or sustain life, and  
whose failure to perform when properly used in  
accordance with instructions for use provided in the  
labeling, can be reasonably expected to result in a  
significant injury to the user.  
2. A critical component is any component of a life  
support device or system whose failure to perform  
can be reasonably expected to cause the failure of  
the life support device or system, or to affect its  
safety or effectiveness.  
National Semiconductor  
Corporation  
Americas  
Tel: 1-800-272-9959  
Fax: 1-800-737-7018  
Email: support@nsc.com  
National Semiconductor  
Europe  
National Semiconductor  
Asia Pacific Customer  
Response Group  
Tel: 65-2544466  
Fax: 65-2504466  
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Tel: 81-3-5639-7560  
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National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.  

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