DS75453MX [NSC]
IC 0.3 A 2 CHANNEL, OR GATE BASED PRPHL DRVR, PDSO8, SOIC-8, Peripheral Driver;型号: | DS75453MX |
厂家: | National Semiconductor |
描述: | IC 0.3 A 2 CHANNEL, OR GATE BASED PRPHL DRVR, PDSO8, SOIC-8, Peripheral Driver 驱动 光电二极管 接口集成电路 |
文件: | 总14页 (文件大小:276K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
February 2000
DS75451/2/3
Series Dual Peripheral Drivers
General Description
Features
n 300 mA output current capability
n High voltage outputs
The DS7545X series of dual peripheral drivers is a family of
versatile devices designed for use in systems that use TTL
logic. Typical applications include high speed logic buffers,
power drivers, relay drivers, lamp drivers, MOS drivers, bus
drivers and memory drivers.
n No output latch-up at 20V
n High speed switching
n Choice of logic function
The DS75451, DS75452 and DS75453 are dual peripheral
AND, NAND and NOR drivers, respectively, (positive logic)
with the output of the logic gates internally connected to the
bases of the NPN output transistors.
n TTL compatible diode-clamped inputs
n Standard supply voltages
n Replaces TI “A” and “B” series
Connection Diagrams (Dual-In-Line and Metal Can Packages)
DS005824-2
DS005824-3
*
See (Note 5) and Appendix E regarding S.O. package power dissipation
constraints.
Top View
Order Number DS75452M or DS75452N
Top View
Order Number DS75451M or DS75451N
*
See NS Package Numbers M08A or N08E
DS005824-4
*
See (Note 5) and Appendix E regarding S.O. package power dissipation constraints.
Top View
Order Number DS75453M or DS75453N
*
See NS Package Numbers M08A or N08E
© 2001 National Semiconductor Corporation
DS005824
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Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Molded DIP Package
SO Package
957 mW
632 mW
Storage Temperature Range
Lead Temperature (Soldering, 4 sec.)
−65˚C to +150˚C
260˚C
Supply Voltage, (VCC) (Note 2)
Input Voltage
7.0V
Operating Conditions
5.5V
5.5V
Inter-Emitter Voltage (Note 3)
Output Voltage (Note 4)
Output Current (Note 5)
Maximum Power (Note 5)
Dissipation† at 25˚C
Min
Max
5.25
+70
Units
V
30V
Supply Voltage, (VCC
Temperature, (TA)
)
4.75
0
300 mA
˚C
†
Derate molded package 7.7 mW/˚C above 25˚C, derate SO package 7.56
mW/˚C above 25˚C.
Electrical Characteristics
(Notes 6, 7)
Symbol
Parameter
Conditions
Min Typ Max Units
VIH
VIL
VI
High-Level Input Voltage
Low-Level Input Voltage
Input Clamp Voltage
(Figure 7)
2
V
V
V
V
V
V
V
0.8
−1.5
VCC = Min, II = −12 mA
VOL
Low-Level Output Voltage
VCC
Min,
=
VIL = 0.8V
IOL = 100 mA DS75451, DS75453
IOL = 300 mA DS75451, DS75453
IOL = 100 mA DS75452
0.25 0.4
0.5 0.7
0.25 0.4
0.5 0.7
(Figure 7)
VIH = 2V
IOL = 300 mA DS75452
IOH
High-Level Output Current
VCC
Min,
(Figure 7)
=
VOH = 30V
VIH = 2V
DS75451, DS75453
100
100
µA
µA
VIL = 0.8V
DS75452
II
Input Current at Maximum
Input Voltage
VCC = Max, VI = 5.5V, (Figure 9)
1
mA
µA
IIH
High-Level Input Current
Low-Level Input Current
VCC = Max, VI = 2.4V, (Figure 9 )
VCC = Max, VI = 0.4V, (Figure 8)
40
IIL
−1 −1.6 mA
ICCH
Supply Current, Outputs
High
VCC
Max,
(Figure
10)
=
VI = 5V
VI = 0V
VI = 5V
VI = 0V
VI = 5V
VI = 0V
DS75451
DS75452
DS75453
DS75451
DS75452
DS75453
7
11
14
11
65
71
68
mA
mA
mA
mA
mA
mA
11
8
ICCL
Supply Current, Outputs
Low
VCC =
Max,
(Figure
10)
52
56
54
Switching Characteristics
(VCC = 5V, TA = 25˚C)
Symbol
Parameter
Conditions
Min
Typ Max Units
tPLH
Propagation Delay Time, Low-to-High
Level Output
CL = 15 pF, RL = 50Ω,
IO ≈ 200 mA, (Figure 14)
DS75451
18
26
18
18
24
16
25
35
25
25
35
25
ns
ns
ns
ns
ns
ns
DS75452
DS75453
DS75451
DS75452
DS75453
tPHL
Propagation Delay Time, High-to-Low
Level Output
CL = 15 pF, RL = 50Ω,
IO ≈ 200 mA, (Figure 14)
tTLH
tTHL
VOH
Transition Time, Low-to-High Level
Output
CL = 15 pF, RL = 50Ω, IO ≈ 200 mA,
(Figure 14)
5
7
8
ns
ns
Transition Time, High-to-Low Level
Output
CL = 15 pF, RL = 50Ω, IO ≈ 200 mA,
(Figure 14 )
12
High-Level Output Voltage after
Switching
VS = 20V, IO ≈ 300 mA, (Figure 15)
VS − 6.5
mV
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2
Switching Characteristics (Continued)
Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. Except for “Operating Temperature Range”
they are not meant to imply that the devices should be operated at these limits. The table of “Electrical Characteristics” provides conditions for actual device
operation.
Note 2: Voltage values are with respect to network ground terminal unless otherwise specified.
Note 3: The voltage between two emitters of a multiple-emitter transistor.
Note 4: The maximum voltage which should be applied to any output when it is in the “OFF” state.
Note 5: Both halves of these dual circuits may conduct rated current simultaneously; however, power dissipation averaged over a short time interval must fall within
the continuous dissipation rating.
Note 6: Unless otherwise specified min/max limits apply across 0˚C to +70˚C range. All typicals are given for V
= +5V and T = 25˚C.
A
CC
Note 7: All currents into device pins shown as positive, out of device pins as negative, all voltages referenced to ground unless otherwise noted. All values shown
as max or min on absolute value basis.
Truth Tables (H = high level, L = low level)
DS75451
A
L
B
L
Y
L (ON State)
L (ON State)
L (ON State)
H (OFF State)
L
H
L
H
H
H
DS75452
A
L
B
L
Y
H (OFF State)
H (OFF State)
H (OFF State)
L (ON State)
L
H
L
H
H
H
DS75453
A
L
B
L
Y
L (ON State)
H (OFF State)
H (OFF State)
H (OFF State)
L
H
L
H
H
H
3
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Schematic Diagrams
DS75451
DS75452
DS75453
DS005824-11
Resistor values shown are nominal.
DS005824-12
Resistor values shown are nominal.
DS005824-13
Resistor values shown are nominal.
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4
DC Test Circuits
DS005824-15
Both inputs is tested simultaneously.
FIGURE 1. VIH, VOL
DS005824-18
Each input is tested separately.
FIGURE 4. II, IIH
DS005824-16
Each input is tested separately.
FIGURE 2. VIL, VOH
DS005824-19
Each input is tested separately.
FIGURE 5. IOS
DS005824-17
Each input is tested separately.
FIGURE 3. VI, IIL
DS005824-20
Both gates are tested simultaneously.
FIGURE 6. ICCH, ICCL
5
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DC Test Circuits (Continued)
DS005824-21
Input
Under
Test
VIH
Output
Measure
Other
Input
Circuit
Apply
DS75451
DS75452
DS75453
VIH
VCC
VIH
VOH
IOL
IOL
VOL
VOL
IOH
VIL
VIH
IOL
VIL
VCC
Gnd
VIL
VOH
VOH
IOL
VIH
IOH
VIL
VOH
FIGURE 7. VIH, VIL, IOH, VOL
DS005824-24
DS005824-22
Both gates are tested simultaneously.
Note A: Each input is tested separately.
Note B: When testing DS75453 input not under test is grounded.
FIGURE 10. ICCH, ICCL for AND, NAND Circuits
For all other circuits it is at 4.5V.
FIGURE 8. VI, VIL
DS005824-25
DS005824-23
Both gates are tested simultaneously.
Each input is tested separately.
FIGURE 11. ICCH, ICCL for OR, NOR Circuits
FIGURE 9. II, IIH
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6
AC Test Circuits and Switching Time Waveforms
DS005824-26
DS005824-27
Note 1: The pulse generator has the following characteristics: PRR = 1 MHz, Z
≈ 50Ω.
OUT
Note 2: C includes probe and jig capacitance.
L
FIGURE 12. Propagation Delay Times, Each Gate
DS005824-28
DS005824-29
Note 1: The pulse generator has the following characteristics: duty cycle ≤ 1%, Z
≈ 50Ω.
OUT
Note 2: C includes probe and jig capacitance.
L
FIGURE 13. Switching Times, Each Transistor
7
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AC Test Circuits and Switching Time Waveforms (Continued)
DS005824-30
DS005824-31
Note 1: The The pulse generator has the following characteristics: PRR = 1.0 MHz, Z
≈ 50Ω.
OUT
Note 2: C includes probe and jig capacitance.
L
FIGURE 14. Switching Times of Complete Drivers
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8
AC Test Circuits and Switching Time Waveforms (Continued)
DS005824-32
DS005824-33
Note 1: The pulse generator has the following characteristics: PRR = 12.5 kHz, Z
≈ 50Ω.
OUT
Note 2: C includes probe and jig capacitance.
L
FIGURE 15. Latch-UP Test of Complete Drivers
Typical Performance Characteristics
DS005824-37
FIGURE 16. Transistor Collector-Emitter Saturation Voltage vs Collector Current
9
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Typical Applications
DS005824-46
*
Optional keep-alive resistors maintain off-state lamp current at ≈ 10% to reduce surge current.
FIGURE 17. Dual Lamp or Relay Driver
DS005824-47
FIGURE 18. Complementary Driver
DS005824-48
FIGURE 19. TTL or DTL Positive Logic-Level Detector
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10
Typical Applications (Continued)
DS005824-49
*
The two input resistors must be adjusted for the level of MOS input.
FIGURE 20. MOS Negative Logic-Level Detector
11
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Typical Applications (Continued)
DS005824-50
FIGURE 21. Logic Signal Comparator
DS005824-51
*
If inputs are unused, they should be connected to +5V through a 1k resistor.
DS005824-52
Low output occurs only when inputs are low simultaneously.
FIGURE 22. In-Phase Detector
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12
Physical Dimensions inches (millimeters) unless otherwise noted
SO Package (M)
Order Number DS75451M, DS75452M, DS75453M
NS Package Number M08A
Molded Dual-In-Line Package (N)
Order Number DS75451N, DS75452N, DS75453N
NS Package Number N08E
13
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Notes
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DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
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systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and
whose failure to perform when properly used in
accordance with instructions for use provided in the
labeling, can be reasonably expected to result in a
significant injury to the user.
2. A critical component is any component of a life
support device or system whose failure to perform
can be reasonably expected to cause the failure of
the life support device or system, or to affect its
safety or effectiveness.
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