DS16F95MDR [NSC]

IC LINE TRANSCEIVER, UUC, Line Driver or Receiver;
DS16F95MDR
型号: DS16F95MDR
厂家: National Semiconductor    National Semiconductor
描述:

IC LINE TRANSCEIVER, UUC, Line Driver or Receiver

驱动 接口集成电路 驱动器
文件: 总17页 (文件大小:435K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
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Texas Instruments.  
Search http://www.ti.com/ for the latest technical  
information and details on our current products and services.  
October 27, 2010  
DS16F95QML  
EIA-485/EIA-422A Differential Bus Transceiver  
The driver is designed to accommodate loads of up to 60 mA  
of sink or source current and features positive and negative  
current limiting in addition to thermal shutdown for protection  
from line fault conditions.  
General Description  
The DS16F95 Differential Bus Transceiver is a monolithic in-  
tegrated circuit designed for bidirectional data communication  
on balanced multipoint bus transmission lines. The transceiv-  
er meets EIA standard RS-485 as well as RS-422A.  
The DS16F95 can be used in transmission line applications  
employing the DS96F172 and the DS96F174 quad differen-  
tial line drivers and the DS96F173 and DS96F175 quad dif-  
ferential line receivers.  
The DS16F95 offers improved performance due to the use of  
state-of-the-art L-FAST bipolar technology. The L-FAST tech-  
nology allows for higher speeds and lower currents by utilizing  
extremely short gate delay times. Thus, the DS16F95QML  
features lower power, extended temperature range and im-  
proved specifications.  
The DS16F95 combines a TRI-STATE® differential line driver  
and a differential input line receiver, both of which operate  
from a single 5.0V power supply. The driver and receiver have  
an active Enable that can be externally connected to function  
as a direction control. The driver differential outputs and the  
receiver differential inputs are internally connected to form  
differential input/output (I/O) bus ports that are designed to  
offer minimum loading to the bus whenever the driver is dis-  
abled or when VCC = 0V. These ports feature wide positive  
and negative common mode voltage ranges, making the de-  
vice suitable for multipoint applications in noisy environments.  
Features  
Radiation guaranteed  
300 krad(Si)  
Meets EIA-485 and EIA-422A  
Meets SCSI-1 (5 MHZ) specifications  
Designed for multipoint transmission  
Wide positive and negative input/output bus voltage  
ranges  
Thermal shutdown protection  
Driver positive and negative current-limiting  
High impedance receiver input  
Receiver input hysteresis of 50 mV typical  
Operates from single 5.0V supply  
Reduced power consumption  
Pin compatible with DS3695 and SN75176A  
Ordering Information  
NS Package  
NS Part Number  
SMD Part Number  
Package Description  
Number  
DS16F95E/883  
DS16F95J/883  
DS16F95W/883  
5962–89615012A  
5962–8961501PA  
E20A  
J08A  
20LD LCC  
8LD CERDIP  
W10A  
10LD CERPACK  
5962F8961501VHA  
300 krad(Si)  
DS16F95WFQMLV  
W10A  
10LD CERPACK  
DS16F95 MDR  
DS16F95 MDS  
(Note 1)  
(Note 1)  
Bare Die  
Bare Die  
Note 1: FOR ADDITIONAL DIE INFORMATION, PLEASE VISIT THE HI REL WEB SITE AT: www.national.com/analog/space/level_die  
TRI-STATE® is a registered trademark of National Semiconductor Corporation.  
© 2010 National Semiconductor Corporation  
201425  
www.national.com  
Connection Diagrams  
20-Lead Ceramic Leadless Chip Carrier  
20142521  
See NS Package Number E20A  
8-Lead Dual-In-Line Package  
20142501  
See NS Package Number J08A  
10-Lead Flatpak Package  
See NS Package Number W10A20142522  
www.national.com  
2
Logic Diagram  
20142520  
Function Tables  
Driver  
Driver Input  
Enable  
Outputs  
DI  
H
L
DE  
H
A
H
L
B
L
H
H
Z
X
L
Z
Receiver  
Differential Inputs  
A–B  
Enable  
Output  
RO  
RE  
L
H
VID 0.2V  
L
L
Z
VID −0.2V  
X
H
H = High Level  
L = Low Level  
X = Immaterial  
Z = High Impedance (Off)  
3
www.national.com  
Absolute Maximum Ratings (Note 2)  
Storage Temperature Range  
-65°C TA +175°C  
Lead Temperature  
(Soldering, 60 sec.)  
Maximum Power Dissipation at 25°C (Note 3)  
LCC 'E' Package  
Cerdip 'J' Package  
Cerpack 'W' Package  
Supply Voltage  
300°C  
1800 mW  
1274 mW  
725 mW  
7.0V  
Input Voltage (Bus Terminal)  
Enable Input Voltage  
Junction Temperature (TJ)  
Thermal Resistance  
ꢀꢀꢀθJA  
+15V/−10V  
5.5V  
+175°C  
LCC 'E' Package  
83°C/W @ 0.5W  
118°C/W @ 1.0W  
207°C/W @ 0.5W  
Cerdip 'J' Package  
Cerpack 'W' Package  
ꢀꢀꢀθJC  
LCC 'E' Package  
17°C/W  
14°C/W  
18°C/W  
500V  
Cerdip 'J' Package  
Cerpack 'W' Package  
ESD Tolerance (Note 4)  
Recommended Operating Conditions  
Supply Voltage (VCC  
)
4.50 to 5.50V  
Voltage at Any Bus Terminal  
(Separately or Common Mode)  
(VI or VCM  
)
-7.0V to +12V  
-7.0V to ±12V  
Differential Input Voltage (VID)  
Output Current HIGH (IOH  
Driver  
)
-60mA  
Receiver  
-400μA  
Output Current LOW (IOL  
)
Driver  
Receiver  
60mA  
16mA  
Operating Temperature (TA)  
-55°C to +125°C  
www.national.com  
4
Quality Conformance Inspection  
MIL-STD-883, Method 5005 - Group A  
Subgroup  
Description  
Static tests at  
Temp (°C)  
+25  
1
2
Static tests at  
+125  
-55  
3
Static tests at  
4
Dynamic tests at  
Dynamic tests at  
Dynamic tests at  
Functional tests at  
Functional tests at  
Functional tests at  
Switching tests at  
Switching tests at  
Switching tests at  
+25  
5
+125  
-55  
6
7
+25  
8A  
8B  
9
+125  
-55  
+25  
10  
11  
+125  
-55  
DC - Driver Electrical Characteristics (Note 11)  
The following conditions apply to all parameters, unless otherwise specified. VCC = 5.5V  
Sub-  
group  
Symbol  
Parameter  
Conditions  
Notes  
Min Max Unit  
VCC = 5.5V, IO = 0A, VIN = .8V  
VCC = 5.5V, IO = 0A, VIN = 2V  
VCC = 4.5V, RL = 100Ω  
VCC = 4.5V, RL = 54Ω  
VCC = 4.5V, RL = 100Ω  
VCC = 4.5V, RL = 54Ω  
VCC = 4.5V, RL = 100Ω  
VCC = 4.5V, RL = 54Ω  
RL = 100Ω  
6
6
V
1, 2, 3  
1, 2, 3  
1, 2, 3  
1, 2, 3  
1, 2, 3  
1, 2, 3  
1, 2, 3  
1, 2, 3  
1, 2, 3  
1, 2, 3  
1, 2, 3  
1, 2, 3  
1, 2, 3  
VOD1  
Differential Vout  
V
2
V
Differential Vout  
Figure 1  
VOD2  
ΔVOD  
Δ VOC  
1.5  
V
-200 200  
mV  
mV  
mV  
mV  
V
Change In Differential Vout  
(Note 5)  
(Note 5)  
-200 200  
-200 200  
Change In Common Mode Vout  
-200 200  
3
VOC  
IIH  
Common Mode Vout  
3
V
RL = 54Ω  
Logical "1" Input Current  
VI = 2.4V  
20  
1
uA  
mA  
mA  
Output Disable, VO = 12V  
Output Disable, VO = -7V  
(Note 6) -0.8  
(Note 6) -0.8  
VCC = 0, Output Disable,  
VO = 12V  
IO  
Output Current  
1
mA  
mA  
1, 2, 3  
1, 2, 3  
VCC = 0, Output Disable,  
VO = -7V  
VIN = 3V, VOUT = VCC  
VIN = 3V, VOUT = -7V  
VIN = 3V, VOUT = 0V  
VIN = 3V, VOUT = 12V  
VIN = 0V, VOUT = 12V  
VIN = 0V, VOUT = VCC  
VIN = 0V, VOUT = -7V  
VIN = 0V, VOUT = 0V  
VCC = 4.5V, IO = -20mA  
VCC = 4.5V, IO = 20mA  
VCM = -7V to 12V  
150  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
V
1, 2, 3  
1, 2, 3  
1, 2, 3  
1, 2, 3  
1, 2, 3  
1, 2, 3  
1, 2, 3  
1, 2, 3  
1, 2, 3  
1, 2, 3  
1, 2, 3  
(Note 6) -250  
(Note 6) -150  
250  
250  
150  
IOS  
Output Short Circuit  
(Note 6) -250  
(Note 6) -150  
3
VOH  
Logical "1" Output Voltage  
Logical "0" Output Voltage  
Differential Vout  
VOL  
2
V
VOD3  
1
V
5
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DC - Receiver Electrical Characteristics (Note 11)  
The following conditions apply to all parameters, unless otherwise specified. VCC = 5.5V  
Sub-  
group  
Symbol  
Parameter  
Conditions  
Notes  
Min Max Unit  
VOH  
Logical "1" Output Voltage  
Figure 2  
VCC = 4.5V, VLD = 200mV,  
IOH = -400uA  
2.5  
V
1, 2, 3  
VCC = 4.5V, VLD = -200mV,  
IOL = 8mA  
.45  
V
V
1, 2, 3  
1, 2, 3  
Logical "0" Output Voltage  
Figure 2  
VOL  
VCC = 4.5V, VLD = -200mV,  
IOL = 16mA  
.5  
1
Untested Input = 0V, VI = 12V  
Untested Input = 0V, VI = -7V  
mA  
mA  
1, 2, 3  
1, 2, 3  
(Note 6)  
(Note 6)  
-.8  
-.8  
VCC = 0V, Untested Input = 0V,  
VI = 12V  
II  
Line Input Current  
Logical "1" Input Current  
Input Resistance  
1
mA  
mA  
1, 2, 3  
1, 2, 3  
VCC = 0V, Untested Input = 0V,  
VI = -7V  
IIH  
VI = 2.7V (Receiver)  
20  
uA  
1, 2, 3  
1, 2, 3  
1, 2, 3  
1, 2, 3  
Untested Input = 0V, VI = 12V  
Untested Input = 0V, VI = -7V  
(Note 7)  
(Note 7)  
10  
10  
10  
KΩ  
KΩ  
KΩ  
VCC = 0V, Untested Input = 0V,  
VI = 12V  
RIN  
(Note 7)  
(Note 7)  
VCC = 0V, Untested Input = 0V,  
VI = -7V  
10  
1, 2, 3  
KΩ  
VI = .4V  
-20  
-20  
-85  
20  
20  
-15  
uA  
uA  
mA  
1, 2, 3  
1, 2, 3  
1, 2, 3  
IOZ  
IOS  
High Impedance State  
Output Short Circuit  
VI = 2.4V  
VIN = 1V, VOUT = 0V  
VCC = 4.5V, VO = 2.5V,  
VCM = 12V & 0V & -7V,  
IO = -.4mA  
.2  
.2  
V
V
V
V
1, 2, 3  
1, 2, 3  
1, 2, 3  
1, 2, 3  
VTH  
Differential Input High Threshold  
VCC = 5.5V, Vo = 2.5V,  
VCM = 12V & 0V & -7V,  
IO = -.4mA  
VCC = 4.5V, VO = .5V,  
VCM = 12V & 0V & -7V,  
IO = 8mA  
-.2  
-.2  
VT1  
Differential Input Low Threshold  
VCC = 5.5V, VO = .5V,  
VCM = 12V & 0V & -7V,  
IO = 8mA  
VTH+ -  
(VTH-)  
VCC = 4.5V, VCM = 0V  
VCC = 5.5V, VCM = 0V  
35  
35  
mV  
mV  
1, 2, 3  
1, 2, 3  
Hyteresis  
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6
DC - Both Driver and Receiver Electrical Characteristics (Note 11)  
The following conditions apply to all parameters, unless otherwise specified. VCC = 5.5V  
Sub-  
group  
Symbol  
Parameter  
Conditions  
Notes  
Min Max Unit  
ICC  
ICC  
VIC  
VIH  
VIL  
VIH  
VIL  
I IL  
Supply Current ICC Both Disable  
Supply Current ICC Both Enable  
Input Clamp Volt  
RE = 2V, DE = .8V  
RE =.8V, DE = 2V  
II = -18mA  
25  
28  
mA  
mA  
V
1, 2, 3  
1, 2, 3  
1, 2, 3  
1, 2, 3  
1, 2, 3  
1, 2, 3  
1, 2, 3  
1, 2, 3  
-1.3  
2
Logical "1" Input Voltage  
V
Logical "0" Input Voltage  
.8  
.8  
V
Logical "1" Enable Input Voltage  
Logical "0" Enable Input Voltage  
Logical "0" Input Current  
2
V
V
VI = .4V  
(Note 6)  
-50  
uA  
AC - Driver Electrical Characteristics (Note 11)  
The following conditions apply to all parameters, unless otherwise specified.  
VCC = 5V, PRR = 1MHZ, TR TF 6nS, 50% duty cycle, AMP = 3V, VLO, ZOUT = 50Ω  
Sub-  
group  
Symbol  
Parameter  
Conditions  
Notes  
Min Max Unit  
tDD  
Differential Output Delay Time  
Figure 3  
(Note 10)  
(Note 10)  
8
8
8
25  
30  
25  
nS  
nS  
nS  
9
RL = 60Ω  
10, 11  
9
Differential Output Transition  
Time  
Figure 3  
(Note 9)  
(Note 10)  
tTD  
RL = 60Ω  
RL = 27Ω  
8
6
6
6
6
30  
18  
25  
18  
25  
nS  
nS  
nS  
nS  
nS  
10, 11  
9
Propagation Delay Time Low to  
High  
Figure 4  
tPLH  
10, 11  
9
Propagation Delay Time high to  
Low  
Figure 4  
tPHL  
RL = 27Ω  
10, 11  
Output Enable Time to H  
Figure 5  
35  
45  
40  
50  
30  
40  
30  
40  
6
nS  
nS  
nS  
nS  
nS  
nS  
nS  
nS  
nS  
nS  
9
tPZH  
tPZL  
tPHZ  
RL = 110Ω  
10, 11  
9
Output Enable Time to L  
Figure 6  
RL = 110Ω  
RL = 110Ω  
10, 11  
9
Output Disable Time to H  
Figure 5  
10, 11  
9
Output Disable Time to L  
Figure 6  
tPLZ  
RL = 110Ω  
10, 11  
9
Differential Output Skew Time  
Figure 3  
TSKEW  
12  
10, 11  
7
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AC - Receiver Electrical Characteristics (Note 11)  
The following conditions apply to all parameters, unless otherwise specified.  
VCC = 5V, PRR = 1MHZ, TR TF 6nS, 50% duty cycle, AMP = 3V, VLO, ZOUT = 50Ω  
Sub-  
group  
Symbol  
Parameter  
Conditions  
Notes  
Min Max Unit  
Propagation Delay Time Low to  
High Figure 7  
10  
10  
10  
10  
27  
38  
27  
38  
20  
30  
20  
30  
8
nS  
nS  
nS  
nS  
nS  
nS  
nS  
nS  
nS  
nS  
9
tPLH  
CL = 15pF  
10, 11  
9
Propagation Delay Time High to  
Low Figure 7  
tPHL  
CL = 15pF  
CL = 15pF  
CL = 15pF  
10, 11  
9
Output Enable Time to H  
Figure 8  
tPZH  
10, 11  
9
Output Enable Time to L  
Figure 8  
tPZL  
10, 11  
9
Output to Output Delay Time  
Figure 7  
|tPLH - tPHL  
|
16  
10, 11  
(Note 8)  
(Note 16)  
30  
nS  
9
CL = 20pF  
Output Disable Time From H  
(Note 8)  
40  
20  
30  
20  
30  
nS  
nS  
nS  
nS  
nS  
10, 11  
9
tPHZ  
Figure 8  
CL = 5pF  
CL = 5pF  
(Note 8)  
10, 11  
9
Output Disable Time From L  
Figure 8  
tPLZ  
10, 11  
Note 2: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices  
should be operated at these limits. The tables of “Electrical Characteristics” provide conditions for actual device operation.  
Note 3: Above TA = 25°C, derate E package 12.1mW°C, J package 8.5 mW/°C, W & WG package 4.8mW/°C.  
Note 4: Human body model, 1.5kin series with 100pF  
Note 5: Δ|VOD| and Δ|VOC| are the changes in magnitude of VOD and VOC, respectively, that occur when the input is changed from a high level to a low level.  
Note 6: Negative sign of the limits indicates the direction of the current flow only.  
Note 7: RIN is guaranteed by testing “Line Input Current” (II).  
Note 8: Testing at 20pF assures conformance to spec at 5pF.  
Note 9: tTD = Non-inverting output rise time + inverting output fall time / 2, Non-inverting output fall time + inverting output rise time / 2.  
Note 10: Rise time 20% to 80%, Fall time 80% to 20%.  
Note 11: Pre and post irradiation limits are identical to those listed under A C and DC electrical characteristics. These parts may be dose rate sensitive in a space  
environment and demonstrate enhanced low dose rate effect. Radiation end point limits for the noted parameters are guaranteed only for the conditions as  
specified in MIL-STD 883, Method 1019, condition A.  
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8
Parameter Measurement Information  
20142502  
FIGURE 1. Driver VOD and VOC (Note 15)  
20142503  
FIGURE 2. Receiver VOH and VOL  
20142504  
20142505  
tSKEW = |tPLHD–tPHLD  
|
FIGURE 3. Driver Differential Output Delay and Transition Times (Note 12, Note 14)  
20142506  
9
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20142507  
FIGURE 4. Driver Propagation Times (Note 12, Note 13)  
20142509  
20142508  
FIGURE 5. Driver Enable and Disable Times (tZH, tHZ) (Note 12, Note 13, Note 14)  
20142511  
20142510  
FIGURE 6. Driver Enable and Disable Times (tZL, tLZ) (Note 12, Note 13, Note 14)  
20142513  
20142512  
FIGURE 7. Receiver Propagation Delay Times (Note 12, Note 13)  
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10  
20142514  
20142517  
20142515  
20142518  
20142516  
FIGURE 8. Receiver Enable and Disable Times (Note 12, Note 13, Note 15)  
Note 12: The input pulse is supplied by a generator having the following characteristics: PRR = 1.0 MHz, 50% duty cycle, tr 6.0 ns, tf 6.0 ns, ZO = 50Ω.  
Note 13: CL includes probe and stray capacitance.  
Note 14: DS16F95 Driver enable is Active-High.  
Note 15: All diodes are 1N916 or equivalent.  
Note 16: Testing at 20 pF assures conformance to 5 pF specification.  
11  
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Typical Application  
20142519  
The line should be terminated at both ends in its characteristic impedance, typically 120Ω.  
Stub lengths off the main line should be kept as short as possible.  
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12  
Revision History  
Date Released Revision  
Section  
New Release, Corporate format  
Changes  
9/23/2005  
A
1 MDS data sheet converted into Corporate data  
sheet format. MDS data sheet MNDS16F95-X-  
RH, Rev. 0A1 will be Archived.  
10/26/2010  
B
Features, Ordering Table, Connection  
Diagrams W pkg, Absolute Ratings,  
Update with current device information and format.  
Correction to rad info., Code K NSID's removed,  
Electricals - DC Receiver VT1, AC Driver removed reference to WG pkg, typo correction to  
conditions, Removed WG pkg drawing. Revision  
A will be Archived  
conditions, Physical Dimensions Mkt  
drawing  
13  
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Physical Dimensions inches (millimeters) unless otherwise noted  
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8 Narrow Lead Ceramic Dual-In-Line Package (J)  
NS Package Number J08A  
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14  
10-Lead Ceramic Flatpak (W)  
NS Package Number W10A  
15  
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