DS1678 [NSC]
TRI-STATE TTL to MOS Multiplexers/Drivers; 三态TTL为MOS多路复用器/驱动器型号: | DS1678 |
厂家: | National Semiconductor |
描述: | TRI-STATE TTL to MOS Multiplexers/Drivers |
文件: | 总7页 (文件大小:151K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
February 1986
DS1648/DS3648/DS1678/DS3678 TRI-STATE TTL to
É
MOS Multiplexers/Drivers
General Description
The DS1648/DS3648 and DS1678/DS3678 are quad 2-in-
put multiplexers with TRI-STATE outputs designed to drive
the large capacitive loads (up to 500 pF) associated with
MOS memory systems. A PNP input structure is employed
to minimize input currents so that driver loading in large
memory systems is reduced. The circuit employs Schottky-
clamped transistors for high speed and TRI-STATE outputs
for bus operation.
output. The DS1678/DS3678 has a direct, low impedance
output for use with or without an external resistor.
Features
Y
TRI-STATE outputs interface directly with system-bus
Y
Schottky-clamped for better ac performance
Y
PNP inputs to minimize input loading
Y
TTL compatible
The DS1648/DS3648 has a 15X resistor in series with the
outputs to dampen transients caused by the fast-switching
Y
High-speed capacitive load drivers
Y
Built-in damping resistor (DS1648/DS3648 only)
Logic and Connection Diagrams
Dual-In-Line Package
TL/F/7506–2
Top View
Order Number DS1648J, DS3648J, DS1678J
DS3678J, DS3648N or DS3678N
See NS Package Number J16A or N16A
TL/F/7506–1
TRI-STATEÉ is a registered trademark of National Semiconductor Corp.
C
1995 National Semiconductor Corporation
TL/F/7506
RRD-B30M105/Printed in U. S. A.
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Operating Conditions
Min
Max
Units
Supply Voltage (V
)
CC
4.5
5.5
V
Temperature (T )
A
b
a
125
Supply Voltage
7V
7V
DS1648, DS1678
DS3648, DS3678
55
C
§
§
a
0
70
C
Logical ‘‘1’’ Input Voltage
Logical ‘‘0’’ Input Voltage
Storage Temperature Range
b
1.5V
b
a
65 C to 150 C
§
§
Maximum Power Dissipation* at 25 C
Cavity Package
Molded Package
§
1433 mW
1362 mW
Lead Temperature
(Soldering, 10 seconds)
300 C
§
* Derate cavity package 9.6 mW/ C above 25 C; derate molded package
§
§
10.9 mW/ C above 25 C.
§
§
Electrical Characteristics (Notes 2 and 3)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
V
V
Logical ‘‘1’’ Input Voltage
Logical ‘‘0’’ Input Voltage
Logical ‘‘1’’ Input Current
Logical ‘‘0’’ Input Current
Input Clamp Voltage
2.0
IN(1)
IN(0)
IN(1)
IN(0)
V
0.8
40
V
e
e
e
e
e
e
I
I
V
V
V
V
5.5V, V
5.5V, V
5.5V
0.5V
0.1
mA
mA
V
CC
CC
CC
CC
IN
b
b
250
50
IN
e b
b
b
1.2
V
V
4.5V, I
4.5V, I
18 mA
0.75
CLAMP
IN
e b
Logical ‘‘1’’ Output Voltage
(No Load)
10 mA
DS1648/DS1678
DS3648/DS3678
DS1648/DS1678
DS3648/DS3678
DS1648
2.7
2.8
3.6
3.6
0.25
0.25
3.5
3.5
3.5
3.5
0.6
0.4
0.6
0.4
V
OH
OH
V
e
e
e
10 mA
V
OL
Logical ‘‘0’’ Output Voltage
(No Load)
V
4.5V, I
0.4
V
CC
CC
OL
0.35
V
e b
V
OH
Logical ‘‘1’’ Output Voltage
(With Load)
V
4.5V, I
1.0 mA
2.4
2.5
2.6
2.7
V
OH
DS1678
V
DS3648
V
DS3678
V
e
e
V
OL
Logical ‘‘0’’ Output Voltage
(With Load)
V
CC
4.5V, I
20 mA
DS1648
1.1
0.5
1.0
0.5
V
OL
DS1678
V
DS3648
V
DS3678
V
e
e
e
e
b
I
I
I
I
Logical ‘‘1’’ Drive Current
Logical ‘‘0’’ Drive Current
TRI-STATE Output Current
Power Supply Current
V
V
V
V
4.5V, V
4.5V, V
0V, (Note 4)
4.5V, (Note 4)
250
150
mA
mA
mA
1D
CC
OUT
0D
CC
OUT
e
OUT
e
b
40
0.4V to 2.4V, Output Control
2.0V
40
60
32
Hi-Z
CC
e
e
3V
5.5V
Output Control
CC
42
20
mA
All Other Inputs at 0V
All Inputs at 0V
mA
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation.
b
a
Note 2: Unless otherwise specified min/max limits apply across the 55 C to 125 C temperature range for the DS1648 and DS1678 and across the 0 C to
§
§
§
a
e
e
5V.
CC
70 C range for the DS3648 and DS3678. All typical values for T
§
25 C and V
§
A
Note 3: All currents into device pins shown as positive, out of device pins as negative, all voltages referenced to ground unless otherwise noted. All values shown
as max or min on absolute value basis.
Note 4: When measuring output drive current and switching response for the DS1678 and DS3678 a 15X resistor should be placed in series with each output. This
resistor is internal to the DS1648/DS3648 and need not be added.
2
e
e
5V, T
A
Switching Characteristics V
25 C (Note 4)
§
CC
Symbol
Parameter
Conditions
Min Typ Max Units
e
e
e
e
e
e
e
e
t
S
t
S
t
F
t
R
Storage Delay Negative Edge
(Figure 1)
(Figure 1)
(Figure 1)
(Figure 1)
C
L
C
L
C
L
C
L
C
L
C
L
C
L
C
L
50 pF
5
9
7
12
8
ns
ns
ns
ns
ns
ns
ns
ns
g
500 pF
50 pF
Storage Delay Positive Edge
Fall Time
6
’
500 pF
50 pF
9
13
8
5
500 pF
50 pF
22
6
35
9
Rise Time
500 pF
22
35
e
(Figure 2)
e
e
e
e
t
t
t
t
t
t
t
t
Delay from Output Control Input to Logical ‘‘0’’
Level (from High Impedance State)
C
L
50 pF, R
2 kX to V ,
CC
ZL
ZH
LZ
HZ
L
L
L
L
10
8
15
15
25
25
15
17
20
20
ns
ns
ns
ns
ns
ns
ns
ns
e
(Figure 2)
Delay from Output Control Input to Logical ‘‘1’’
Level (from High Impedance State)
C
L
50 pF, R
2 kX to GND
e
(Figure 3)
Delay from Output Control Input to High Impedance
State (from Logical ‘‘0’’ Level)
C
L
50 pF, R
400X to V ,
CC
15
10
12
14
16
14
e
(Figure 3)
Delay from Output Control Input to High Impedance
State (from Logical ‘‘1’’ Level)
C
L
50 pF, R
400X to GND,
Propagation Delay to Logical ‘‘0’’ Transition When
Select Selects A
g
S
S
S
S
e
e
e
e
C
L
C
L
C
L
C
L
50 pF,(Figure 1)
50 pF,(Figure 1)
50 pF,(Figure 1)
50 pF,(Figure 1)
Propagation Delay to Logical ‘‘1’’ Transition When
Select Selects A
’
g
’
Propagation Delay to Logical ‘‘0’’ Transition When
Select Selects B
Propagation Delay to Logical ‘‘1’’ Transition When
Select Selects B
Schematic Diagram
TL/F/7506–3
*DS1648/DS3648 only
3
AC Test Circuits and Switching Time Waveforms
t
S
, t , T , t
g
S R F
g
TL/F/7506–5
TL/F/7506–4
e
s
s
Note 1: The pulse generator has the following characteristics: Z
OUT
50X and PRR
1 MHz. Rise and fall times between 10% and 90% points
5 ns.
Note 2: C includes probe and jig capacitance.
L
FIGURE 1
t
t
ZL
ZH
TL/F/7506–8
TL/F/7506–7
TL/F/7506–6
*Internal on DS1648 and DS3648
FIGURE 2
t
t
LZ
HZ
TL/F/7506–11
TL/F/7506–10
TL/F/7506–9
*Internal on DS1648 and DS3648
FIGURE 3
Truth Table
Output
Control
Inputs
A
Outputs
Select
B
H
L
L
L
L
X
L
X
L
X
X
X
L
Hi-Z
H
L
H
X
X
L
H
H
H
H
L
e
e
e
H
L
High level
Low level
Don’t care
X
e
Hi-Z
TRI-STATE mode
4
Typical Applications
Addressing 16k RAM
2:1 Multiplexing of RAM Outputs
TL/F/7506–14
TL/F/7506–12
Refreshing Using TRI-STATE Counter
TL/F/7506–13
5
Physical Dimensions inches (millimeters)
Ceramic Dual-in-Line Pkg (J)
Order Number DS1648J, DS3648J, DS1678J or DS3678J
See NS Package Number J16A
Order Number DS3648N or DS3678N
See NS Package Number N16A
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DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and whose
failure to perform, when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
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This datasheet has been download from:
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Datasheets for electronics components.
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