DM54LS503W [NSC]
IC,SUCCESS-APROX REG,LS-TTL,FP,16PIN,CERAMIC;型号: | DM54LS503W |
厂家: | National Semiconductor |
描述: | IC,SUCCESS-APROX REG,LS-TTL,FP,16PIN,CERAMIC 输出元件 逻辑集成电路 触发器 |
文件: | 总6页 (文件大小:138K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
April 1992
DM54LS503/DM74LS503
8-Bit Successive Approximation
Register (with Expansion Control)
General Description
Features
Y
Y
Y
Performs serial-to-parallel conversion
The ’LS503 register is basically the same as the ’LS502
except that it has an active LOW Enable (E) input that is
used in cascading two or more packages for longer word
lengths. A HIGH signal on E, after a START operation,
forces Q7 HIGH and prevents the device from accepting
serial data. With the E input of an ’LS503 connected to the
CC output of a preceding (more significant) device, the
’LS503 will be inhibited until the preceding device is filled,
causing its CC output to go LOW. This LOW signal then
enables the ’LS503 to accept the serial data on subsequent
clocks. For a description of the starting, shifting and conver-
sion operations, please see the ’LS502 data sheet.
Expansion control for longer words
Storage and control for successive approximation
A to D conversion
Y
Low power Schottky version of 2503
Connection Diagram
Logic Symbol
Dual-In-Line Package
TL/F/10190–2
e
V
Pin 16
Pin 8
CC
e
GND
TL/F/10190–1
Order Number DM54LS503J, DM54LS503W,
DM74LS503WM or DM74LS503N
See NS Package Number J16A, M16B, N16E or W16A
Pin Names
Description
D
Serial Data Input
Start Input (Active LOW)
S
CP
E
Clock Pulse Input (Active Rising Edge)
Conversion Enable Input (Active LOW)
CC
Q0–Q7
Q7
Conversion Complete Output (Active LOW)
Parallel Register Outputs
Complement of Q7 Output
C
1995 National Semiconductor Corporation
TL/F/10190
RRD-B30M105/Printed in U. S. A.
Absolute Maximum Ratings (Note)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Note: The ‘‘Absolute Maximum Ratings’’ are those values
beyond which the safety of the device cannot be guaran-
teed. The device should not be operated at these limits. The
parametric values defined in the ‘‘Electrical Characteristics’’
table are not guaranteed at the absolute maximum ratings.
The ‘‘Recommended Operating Conditions’’ table will define
the conditions for actual device operation.
Supply Voltage
Input Voltage
7V
7V
Operating Free Air Temperature Range
DM54LS
DM74LS
b
b
a
55 C to 125 C
§
0 C to 70 C
§
a
§
§
a
65 C to 150 C
Storage Temperature Range
§
§
Recommended Operating Conditions
DM54LS503
DM74LS503
Symbol
Parameter
Units
Min
4.5
2
Nom
Max
Min
4.75
2
Nom
Max
V
V
V
Supply Voltage
5
5.5
5
5.25
V
V
CC
High Level Input Voltage
Low Level Input Voltage
IH
0.7
0.8
V
IL
b
b
0.4
I
I
High Level Output Voltage
Low Level Output Current
Free Air Operating Temperature
0.4
mA
mA
OH
OL
4
8
b
T
55
125
0
70
C
§
A
t
t
(H)
Setup Time HIGH or LOW
S to CP
5
16
16
s
ns
ns
ns
ns
ns
(L)
5
s
t
t
(H)
(L)
Hold Time HIGH or LOW
S to CP
5
5
0
0
h
h
t
t
(H)
(L)
Setup Time HIGH or LOW
D to CP
5
5
8
8
s
s
t
t
(H)
(L)
Hold Time HIGH or LOW
D to CP
5
5
10
10
h
h
t
t
(H)
(L)
CP Pulse Width HIGH or LOW
20
20
46
46
w
w
Electrical Characteristics Over recommended operating free air temperature range (unless otherwise noted)
Typ
Symbol
Parameter
Conditions
Min
Max
Units
(Note 1)
e
e
e b
e
b
1.5
V
V
Input Clamp Voltage
V
Min, I
Min, I
18 mA
Max,
V
V
I
CC
I
High Level Output Voltage
V
V
DM54
DM74
DM54
DM74
DM74
DM74
DM54
2.5
2.7
OH
CC
OH
e
Max
IL
e
e
Max,
V
OL
Low Level Output Voltage
V
V
Min, I
0.4
CC
OL
e
Min
IH
0.5
0.4
V
e
e
I
4 mA, V
CC
Min
OL
@
Input Current Max
e
e
I
V
CC
Max, V
7V
I
I
I
0.1
mA
e
e
e
Input Voltage
V
10V
2.7V
0.4V
e
e
e
I
I
I
High Level Input Current
Low Level Input Current
V
CC
V
CC
V
CC
Max, V
Max, V
Max
20
mA
IH
IL
I
b
0.8
100
100
mA
I
b
b
b
b
Short Circuit
DM54
DM74
20
20
OS
mA
mA
Output Current
(Note 2)
e
CC
I
Supply Current
V
Max
65
CC
e
e
25 C.
Note 1: All typicals are at V
5V, T
§
Note 2: Not more than one output should be shorted at a time, and the duration should not exceed one second.
CC
A
2
e a
e a
25 C
Switching Characteristics V
5.0V, T
§
CC
A
DM54LS503
R
DM74LS503
e
15 pF
e
Symbol
Parameter
Units
2 kX, C
L
L
Min
Max
Min
Max
f
Maximum Count Frequency
25
15
MHz
ns
max
t
t
Propagation Delay
CP to Qn or CC
35
25
35
25
PLH
PHL
t
t
Propagation Delay
E to Q7
20
24
20
24
PLH
ns
PHL
Logic Diagram
TL/F/10190–3
Note: Cell logic is repeated for register stages Q5 to Q1.
Connection for Longer Word Lengths
TL/F/10190–4
3
Physical Dimensions inches (millimeters)
16-Lead Ceramic Dual-In-Line Package (J)
Order Number DM54LS503J
NS Package Number J16A
4
Physical Dimensions inches (millimeters) (Continued)
16-Lead Wide Small Outline Molded Package (M)
Order Number DM74LS503WM
NS Package Number M16B
16-Lead Molded Dual-In-Line Package (N)
Order Number DM74LS503N
NS Package Number N16E
5
Physical Dimensions inches (millimeters) (Continued)
16-Lead Ceramic Flat Package (W)
Order Number DM54LS503W
NS Package Number W16A
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