DM5490W [NSC]
Decade and Binary Counters; 十年和二进制计数器
| 型号： | DM5490W |
| 厂家： | 
National Semiconductor |
| 描述： | Decade and Binary Counters |
| 文件： | 总10页 (文件大小：136K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
July 1992
DM5490/DM7490A, DM7493A
Decade and Binary Counters
General Description
Each of these monolithic counters contains four master-
slave flip-flops and additional gating to provide a divide-by-
two counter and a three-stage binary counter for which the
count cycle length is divide-by-five for the 90A and divide-
by-eight for the 93A.
described in the appropriate truth table. A symmetrical di-
vide-by-ten count can be obtained from the 90A counters by
connecting the Q output to the A input and applying the
D
input count to the B input which gives a divide-by-ten square
wave at output Q .
A
All of these counters have a gated zero reset and the 90A
also has gated set-to-nine inputs for use in BCD nine’s com-
plement applications.
Features
Y
Typical power dissipation
145 mW
130 mW
Ð 90A
Ð 93A
To use their maximum count length (decade or four-bit bina-
ry), the B input is connected to the Q output. The input
A
count pulses are applied to input A and the outputs are as
Y
Count frequency 42 MHz
Connection Diagrams
Dual-In-Line Package
TL/F/6533–1
Order Number DM5490J, DM5490W or DM7490AN
See NS Package Number J14A, N14A or W14B
Dual-In-Line Package
TL/F/6533–2
Order Number DM7493AN
See NS Package Number N14A
C
1995 National Semiconductor Corporation
TL/F/6533
RRD-B30M105/Printed in U. S. A.
Absolute Maximum Ratings (Note)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Note: The ‘‘Absolute Maximum Ratings’’ are those values
beyond which the safety of the device cannot be guaran-
teed. The device should not be operated at these limits. The
parametric values defined in the ‘‘Electrical Characteristics’’
table are not guaranteed at the absolute maximum ratings.
The ‘‘Recommended Operating Conditions’’ table will define
the conditions for actual device operation.
Supply Voltage
Input Voltage
7V
5.5V
Operating Free Air Temperature Range
DM54
DM74
b
b
a
55 C to 125 C
§
0 C to 70 C
§
a
§
§
a
65 C to 150 C
Storage Temperature Range
§
§
Recommended Operating Conditions
DM5490
Nom
5
DM7490A
Symbol
Parameter
Units
Min
4.5
2
Max
Min
4.75
2
Nom
Max
V
V
V
Supply Voltage
5.5
5
5.25
V
V
CC
High Level Input Voltage
Low Level Input Voltage
High Level Output Current
Low Level Output Current
IH
0.8
0.8
V
IL
b
b
I
I
0.8
0.8
mA
mA
OH
OL
16
16
f
Clock Frequency
(Note 5)
A
0
32
16
0
0
32
16
CLK
MHz
B
0
t
Pulse Width
(Note 5)
A
15
30
15
25
15
30
15
25
0
W
B
ns
ns
Reset
t
Reset Release Time (Note 5)
Free Air Operating Temperature
REL
b
T
55
125
70
C
§
A
’90A Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Typ
(Note 1)
Symbol
Parameter
Conditions
Min
Max
Units
e
e
e b
e
b
1.5
V
V
Input Clamp Voltage
V
Min, I
Min, I
12 mA
V
V
I
CC
I
High Level Output
Voltage
V
V
Max
Min
OH
CC
OH
2.4
3.4
0.2
e
e
Max, V
IL
IH
e
e
e
V
OL
Low Level Output
Voltage
V
CC
V
IH
Min, I
OL
Min, V
Max
0.4
V
e
Max (Note 4)
e
5.5V
IL
@
Input Current Max
Input Voltage
e
I
I
V
CC
Max, V
I
I
1
mA
e
2.7V
High Level Input
Current
V
V
Max
A
80
40
IH
CC
e
I
Reset
mA
B
120
e
0.4V
b
I
Low Level Input
Current
V
V
Max
A
3.2
1.6
4.8
IL
CC
e
I
b
b
Reset
B
mA
e
(Note 2)
b
b
b
I
I
Short Circuit
Output Current
V
CC
Max
DM54
DM74
20
18
57
57
OS
CC
mA
mA
b
e
Supply Current
V
CC
Max (Note 3)
29
42
e
e
25 C.
Note 1: All typicals are at V
5V, T
§
CC
Note 2: Not more than one output should be shorted at a time.
Note 3: I is measured with all outputs open, both RO inputs grounded following momentary connection to 4.5V, and all other inputs grounded.
A
CC
Note 4: Q outputs are tested at I
e
Max plus the limit value of I for the B input. This permits driving the B input while maintaining full fan-out capability.
IL
A
OL
5V.
e
e
Note 5: T
25 C and V
§
CC
A
2
’90A Switching Characteristics
5V and T
e
e
A
at V
25 C (See Section 1 for Test Waveforms and Output Load)
§
CC
e
e
R
400X
15 pF
L
From (Input)
To (Output)
Symbol
Parameter
C
L
Units
Min
32
Max
f
Maximum Clock
Frequency
A to Q
B to Q
MAX
A
MHz
16
B
t
t
t
t
t
t
t
t
t
t
t
t
t
Propagation Delay Time
Low to High Level Output
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PHL
A to Q
A to Q
A to Q
A to Q
B to Q
B to Q
B to Q
B to Q
B to Q
B to Q
16
18
48
50
16
21
32
35
32
35
30
40
40
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
A
A
D
D
B
B
C
C
D
D
Propagation Delay Time
High to Low Level Output
Propagation Delay Time
Low to High Level Output
Propagation Delay Time
High to Low Level Output
Propagation Delay Time
Low to High Level Output
Propagation Delay Time
High to Low Level Output
Propagation Delay Time
Low to High Level Output
Propagation Delay Time
High to Low Level Output
Propagation Delay Time
Low to High Level Output
Propagation Delay Time
High to Low Level Output
Propagation Delay Time
Low to High Level Output
SET-9 to
Q , Q
A
D
Propagation Delay Time
High to Low Level Output
SET-9 to
Q , Q
B
C
Propagation Delay Time
High to Low Level Output
SET-0
Any Q
3
Recommended Operating Conditions
DM7493A
Symbol
Parameter
Units
Min
4.75
2
Nom
Max
V
V
V
Supply Voltage
5
5.25
V
V
CC
High Level Input Voltage
Low Level Input Voltage
High Level Output Current
Low Level Output Current
IH
0.8
V
IL
b
I
I
0.8
mA
mA
OH
16
OL
f
Clock Frequency
(Note 5)
A
0
0
32
16
CLK
W
MHz
B
t
Pulse Width
(Note 5)
A
15
30
15
25
0
B
ns
ns
Reset
t
Reset Release Time (Note 5)
Free Air Operating Temperature
REL
T
70
C
§
A
’93A Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Typ
(Note 1)
Symbol
Parameter
Conditions
Min
Max
Units
e
e
e b
e
b
1.5
V
V
Input Clamp Voltage
V
Min, I
Min, I
12 mA
V
V
I
CC
I
High Level Output
Voltage
V
V
Max
Min
OH
CC
OH
2.4
3.4
0.2
e
e
Max, V
IL
IH
e
e
e
V
OL
Low Level Output
Voltage
V
CC
V
IH
Min, I
OL
Min, V
Max
0.4
V
e
Max (Note 4)
e
5.5V
IL
@
Input Current Max
Input Voltage
e
I
I
V
CC
Max, V
I
I
1
mA
e
2.4V
High Level Input
Current
V
V
Max
Reset
40
80
80
IH
CC
e
I
A
mA
B
e
0.4V
b
I
Low Level Input
Current
V
V
Max
Reset
1.6
3.2
3.2
IL
CC
e
I
b
b
A
B
mA
e
(Note 2)
I
I
Short Circuit
Output Current
V
Max
OS
CC
CC
b
b
18
57
39
mA
mA
e
Supply Current
V
CC
Max (Note 3)
26
e
e
25 C.
Note 1: All typicals are at V
5V, T
§
CC
Note 2: Not more than one output should be shorted at a time.
Note 3: I is measured with all outputs open, both R0 inputs grounded following momentary connection to 4.5V and all other inputs grounded.
A
CC
Note 4: Q outputs are tested at I
e
Max plus the limit value of I for the B input. This permits driving the B input while maintaining full fan-out capability.
IL
A
OL
5V.
e
e
Note 5: T
25 C and V
§
CC
A
4
’93A Switching Characteristics
e
e
at V
CC
5V and T
25 C (See Section 1 for Test Waveforms and Output Load)
§
A
e
e
R
400X
15 pF
L
From (Input)
To (Output)
Symbol
Parameter
C
L
Units
Min
32
Max
f
Maximum Clock
Frequency
A to Q
B to Q
A to
MHz
MAX
A
16
B
t
t
t
t
t
t
t
t
t
t
t
Propagation Delay Time
Low to High Level Output
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PHL
16
18
70
70
16
21
32
35
51
51
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Q
A
Propagation Delay Time
High to Low Level Output
A to
Q
A
Propagation Delay Time
Low to High Level Output
A to
Q
D
Propagation Delay Time
High to Low Level Output
A to
Q
D
Propagation Delay Time
Low to High Level Output
B to
Q
B
Propagation Delay Time
High to Low Level Output
B to
Q
B
Propagation Delay Time
Low to High Level Output
B to
Q
C
Propagation Delay Time
High to Low Level Output
B to
Q
C
Propagation Delay Time
Low to High Level Output
B to
Q
D
Propagation Delay Time
High to Low Level Output
B to
Q
D
Propagation Delay Time
High to Low Level Output
SET-0
to
Any Q
40
ns
5
Function Tables (Note D)
90A
BCD Count Sequence
(See Note A)
90A
BCD Bi-Quinary (5-2)
(See Note B)
93A
Count Sequence
(See Note C)
Outputs
Count
Outputs
Outputs
Count
Count
Q
Q
C
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
A
D
B
A
A
D
C
B
D
C
B
0
1
2
3
4
5
6
7
8
9
L
L
L
L
L
L
H
L
H
L
0
1
2
3
4
5
6
7
8
9
L
L
L
L
L
L
L
L
H
L
H
L
0
1
2
3
4
L
L
L
L
L
L
L
L
L
L
H
L
H
L
L
L
L
L
L
L
L
H
H
L
H
H
L
L
L
L
H
L
L
L
L
H
L
H
H
L
L
H
H
L
L
L
H
H
H
H
L
H
H
H
H
L
L
L
L
H
H
H
H
L
H
L
H
L
H
H
H
H
H
L
L
H
H
L
L
H
L
H
L
5
6
7
8
L
L
L
L
H
L
H
L
H
L
H
L
H
H
L
H
H
L
H
H
H
H
H
H
H
H
L
L
H
9
L
10
11
12
13
14
15
H
H
L
L
H
H
H
L
H
90A
Reset/Count Function Table
93A
Reset/Count Function Table
Reset Inputs
Outputs
Reset Inputs Outputs
R0(1) R0(2)
R0(1) R0(2) R9(1) R9(2)
Q
D
Q
Q
Q
Q
D
Q
Q
Q
C
B
A
C
B
A
H
H
X
X
L
H
H
X
L
X
X
L
L
X
H
X
L
X
L
H
L
X
L
X
L
L
H
L
L
L
L
L
L
L
L
H
H
L
X
H
X
L
L
L
L
L
COUNT
COUNT
COUNT
COUNT
COUNT
COUNT
Note A: Output Q is connected to input B for BCD count.
A
Note B: Output Q is connected to input A for bi-quinary count.
D
L
X
X
L
Note C: Output Q is connected to input B.
A
e
e
e
Low Level, X Don’t Care.
Note D: H
High Level, L
6
Logic Diagrams
90A
93A
TL/F/6533–4
TL/F/6533–3
The J and K inputs shown without connection are for reference only and are functionally at a high level.
7
8
Physical Dimensions inches (millimeters)
14-Lead Ceramic Dual-In-Line Package (J)
Order Number DM5490J
NS Package Number J14A
14-Lead Molded Dual-In-Line Package (N)
Order Number DM7490AN or DM7493AN
NS Package Number N14A
9
Physical Dimensions inches (millimeters) (Continued)
14-Lead Ceramic Flat Package (W)
Order Number DM5490W
NS Package Number W14B
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NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and whose
failure to perform, when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
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Corporation
National Semiconductor
Europe
National Semiconductor
Hong Kong Ltd.
National Semiconductor
Japan Ltd.
a
1111 West Bardin Road
Arlington, TX 76017
Tel: 1(800) 272-9959
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Fax:
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@
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Italiano Tel:
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(
(
(
49) 0-180-530 85 85
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National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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