CD40174BM [NSC]
Hex D Flip-Flop; 六路D触发器![CD40174BM](http://pdffile.icpdf.com/pdf1/p00083/img/icpdf/CD40174_438465_icpdf.jpg)
型号: | CD40174BM |
厂家: | ![]() |
描述: | Hex D Flip-Flop |
文件: | 总6页 (文件大小:137K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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February 1988
CD40174BM/CD40174BC Hex D Flip-Flop
CD40175BM/CD40175BC Quad D Flip-Flop
General Description
The CD40174B consists of six positive-edge triggered
D-type flip-flops; the true outputs from each flip-flop are ex-
ternally available. The CD40175B consists of four positive-
edge triggered D-type flip-flops; both the true and comple-
ment outputs from each flip-flop are externally available.
All inputs are protected from static discharge by diode
clamps to V and V
.
SS
DD
Features
Y
Wide supply voltage range
High noise immunity
Low power TTL
3V to 15V
0.45 V (typ.)
All flip-flops are controlled by a common clock and a com-
mon clear. Information at the D inputs meeting the set-up
time requirements is transferred to the Q outputs on the
positive-going edge of the clock pulse. The clearing opera-
tion, enabled by a negative pulse at Clear input, clears all Q
outputs to logical ‘‘0’’ and Qs (CD40175B only) to logical ‘‘1’’.
Y
Y
DD
fan out of 2 driving 74L
or 1 driving 74 LS
compatibility
Y
Y
Equivalent to MC14174B, MC14175B
Equivalent to MM74C174, MM74C175
Connection Diagrams
CD40174B
Dual-In-Line Package
CD40175B
Dual-In-Line Package
TL/F/5987–1
TL/F/5987–2
Top View
Top View
Order Number CD40174B or CD40175B
Truth Table
Inputs
Clock
Outputs
Clear
D
Q
Q*
L
H
H
H
H
X
u
u
H
X
H
L
L
H
H
L
L
H
X
X
NC
NC
NC
NC
L
e
e
e
e
e
e
H
High level
Low level
Irrelevant
L
X
Transition from low to high level
No change
u
NC
*
Q for CD40175B only
C
1995 National Semiconductor Corporation
TL/F/5987
RRD-B30M105/Printed in U. S. A.
Absolute Maximum Ratings (Notes 1 & 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Recommended Operating
Conditions (Note 2)
DC Supply Voltage (V
)
DD
3V to 15 V
DC
Input Voltage (V
)
IN
0V to V V
DD DC
b
a
0.5V to 18V
DC Supply Voltage (V
)
DD
Operating Temperature Range (T )
A
b
a
0.5V
DC
Input Voltage (V
IN
)
0.5V to V
DD
b
b
a
55 C to 125 C
CD40XXXBM
CD40XXXBC
§
40 C to 85 C
§
§
b
a
65 C to 150 C
Storage Temperature Range (T )
S
§
§
a
§
Power Dissipation (P )
D
Dual-In-Line
Small Outline
700 mW
500 mW
Lead Temperature (T )
L
(Soldering, 10 seconds)
260 C
§
DC Electrical Characteristics CD40174BM/CD40175BM (Note 2)
b
a
a
55 C
§
25 C
§
125 C
§
Symbol
Parameter
Conditions
Units
Min
Max
Min
Typ
Max
Min
Max
e
e
e
e
V
I
Quiescent Device Current
V
DD
V
DD
V
DD
5V, V
IN
or V
DD SS
1.0
2.0
4.0
1.0
2.0
4.0
30
60
mA
mA
mA
DD
e
10V, V
15V, V
V
V
or V
IN
IN
DD
DD
SS
SS
e
or V
120
k
1 mA
V
Low Level Output Voltage
High Level Output Voltage
I
OL
l
O
l
e
e
e
V
5V
0.05
0.05
0.05
0.05
0.05
0.05
0.05
0.05
0.05
V
V
V
DD
DD
DD
V
V
10V
15V
k
V
OH
I
1 mA
l
O
l
e
e
e
V
5V
4.95
9.95
4.95
9.95
5
4.95
9.95
V
V
V
DD
DD
DD
V
V
10V
15V
10
15
14.95
14.95
14.95
e
e
e
e
0.5V or 4.5V
V
V
Low Level Input Voltage
High Level Input Voltage
V
V
V
5V, V
O
1.5
3.0
4.0
1.5
3.0
4.0
1.5
3.0
4.0
V
V
V
IL
DD
DD
DD
e
e
10V, V
15V, V
1V or 9V
O
O
1.5V or 13.5V
e
e
e
e
0.5V or 4.5V
V
DD
V
DD
V
DD
5V, V
O
3.5
7.0
3.5
7.0
3.5
7.0
V
V
V
IH
e
e
10V, V
15V, V
1V or 9V
O
O
1.5V or 13.5V 11.0
11.0
11.0
e
e
e
e
0.4V
I
I
I
Low Level Output Current
(Note 3)
V
V
V
5V, V
O
0.64
1.6
0.51
1.3
0.88
2.25
8.8
0.36
0.9
mA
mA
mA
OL
DD
DD
DD
e
e
10V, V
15V, V
0.5V
1.5V
O
O
4.2
3.4
2.4
e
e
e
e
5V, V
O
b
b
b
b
0.36
High Level Output Current
(Note 3)
V
DD
V
DD
V
DD
4.6V
0.64
0.51
0.8.8
mA
mA
mA
OH
IN
e
e
b
b
b
b
b
b
b
10V, V
15V, V
9.5V
1.6
4.2
1.3
3.4
2.25
0.9
2.4
O
O
b
13.5V
8.8
b
5
e
e
e
e
b
b
b
b
1.0 mA
Input Current
V
V
15V, V
15V, V
0V
0.1
10
0.1
DD
IN
10b
0.1
1.0
mA
5
15V
0.1
DD
IN
DC Electrical Characteristics CD40174BC/CD40175BC (Note 2)
b
a
a
85 C
40 C
§
25 C
§
§
Symbol
Parameter
Conditions
Units
Min Max Min Typ Max Min Max
e
e
e
e
V
I
Quiescent Device Current
V
DD
V
DD
V
DD
5V, V
IN
or V
DD SS
4
8
4
8
30
60
mA
mA
mA
DD
e
10V, V
15V, V
V
V
or V
IN
IN
DD
DD
SS
SS
e
or V
16
16
120
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices
should be operated at these limits. The tables of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provide conditions for actual device
operation.
e
Note 2: V
0V unless otherwise specified.
and I are tested one output at a time.
SS
Note 3: I
OH
OL
2
DC Electrical Characteristics CD40174BC/CD40175BC (Note 2) (Continued)
b
a
a
85 C
40 C
§
25 C
§
§
Symbol
Parameter
Conditions
Units
Min
Max
Min
Typ
Max
Min Max
e
e
e
V
V
V
V
Low Level Output Voltage
V
V
V
5V
0.05
0.05
0.05
0.05
0.05
0.05
0.05
0.05
0.05
V
V
V
OL
OH
IL
DD
DD
DD
10V
15V
e
e
e
High Level Output Voltage V
5V
4.95
9.95
4.95
9.95
5
4.95
9.95
V
V
V
DD
DD
DD
V
V
10V
15V
10
15
14.95
14.95
14.95
e
e
e
e
0.5V or 4.5V
Low Level Input Voltage
High Level Input Voltage
V
DD
V
DD
V
DD
5V, V
1.5
3.0
4.0
1.5
3.0
4.0
1.5
3.0
4.0
V
V
V
O
e
10V, V
15V, V
1V or 9V
O
e
1.5V or 13.5V
O
e
e
e
e
0.5V or 4.5V
V
DD
V
DD
V
DD
5V, V
O
3.5
7.0
3.5
7.0
3.5
7.0
V
V
V
IH
e
e
10V, V
15V, V
1V or 9V
O
O
1.5V or 13.5V 11.0
11.0
11.0
e
e
e
e
0.4V
I
I
I
Low Level Output Current
(Note 3)
V
V
V
5V, V
O
0.52
1.3
0.44
1.1
0.88
2.25
8.8
0.36
0.9
mA
mA
mA
OL
DD
DD
DD
e
e
10V, V
15V, V
0.5V
1.5V
O
O
3.6
3.0
2.4
e
e
e
e
5V, V
O
b
b
b
b
b
0.36
High Level Output Current
(Note 3)
V
DD
V
DD
V
DD
4.6V
0.52
0.44
0.88
2.25
mA
mA
mA
OH
IN
e
e
b
b
b
b
b
b
10V, V
15V, V
9.5V
1.3
3.6
1.1
3.0
0.9
2.4
O
O
b
13.5V
8.8
b
5
e
e
e
e
b
b
b
b
1.0 mA
Input Current
V
V
15V, V
15V, V
0V
0.30
10
0.30
DD
IN
10b
0.30
1.0
mA
5
15V
0.30
DD
IN
AC Electrical Characteristics*
e
t
f
e
e
e
e
T
A
25 C, C
§
50 pF, R
200k and t
20 ns, unless otherwise specified
Conditions Min
L
L
r
Symbol
Parameter
Propagation Delay Time to a
Logical ‘‘0’’ or Logical ‘‘1’’ from
Typ
Max
Units
e
e
e
t
, t
PHL PLH
V
DD
V
DD
V
DD
5V
190
75
300
110
90
ns
ns
ns
10V
15V
Clock to Q or Q (CD40175 Only)
60
e
e
e
t
t
t
t
t
t
Propagation Delay Time to a
Logical ‘‘0’’ from Clear to Q
V
V
V
5V
180
70
300
110
90
ns
ns
ns
PHL
PLH
SU
H
DD
DD
DD
10V
15V
60
e
e
e
Propagation Delay Time to a Logical
‘‘1’’ from Clear to Q (CD40175 Only)
V
DD
V
DD
V
DD
5V
230
90
400
150
120
ns
ns
ns
10V
15V
75
e
e
e
Time Prior to Clock Pulse that
Data must be Present
V
DD
V
DD
V
DD
5V
45
15
13
100
40
ns
ns
ns
10V
15V
35
e
e
e
b
11
Time after Clock Pulse that
Data Must be Held
V
DD
V
DD
V
DD
5V
0
0
0
ns
ns
ns
b
b
10V
15V
4
3
e
e
e
, t
THL TLH
Transition Time
V
DD
V
DD
V
DD
5V
100
50
200
100
80
ns
ns
ns
10V
15V
40
e
e
e
, t
WH WL
Minimum Clock Pulse Width
V
DD
V
DD
V
DD
5V
130
45
250
100
80
ns
ns
ns
10V
15V
40
3
AC Electrical Characteristics*
e
t 20 ns, unless otherwise specified (Continued)
f
e
e
e
e
T
A
25 C, C
§
50 pF, R
200k and t
L
L
r
Symbol
Parameter
Conditions
Min
Typ
Max
Units
e
e
e
t
t
t
f
Minimum Clear Pulse Width
Maximum Clock Rise Time
Maximum Clock Fall Time
Maximum Clock Frequency
V
V
V
5V
120
45
250
100
80
ns
ns
ns
WL
RCL
fCL
CL
DD
DD
DD
10V
15V
40
e
e
e
V
DD
V
DD
V
DD
5V
15
5.0
5.0
ms
ms
ms
10V
15V
e
e
e
V
DD
V
DD
V
DD
5V
15
5.0
5.0
50
50
50
ms
ms
ms
10V
15V
e
e
e
V
DD
V
DD
V
DD
5V
2.0
5.0
6.0
3.5
10
12
MHz
MHz
MHz
10V
15V
C
C
Input Capacitance
Power Dissipation
Clear Input
Other Input
10
15
pF
pF
IN
5.0
7.5
Per Package (Note 4)
130
pF
PD
*AC Parameters are guaranteed by DC correlated testing.
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the
devices should be operated at these limits. The tables of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provide conditions for actual
device operation.
e
Note 2: V
0V unless otherwise specified.
and I are tested one output at a time.
SS
Note 3: I
OH
OL
Note 4: C determines the no load AC power consumption of any CMOS device. For complete explanation, see 54C/74C Family Characteristics application
PD
note, AN-90.
Switching Time Waveforms
TL/F/5987–3
e
e
t
r
t
20 ns
f
4
Physical Dimensions inches (millimeters)
Ceramic Dual-In-Line Package (J)
Order Number CD40174BMJ, CD40174BCJ, CD40175BMJ or CD40175BCJ
NS Package Number J16A
5
Physical Dimensions inches (millimeters) (Continued)
Molded Dual-In-Line Package (N)
Order Number CD40174BMN, CD40174BCN, CD40174BMN or CD40175BCN
NS Package Number N16E
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and whose
failure to perform, when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
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Corporation
National Semiconductor
Europe
National Semiconductor
Hong Kong Ltd.
National Semiconductor
Japan Ltd.
a
1111 West Bardin Road
Arlington, TX 76017
Tel: 1(800) 272-9959
Fax: 1(800) 737-7018
Fax:
(
49) 0-180-530 85 86
@
13th Floor, Straight Block,
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(
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(
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National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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