74F164AFM [NSC]

Serial-In, Parallel-Out Shift Register; 串行输入,并行输出移位寄存器
74F164AFM
型号: 74F164AFM
厂家: National Semiconductor    National Semiconductor
描述:

Serial-In, Parallel-Out Shift Register
串行输入,并行输出移位寄存器

移位寄存器 触发器 逻辑集成电路
文件: 总8页 (文件大小:159K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
January 1995  
54F/74F164A  
Serial-In, Parallel-Out Shift Register  
General Description  
Features  
Y
Typical shift frequency of 90 MHz  
The ’F164A is a high-speed 8-bit serial-in/parallel-out shift  
register. Serial data is entered through a 2-input AND gate  
synchronous with the LOW-to-HIGH transition of the clock.  
The device features an asynchronous Master Reset which  
clears the register, setting all outputs LOW independent of  
the clock. The ’F164A is a faster version of the ’F164.  
Y
Asynchronous Master Reset  
Y
Gated serial data input  
Y
Fully synchronous data transfers  
Y
Guaranteed 4000V min ESD protection  
’F164A is a faster version of the ’F164  
Y
Package  
Number  
Commercial  
74F164APC  
Military  
Package Description  
N14A  
J14A  
14-Lead (0.300 Wide) Molded Dual-In-Line  
×
54F164ADM (Note 2)  
14-Lead Ceramic Dual-In-Line  
74F164ASC (Note 1)  
74F164ASJ (Note 1)  
M14A  
M14D  
W14B  
E20A  
14-Lead (0.150 Wide) Molded Small Outline, JEDEC  
×
14-Lead (0.300 Wide) Molded Small Outline, EIAJ  
×
74F164AFM (Note 2)  
74F164ALM (Note 2)  
14-Lead Cerpack  
20-Lead Ceramic Leadless Chip Carrier, Type C  
e
Note 1: Devices also available in 13 reel. Use suffix  
SCX and SJX.  
×
Note 2: Military grade device with environmental and burn-in processing. Use suffix  
e
DMQB, FMQB and LMQB.  
Logic Symbols  
IEEE/IEC  
TL/F/10613–1  
TL/F/10613–4  
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.  
C
1995 National Semiconductor Corporation  
TL/F/10613  
RRD-B30M75/Printed in U. S. A.  
Connection Diagrams  
Pin Assignment for  
DIP, SOIC and Flatpak  
Pin Assignment  
for LCC  
TL/F/10613–2  
TL/F/10613–3  
Unit Loading/Fan Out  
54F/74F  
Pin Names  
Description  
U.L.  
Input I /I  
IH IL  
Output I /I  
HIGH/LOW  
OH OL  
b
20 mA/ 0.6 mA  
b
20 mA/ 0.6 mA  
b
20 mA/ 0.6 mA  
A, B  
CP  
Data Inputs  
1.0/1.0  
1.0/1.0  
1.0/1.0  
50/33.3  
Clock Pulse Input (Active Rising Edge)  
Master Reset Input (Active LOW)  
Outputs  
MR  
b
Q Q  
0
1 mA/20 mA  
7
Functional Description  
The ’F164A is an edge-triggered 8-bit shift register with seri-  
al data entry and an output from each of the eight stages.  
Data is entered serially through one of two inputs (A or B);  
either of these inputs can be used as an active HIGH En-  
able for data entry through the other input. An unused input  
must be tied HIGH.  
Mode Select Table  
Inputs  
Outputs  
Operating  
Mode  
MR  
A
B
Q
Q Q  
1
0
7
Reset (Clear)  
L
X
X
L
L-L  
H
H
H
H
l
l
L
L
q q  
0
Each LOW-to-HIGH transition on the Clock (CP) input shifts  
data one place to the right and enters into Q the logical  
0
6
l
h
l
q q  
0 6  
Shift  
AND of the two data inputs (A B) that existed before the  
#
h
h
L
q q  
0
6
6
rising clock edge. A LOW level on the Master Reset (MR)  
input overrides all other inputs and clears the register asyn-  
chronously, forcing all Q outputs LOW.  
h
H
q q  
0
e
H(h)  
HIGH Voltage Levels  
e
L(l)  
LOW Voltage Levels  
Immaterial  
e
X
e
one setup time prior to the LOW-to-HIGH clock transition.  
q
n
Lower case letters indicate the state of the referenced input or output  
Logic Diagram  
TL/F/10613–5  
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.  
2
Absolute Maximum Ratings (Note 1)  
If Military/Aerospace specified devices are required,  
please contact the National Semiconductor Sales  
Office/Distributors for availability and specifications.  
Recommended Operating  
Conditions  
Free Air Ambient Temperature  
Military  
Commercial  
b
a
55 C to 125 C  
§
0 C to 70 C  
§
§
b
b
a
65 C to 150 C  
Storage Temperature  
§
§
§
§
§
a
§
a
55 C to 125 C  
Ambient Temperature under Bias  
§
Supply Voltage  
Military  
Commercial  
b
b
a
a a  
4.5V to 5.5V  
a a  
4.5V to 5.5V  
Junction Temperature under Bias  
Plastic  
55 C to 175 C  
§
§
a
55 C to 150 C  
V
Pin Potential to  
CC  
Ground Pin  
b
a
0.5V to 7.0V  
b
a
0.5V to 7.0V  
Input Voltage (Note 2)  
Input Current (Note 2)  
Voltage Applied to Output  
b
a
30 mA to 5.0 mA  
e
in HIGH State (with V  
Standard Output  
0V)  
CC  
b
0.5V to 5.5V  
0.5V to V  
CC  
b
a
TRI-STATE Output  
É
Current Applied to Output  
in LOW State (Max)  
twice the rated I (mA)  
OL  
ESD Last Passing Voltage (Min)  
4000V  
Note 1: Absolute maximum ratings are values beyond which the device may  
be damaged or have its useful life impaired. Functional operation under  
these conditions is not implied.  
Note 2: Either voltage limit or current limit is sufficient to protect inputs.  
DC Electrical Characteristics  
54F/74F  
Symbol  
Parameter  
Units  
V
CC  
Conditions  
Min  
Typ  
Max  
V
V
V
V
Input HIGH Voltage  
2.0  
V
V
V
Recognized as a HIGH Signal  
Recognized as a LOW Signal  
IH  
Input LOW Voltage  
0.8  
IL  
b
e b  
18 mA  
Input Clamp Diode Voltage  
1.2  
Min  
Min  
I
IN  
CD  
OH  
e b  
e b  
e b  
Output HIGH  
Voltage  
54F 10% V  
2.5  
2.5  
2.7  
I
I
I
1 mA  
1 mA  
1 mA  
CC  
OH  
OH  
OH  
74F 10% V  
74F 5% V  
V
CC  
CC  
e
e
V
Output LOW  
Voltage  
54F 10% V  
74F 10% V  
0.5  
I
I
20 mA  
20 mA  
OL  
CC  
OL  
V
Min  
Max  
Max  
Max  
0.0  
0.5  
CC  
OL  
I
I
I
Input HIGH  
Current  
54F  
74F  
20.0  
5.0  
IH  
e
e
mA  
mA  
mA  
V
V
V
V
2.7V  
7.0V  
IN  
Input HIGH Current  
Breakdown Test  
54F  
74F  
100  
7.0  
BVI  
IN  
Output HIGH  
54F  
74F  
250  
50  
CEX  
e
V
CC  
OUT  
Leakage Current  
e
All other pins grounded  
V
ID  
Input Leakage  
Test  
I
ID  
1.9 mA  
74F  
74F  
4.75  
e
IOD  
I
Output Leakage  
Circuit Current  
V
150 mV  
OD  
3.75  
mA  
0.0  
All other pins grounded  
b
e
I
I
I
Input LOW Current  
0.6  
mA  
mA  
Max  
Max  
V
V
0.5V  
IL  
IN  
b
b
e
0V  
Output Short-Circuit Current  
Power Supply Current  
60  
150  
OS  
CC  
OUT  
e
e
CP  
HIGH  
35  
55  
mA  
Max  
e
GND  
MR  
GND, A, B  
3
AC Electrical Characteristics  
74F  
54F  
74F  
e a  
T
25 C  
§
5.0V  
A
e
50 pF  
e
50 pF  
T
, V  
CC  
e
Mil  
T
, V  
A CC  
Com  
A
e a  
Symbol  
Parameter  
V
Units  
CC  
e
C
C
L
L
e
C
50 pF  
L
Min  
Typ  
Max  
Min  
Max  
Min  
Max  
f
Maximum Clock Frequency  
Propagation Delay  
80  
120  
60  
80  
MHz  
ns  
max  
t
t
3.0  
3.5  
4.8  
5.0  
7.5  
8.0  
2.5  
3.0  
9.0  
8.5  
3.0  
3.5  
7.5  
8.0  
PLH  
CP to Q  
PHL  
n
t
Propagation Delay  
MR to Q  
PHL  
5.0  
7.0  
10.0  
4.0  
12.5  
5.0  
10.5  
ns  
n
AC Operating Requirements  
74F  
54F  
74F  
e a  
T
25 C  
§
5.0V  
A
e
e
Symbol  
Parameter  
T
, V  
CC  
Mil  
Max  
T
, V  
A CC  
Com  
Max  
Units  
A
e a  
V
CC  
Min  
Max  
Min  
Min  
t (H)  
s
Setup Time, HIGH or LOW  
A or B to CP  
4.5  
4.0  
5.5  
4.0  
4.5  
4.0  
t (L)  
s
ns  
t (H)  
h
Hold Time, HIGH or LOW  
A or B to CP  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
t (L)  
h
t
t
(H)  
(L)  
CP Pulse Width  
HIGH or LOW  
4.0  
7.0  
4.0  
7.0  
4.0  
7.0  
w
ns  
ns  
ns  
w
t
t
(L)  
MR Pulse Width, LOW  
4.0  
5.0  
5.0  
6.5  
4.0  
5.0  
w
Recovery Time  
MR to CP  
rec  
Ordering Information  
The device number is used to form part of a simplified purchasing code where the package type and temperature range are  
defined as follows:  
74F 164A  
S
C
X
Temperature Range Family  
Special Variations  
e
e
e
74F  
54F  
Commercial  
Military  
QB  
Military grade device with  
environmental and burn-in  
processing  
Device Type  
e
X
Devices shipped in 13 reel  
×
Package Code  
Temperature Range  
e
e
e
e
e
e
P
D
S
SJ  
L
F
Plastic DIP  
Ceramic DIP  
Small Outline Package SOIC JEDEC  
Small Outline SOIC EIAJ  
Package Leadless Chip Carrier (LCC)  
Flatpak  
e
e
a
C
M
Commercial (0 C to 70 C)  
§
§
b a  
Military ( 55 C to 125 C)  
§
§
4
Physical Dimensions inches (millimeters)  
20-Lead Ceramic Leadless Chip Carrier, Type C (L)  
NS Package Number E20A  
14-Lead Ceramic Dual-In-Line Package (D)  
NS Package Number J14A  
5
Physical Dimensions inches (millimeters) (Continued)  
14-Lead (0.150 Wide) Molded Small Outline Package, JEDEC (S)  
×
NS Package Number M14A  
6
Physical Dimensions inches (millimeters) (Continued)  
14-Lead (0.300 Wide) Molded Small Outline Package, EIAJ (SJ)  
×
NS Package Number M14D  
14-Lead (0.300 Wide) Plastic Dual-In-Line Package (P)  
×
NS Package Number N14A  
7
Physical Dimensions inches (millimeters) (Continued)  
14-Lead Cerpack (F)  
NS Package Number W14B  
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DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL  
SEMICONDUCTOR CORPORATION. As used herein:  
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systems which, (a) are intended for surgical implant  
into the body, or (b) support or sustain life, and whose  
failure to perform, when properly used in accordance  
with instructions for use provided in the labeling, can  
be reasonably expected to result in a significant injury  
to the user.  
2. A critical component is any component of a life  
support device or system whose failure to perform can  
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