74ABT16952CSSC [NSC]
16-Bit Registered Transceiver with TRI-STATE Outputs; 16位寄存收发器，具有三态输出
| 型号： | 74ABT16952CSSC |
| 厂家： | 
National Semiconductor |
| 描述： | 16-Bit Registered Transceiver with TRI-STATE Outputs |
| 文件： | 总8页 (文件大小：149K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
September 1996
74ABT16952
16-Bit Registered Transceiver with TRI-STATE Outputs
É
General Description
The ’ABT16952 is a 16-bit registered transceiver. Two 8-bit
back to back registers store data flowing in both directions
between two bidirectional buses. Separate clock, clock en-
Features
Y
Separate clock, clock enable and TRI-STATE output
enable provided for each register
Y
A and B output sink capability of 64 mA source capabil-
ity of 32 mA
able and TRI-STATE output enable signals are provided
É
Y
for each register. The output pins are guaranteed to source
32 mA (24 mA mil.) and to sink 64 mA (48 mA mil).
Guaranteed latchup protection
Y
High impedance glitch free bus loading during entire
power up and power down cycle
Y
Nondestructive hot insertion capability
Commercial
Package Number
MS56A
Package Description
74ABT16952CSSC (Note 1)
74ABT16952CMTD (Notes 1, 2)
56-Lead (0.300 Wide) Molded Shrink Small Outline, JEDEC (SSOP)
×
56-Lead Molded Thin Shrink Small Outline, JEDEC (TSSOP)
MTD56
e
Note 1: Devices also available in 13 reel. Use suffix
×
Note 2: Contact factory for package availability.
SSCX and MTDX.
Pin Descriptions
Connection Diagram
Pin Assignment
for SSOP
Pin Names
Description
A –A
0
Data Register A Inputs/
B-Register TRI-STATE Outputs
Data Register B Inputs/
A-Register TRI-STATE Outputs
Clock Pulse Inputs
16
16
B –B
0
CPAB , CPBA
n
n
CEA , CEB
n
Clock Enable
n
OEAB , OEBA
n
Output Enable Inputs
n
TL/F/11647–1
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.
C
1996 National Semiconductor Corporation
TL/F/11647
RRD-B30M96/Printed in U. S. A.
http://www.national.com
Pin Descriptions (Continued)
Output Control
Register Function Table (Applies to A or B Register)
Internal
Inputs
CP
Internal
Q
OE
Output
Function
Function
Q
D
CE
H
X
Z
Disable Outputs
Enable Outputs
X
X
H
NC
Hold Data
Load Data
L
L
L
L
L
L
L
L
L
L
H
H
H
H
e
e
e
e
e
e
H
L
HIGH Voltage Level
LOW Voltage Level
Immaterial
Z
HIGH Impedance
LOW-to-HIGH Transition
No Change
L
NC
X
Block Diagram
TL/F/11647–2
n for either byte 1 or byte 2
http://www.national.com
2
Absolute Maximum Ratings (Note 1)
b
b
a
Storage Temperature
65 C to 150 C
§
Current Applied to Output
in LOW State (Max)
§
twice the rated I (mA)
OL
a
55 C to 125 C
Ambient Temperature under Bias
§
§
b
DC Latchup Source Current
Over Voltage Latchup (I/O)
500 mA
10V
Junction Temperature under Bias
Plastic
b
a
55 C to 150 C
§
§
V
Pin Potential to
CC
Ground Pin
b
a
Recommended Operating
Conditions
Free Air Ambient Temperature
Commercial
0.5V to 7.0V
b
30 mA to 5.0 mA
a
0.5V to 7.0V
Input Voltage (Note 2)
Input Current (Note 2)
b
a
b
a
40 C to 85 C
Voltage Applied to Any Output
in the Disable or Power-Off State
in the HIGH State
§
§
b
a
0.5V to 5.5V
b
Supply Voltage
Commercial
0.5V to V
CC
a
a
4.5V to 5.5V
Note 1: Absolute maximum ratings are values beyond which the device may
be damaged or have its useful life impaired. Functional operation under
these conditions is not implied.
Minimum Input Edge Rate
Data Input
Enable Input
(DV/Dt)
50 mV/ns
20 mV/ns
100 mV/ns
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
Clock Input
DC Electrical Characteristics
ABT16952
Typ
Symbol
Parameter
Units
V
CC
Conditions
Min
Max
V
Input HIGH Voltage
2.0
V
V
V
Recognized HIGH Signal
Recognized LOW Signal
IH
V
V
V
Input LOW Voltage
0.8
IL
b
e b
18 mA (Non I/O Pins)
Input Clamp Diode Voltage
1.2
Min
I
IN
CD
OH
e b
e b
Output HIGH Voltage 74ABT
74ABT
2.5
2.0
I
I
3 mA (A , B )
n n
32 mA (A , B )
OH
OH
n
n
e
64 mA (A , B )
n n
V
V
Output LOW Voltage
Input Leakage Test
74ABT
0.55
I
OL
OL
e
All Other Pins Grounded
I
ID
1.9 mA (Non-I/O Pins)
ID
4.75
V
0.0
e
e
I
I
I
I
I
I
Input HIGH Current
V
V
2.7V (Non-I/O Pins) (Note 2)
(Non-I/O Pins)
IH
IN
IN
5
7
mA
mA
mA
Max
Max
Max
V
CC
e
Input HIGH Current
Breakdown Test
V
IN
7.0V (Non-I/O Pins)
BVI
BVIT
IL
e
Input HIGH Current
Breakdown Test (I/O)
V
IN
5.5V (A , B )
n n
100
e
e
Input LOW Current
V
IN
V
IN
0.5V (Non-I/O Pins) (Note 2)
0.0V (Non-I/O Pins)
b
5
mA
mA
Max
a
e
2.7V (A , B );
I
Output Leakage Current
Output Leakage Current
50
0V–5.5V
V
IH
OZH
OUT
OEA or OEB
n
n
e
2.0V
e
0.5V (A , B );
a
b
I
50
mA
0V–5.5V
V
IL
OZL
OUT
OEA or OEB
n
n
e
2.0V
b
b
e
e
e
I
I
I
Output Short-Circuit Current
Output HIGH Leakage Current
Bus Drainage Test
100
275
mA
Max
Max
V
V
V
0V (A , B )
n
OS
CEX
ZZ
OUT
OUT
OUT
n
50
mA
V
CC
(A , B )
n n
5.5V (A , B );
n
n
100
mA
0.0V
All Others GND
I
I
I
Power Supply Current
Power Supply Current
Power Supply Current
1.0
60
mA
mA
Max
Max
All Outputs HIGH
All Outputs LOW
CCH
CCL
CCZ
Outputs TRI-STATE;
All Others GND
1.0
2.5
mA
mA
Max
Max
e
b
V
CC
I
Additional I /Input
CC
V
I
2.1V; All Others
CCT
at V or GND
CC
3
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DC Electrical Characteristics (Continued)
ABT16952
Symbol
Parameter
Units
V
Conditions
Outputs Open
CC
Min
Typ
Max
I
Dynamic I
(Note 2)
No Load
CCD
CC
e
GND or V
OEA or OEB
e
GND,
0.18
mA/MHz
Max
Non-I/O
CC
One Bit toggling, 50% duty cycle
(Note 1)
k
Note 1: For 8-bit toggling, I
1.4 mA/MHz.
CCD
Note 2: Guaranteed, but not tested.
AC Electrical Characteristics
74ABT
74ABT
e a
e b a
40 C to 85 C
T
25 C
T
§
5.0V
§
§
4.5V to 5.5V
A
A
e a
e
Symbol
Parameter
V
V
Units
CC
CC
e
e
50 pF
C
L
50 pF
C
L
Min
Max
Min
Max
f
Max Clock
max
200
200
MHz
ns
Frequency
t
t
Propagation Delay
1.5
1.5
5.3
5.3
1.5
1.5
5.3
5.3
PLH
CPAB or CPBA to
n
PHL
n
A
or B
n
n
t
t
Output Enable Time
OEAB or OEBA to
1.5
1.5
5.5
5.5
1.5
1.5
5.5
5.5
PZH
ns
ns
PZL
n
n
A
or B
n
n
t
t
Output Disable Time
OEAB or OEBA to
1.5
1.5
6.0
6.0
1.5
1.5
6.0
6.0
PHZ
PLZ
n
n
A
or B
n
n
AC Operating Requirements
74ABT
74ABT
e a
e b a
40 C to 85 C
T
25 C
T
§
5.0V
§
§
4.5V to 5.5V
A
A
e a
e
Symbol
Parameter
V
V
Units
CC
CC
e
e
50 pF
C
50 pF
C
L
L
Min
Max
Min
Max
t (H)
s
Setup Time, HIGH
2.5
2.5
2.5
2.5
ns
ns
ns
ns
ns
t (L)
s
or LOW A or B
n n
to CPAB or CPBA
n
n
t (H)
h
Hold Time, HIGH
1.5
1.5
1.5
1.5
t (L)
h
or LOW A or B
n n
to CPAB or CPBA
n
n
t (H)
s
Setup Time, HIGH
2.5
2.5
2.5
2.5
t (L)
s
or LOW CEA or CEB
n
n
to CPAB or CPBA
n
n
t (H)
h
Hold Time, HIGH
1.5
1.5
1.5
1.5
t (L)
h
or LOW CEA or CEB
n
n
to CPAB or CPBA
n
n
t
t
(H)
(L)
Pulse Width,
3.0
3.0
3.0
3.0
w
HIGH or LOW
w
to CPAB or CPBA
n
n
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4
Capacitance
Conditions
e
Symbol
Parameter
Typ
Units
T
25 C
§
A
e
e
C
C
Input Capacitance
Output Capacitance
5
pF
pF
V
V
0V (Non I/O Pins)
5.0V (A , B )
IN
CC
(Note 1)
11
I/O
CC
n
n
e
1 MHz, per MIL-STD-883B, Method 3012.
Note 1: C
is measured at frequency f
I/O
AC Loading
TL/F/11647–3
*Includes jig and probe capacitance
TL/F/11647–4
FIGURE 1. Standard AC Test Load
FIGURE 2a. Test Input Signal Levels
Amplitude
Rep. Rate
t
W
t
r
t
f
3.0V
1 MHz
500 ns
2.5 ns
2.5 ns
FIGURE 2b. Input Signal Requirements
TL/F/11647–5
FIGURE 3. Propagation Delay Waveforms for
Inverting and Non-Inveting Functions
TL/F/11647–6
FIGURE 4. Propagation Delay,
Pulse Width Waveforms
5
http://www.national.com
AC Loading (Continued)
TL/F/11647–7
FIGURE 5. TRI-STATE Output HIGH
and LOW Enable and Disable Times
TL/F/11647–8
FIGURE 6. Setup Time, Hold Time
and Recovery Time Waveforms
Ordering Information
The device number is used to form part of a simplified purchasing code where the package type and temperature range are
defined as follows:
TL/F/11647–9
http://www.national.com
6
Physical Dimensions inches (millimeters) unless otherwise noted
56-Lead SSOP (0.300 Wide) (SS)
×
74ABT16952CSSC or 74ABT16952CSSCX
NS Package Number MS56A
7
http://www.national.com
Physical Dimensions millimeters (Continued)
56-Lead Molded Thin Shrink Small Outline Package, JEDEC
74ABT16952CMTD
NS Package Number MTD56
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DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and whose
failure to perform, when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
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Corporation
National Semiconductor
Europe
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Hong Kong Ltd.
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Japan Ltd.
a
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