54F534DM [NSC]

Octal D-Type Flip-Flop with TRI-STATE Outputs; 八路D型触发器具有​​三态输出
54F534DM
型号: 54F534DM
厂家: National Semiconductor    National Semiconductor
描述:

Octal D-Type Flip-Flop with TRI-STATE Outputs
八路D型触发器具有​​三态输出

总线驱动器 总线收发器 触发器 逻辑集成电路
文件: 总8页 (文件大小:172K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
May 1995  
54F/74F534  
Octal D-Type Flip-Flop with TRI-STATE Outputs  
É
General Description  
Features  
Y
Edge-triggered D-type inputs  
The ’F534 is a high speed, low-power octal D-type flip-flop  
featuring separate D-type inputs for each flip-flop and  
TRI-STATE outputs for bus-oriented applications. A buff-  
ered Clock (CP) and Output Enable (OE) are common to all  
flip-flops. The ’F534 is the same as the ’F374 except that  
the outputs are inverted.  
Y
Buffered positive edge-triggered clock  
Y
TRI-STATE outputs for bus-oriented applications  
Guaranteed 4000V minimum ESD protection  
Y
Package  
Number  
Commercial  
74F534PC  
Military  
Package Description  
N20A  
J20A  
20-Lead (0.300 Wide) Molded Dual-In-Line  
×
54F534DM (Note 2)  
20-Lead Ceramic Dual-In-Line  
74F534SC (Note 1)  
74F534SJ (Note 1)  
M20B  
M20D  
W20A  
E20A  
20-Lead (0.300 Wide) Molded Small Outline, JEDEC  
×
20-Lead (0.300 Wide) Molded Small Outline, EIAJ  
×
54F534FM (Note 2)  
54F534LM (Note 2)  
20-Lead Cerpack  
20-Lead Ceramic Leadless Chip Carrier, Type C  
e
Note 1: Devices also available in 13 reel. Use suffix  
SCX, and SJX  
×
Note 2: Military grade device with environmental and burn-in processing. Use suffix  
e
DMQB, FMQB and LMQB  
Logic Symbols  
IEEE/IEC  
TL/F/9549–1  
TL/F/9549–5  
Unit Loading/Fan Out  
54F/74F  
Pin Names  
Description  
U.L.  
Input I /I  
IH IL  
Output I /I  
HIGH/LOW  
OH OL  
b
20 mA/ 0.6 mA  
b
20 mA/ 0.6 mA  
D D  
0
Data Inputs  
1.0/1.0  
1.0/1.0  
7
CP  
OE  
Clock Pulse Input (Active Rising Edge)  
TRI-STATE Output Enable Input (Active LOW)  
Complementary TRI-STATE Outputs  
b
1.0/1.0  
20 mA/ 0.6 mA  
b
O O  
0
150/40(33.3)  
3 mA/24 mA (20 mA)  
7
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.  
C
1995 National Semiconductor Corporation  
TL/F/9549  
RRD-B30M75/Printed in U. S. A.  
Connection Diagrams  
Pin Assignment for  
DIP, SOIC and Flatpak  
Pin Assignment  
for LCC  
TL/F/9549–3  
TL/F/9549–2  
Functional Description  
The ’F534 consists of eight edge-triggered flip-flops with in-  
dividual D-type inputs and TRI-STATE complementary out-  
puts. The buffered clock and buffered Output Enable are  
common to all flip-flops. The eight flip-flops will store the  
state of their individual D inputs that meet the setup and  
hold times requirements on the LOW-to-HIGH clock (CP)  
transition. With the Output Enable (OE) LOW, the contents  
of the eight flip-flops are available at the outputs. When the  
OE is HIGH, the outputs go to the high impedance state.  
Operation of the OE input does not affect the state of the  
flip-flops.  
Function Table  
Inputs  
Output  
CP  
OE  
D
O
L
L
L
L
L
H
L
L
H
L
X
X
O
0
X
H
Z
e
e
e
H
L
HIGH Voltage Level  
LOW Voltage Level  
Immaterial  
X
e
LOW-to-HIGH Clock Transition  
High Impedance  
L
e
Z
e
O
0
Value stored from previous clock cycle  
Logic Diagram  
TL/F/9549–4  
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.  
2
Absolute Maximum Ratings (Note 1)  
If Military/Aerospace specified devices are required,  
please contact the National Semiconductor Sales  
Office/Distributors for availability and specifications.  
Current Applied to Output  
in LOW State (Max)  
twice the rated I (mA)  
OL  
ESD Last Passing Voltage (Min)  
4000V  
b
b
a
65 C to 150 C  
Storage Temperature  
Note 1: Absolute maximum ratings are values beyond which the device may  
be damaged or have its useful life impaired. Functional operation under  
these conditions is not implied.  
§
§
a
55 C to 125 C  
Ambient Temperature under Bias  
§
§
§
§
§
§
b
b
a
55 C to 175 C  
Junction Temperature under Bias  
Plastic  
Note 2: Either voltage limit or current limit is sufficient to protect inputs.  
a
55 C to 150 C  
V
Pin Potential to  
CC  
Ground Pin  
Recommended Operating  
Conditions  
b
a
0.5V to 7.0V  
b
a
0.5V to 7.0V  
Input Voltage (Note 2)  
Input Current (Note 2)  
Voltage Applied to Output  
Free Air Ambient Temperature  
Military  
Commercial  
b
a
30 mA to 5.0 mA  
b
a
55 C to 125 C  
§
0 C to 70 C  
§
a
§
§
e
in HIGH State (with V  
Standard Output  
TRI-STATE Output  
0V)  
CC  
Supply Voltage  
Military  
Commercial  
b
0.5V to 5.5V  
0.5V to V  
CC  
a
a
a
4.5V to 5.5V  
b
a
a
4.5V to 5.5V  
DC Electrical Characteristics  
54F/74F  
Symbol  
Parameter  
Units  
V
CC  
Conditions  
Min  
Typ  
Max  
V
V
V
V
Input HIGH Voltage  
2.0  
V
V
V
Recognized as a HIGH Signal  
Recognized as a LOW Signal  
IH  
Input LOW Voltage  
0.8  
IL  
b
e b  
18 mA  
Input Clamp Diode Voltage  
1.2  
Min  
Min  
I
IN  
CD  
OH  
e b  
e b  
e b  
e b  
e b  
e b  
Output HIGH  
Voltage  
54F 10% V  
2.5  
2.4  
2.5  
2.4  
2.7  
2.7  
I
I
I
I
I
I
1 mA  
3 mA  
1 mA  
3 mA  
1 mA  
3 mA  
CC  
CC  
CC  
CC  
OH  
OH  
OH  
OH  
OH  
OH  
54F 10% V  
74F 10% V  
74F 10% V  
V
74F 5% V  
74F 5% V  
CC  
CC  
e
e
V
Output LOW  
Voltage  
54F 10% V  
74F 10% V  
0.5  
I
I
20 mA  
24 mA  
OL  
CC  
OL  
OL  
V
Min  
Max  
Max  
Max  
0.0  
0.5  
CC  
I
I
I
Input HIGH  
Current  
54F  
74F  
20.0  
5.0  
IH  
e
e
mA  
mA  
mA  
V
V
V
V
2.7V  
7.0V  
IN  
Input HIGH Current  
Breakdown Test  
54F  
74F  
100  
7.0  
BVI  
IN  
Output HIGH  
54F  
74F  
250  
50  
CEX  
e
V
CC  
OUT  
Leakage Current  
e
All Other Pins Grounded  
V
ID  
Input Leakage  
Test  
I
ID  
1.9 mA  
74F  
74F  
4.75  
e
IOD  
I
Output Leakage  
Circuit Current  
V
1.50 mA  
OD  
3.75  
mA  
0.0  
All Other Pins Grounded  
b
e
0.5V  
I
I
I
I
I
I
Input LOW Current  
0.6  
mA  
mA  
mA  
mA  
mA  
mA  
Max  
Max  
Max  
Max  
0.0V  
Max  
V
V
V
V
V
V
IL  
IN  
e
Output Leakage Current  
Output Leakage Current  
Output Short-Circuit Current  
Bus Drainage Test  
50  
2.7V  
0.5V  
0V  
OZH  
OZL  
OS  
OUT  
OUT  
OUT  
OUT  
b
e
e
e
50  
b
b
60  
150  
500  
86  
5.25V  
ZZ  
e
Power Supply Current  
55  
HIGH Z  
CCZ  
O
3
AC Electrical Characteristics  
74F  
54F  
74F  
e a  
T
25 C  
§
5.0V  
A
e
50 pF  
e
50 pF  
T
, V  
CC  
e
Mil  
T
, V  
A CC  
Com  
A
e a  
Symbol  
Parameter  
V
Units  
CC  
e
C
C
L
L
e
C
50 pF  
L
Min  
Typ  
Max  
Min  
Max  
Min  
Max  
f
Maximum Clock Frequency  
Propagation Delay  
100  
60  
70  
MHz  
ns  
max  
t
t
4.0  
4.0  
6.5  
6.5  
8.5  
8.5  
4.0  
4.0  
10.5  
11.0  
4.0  
4.0  
10.0  
10.0  
PLH  
CP to O  
PHL  
n
t
t
Output Enable Time  
Output Disable Time  
2.0  
2.0  
9.0  
5.8  
11.5  
7.5  
2.0  
2.0  
14.0  
10.0  
2.0  
2.0  
12.5  
8.5  
PZH  
PZL  
ns  
t
t
1.5  
1.5  
5.3  
4.3  
7.0  
5.5  
1.5  
1.5  
8.0  
7.5  
1.5  
1.5  
8.0  
6.5  
PHZ  
PLZ  
AC Operating Requirements  
74F  
54F  
74F  
e a  
T
25 C  
§
5.0V  
A
e
e
Symbol  
Parameter  
T
, V  
CC  
Mil  
Max  
T
, V  
A CC  
Com  
Max  
Units  
A
e a  
V
CC  
Min  
Max  
Min  
Min  
t (H)  
s
Setup Time, HIGH or LOW  
2.0  
2.0  
2.0  
2.5  
2.0  
2.0  
t (L)  
s
D to CP  
n
ns  
ns  
t (H)  
h
Hold Time, HIGH or LOW  
D to CP  
n
2.0  
2.0  
2.0  
2.5  
2.0  
2.0  
t (L)  
h
t
t
(H)  
(L)  
CP Pulse Width  
HIGH or LOW  
7.0  
6.0  
7.0  
6.0  
7.0  
6.0  
w
w
Ordering Information  
The device number is used to form part of a simplified purchasing code where the package type and temperature range are  
defined as follows:  
74F 534  
S
C
X
Temperature Range Family  
Special Variations  
e
e
e
74F  
54F  
Commercial  
Military  
QB  
Military grade device with  
environmental and burn-in  
processing  
Device Type  
Temperature Range  
e
Package Code  
a
C
Commercial (0 C to 70 C)  
§
§
e
e
e
e
e
e
P
D
F
L
S
SJ  
Plastic DIP  
Ceramic DIP  
Flatpak  
Leadless Chip Carrier (LCC)  
Small Outline SOIC JEDEC  
Small Outline SOIC EIAJ  
e
b a  
Military ( 55 C to 125 C)  
M
§
§
4
Physical Dimensions inches (millimeters)  
20-Lead Ceramic Leadless Chip Carrier (L)  
NS Package Number E20A  
20-Lead Ceramic Dual-In-Line Package (D)  
NS Package Number J20A  
5
Physical Dimensions inches (millimeters) (Continued)  
20-Lead (0.300 Wide) Molded Small Outline Package, JEDEC  
×
NS Package Number M20B  
6
Physical Dimensions inches (millimeters) (Continued)  
20-Lead (0.300 Wide) Molded Small Outline Package, EIAJ (SJ)  
×
NS Package Number M20D  
20-Lead (0.300 Wide) Molded Dual-In-Line Package (P)  
×
NS Package Number N20A  
7
Physical Dimensions inches (millimeters) (Continued)  
20-Lead Ceramic Flatpak (F)  
NS Package Number W20A  
LIFE SUPPORT POLICY  
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL  
SEMICONDUCTOR CORPORATION. As used herein:  
1. Life support devices or systems are devices or  
systems which, (a) are intended for surgical implant  
into the body, or (b) support or sustain life, and whose  
failure to perform, when properly used in accordance  
with instructions for use provided in the labeling, can  
be reasonably expected to result in a significant injury  
to the user.  
2. A critical component is any component of a life  
support device or system whose failure to perform can  
be reasonably expected to cause the failure of the life  
support device or system, or to affect its safety or  
effectiveness.  
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