54F257ALMQB [NSC]
Quad 2-Input Multiplexer with TRI-STATE Outputs; 四2输入多路复用器与三态输出
| 型号： | 54F257ALMQB |
| 厂家： | 
National Semiconductor |
| 描述： | Quad 2-Input Multiplexer with TRI-STATE Outputs |
| 文件： | 总8页 (文件大小：159K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
November 1994
54F/74F257A
Quad 2-Input Multiplexer with TRI-STATE Outputs
É
General Description
Features
Y
Multiplexer expansion by tying outputs together
The ’F257A is a quad 2-input multiplexer with TRI-STATE
outputs. Four bits of data from two sources can be selected
using a Common Data Select input. The four outputs pres-
ent the selected data in true (non-inverted) form. The out-
puts may be switched to a high impedance state with a
HIGH on the common Output Enable (OE) input, allowing
the outputs to interface directly with bus-oriented systems.
Y
Non-inverting TRI-STATE outputs
Y
Input clamp diodes limit high-speed termination effects
Y
Guaranteed 4000V minimum ESD protection
Package
Number
Commercial
74F257APC
Military
Package Description
N16E
J16A
16-Lead (0.300 Wide) Molded Dual-In-Line
×
54F257ADM (Note 2)
16-Lead Ceramic Dual-In-Line
74F257ASC (Note 1)
74F257ASJ (Note 1)
M16A
M16D
W16A
E20A
16-Lead (0.150 Wide) Molded Small Outline, JEDEC
×
16-Lead (0.300 Wide) Molded Small Outline, EIAJ
×
54F257AFM (Note 2)
54F257ALL (Note 2)
16-Lead Cerpack
20-Lead Ceramic Leadless Chip Carrier, Type C
e
Note 1: Devices also available in 13 reel. Use suffix
SCX and SJX.
×
Note 2: Military grade device with environmental and burn-in processing. Use suffix
e
DMQB, FMQB and LMQB.
Logic Symbols
Connection Diagrams
Pin Assignment
for DIP, SOIC and Flatpak
Pin Assignment
for LCC
TL/F/9507–3
IEEE/IEC
TL/F/9507–1
TL/F/9507–2
TL/F/9507–5
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation
TL/F/9507
RRD-B30M75/Printed in U. S. A.
Unit Loading/Fan Out
54F/74F
Pin Names
Description
U.L.
Input I /I
IH IL
Output I /I
HIGH/LOW
OH OL
b
20 mA/ 0.6 mA
b
20 mA/ 0.6 mA
b
20 mA/ 0.6 mA
S
Common Data Select Input
1.0/1.0
1.0/1.0
OE
TRI-STATE Output Enable Input (Active LOW)
Data Inputs from Source 0
I
I
–I
0a 0d
1.0/1.0
b
–I
1a 1d
Data Inputs from Source 1
1.0/1.0
20 mA/ 0.6 mA
b
Z –Z
a
TRI-STATE Multiplexer Outputs
150/40 (33.3)
3 mA/24 mA (20 mA)
d
Functional Description
Truth Table
The ’F257A is a quad 2-input multiplexer with TRI-STATE
outputs. It selects four bits of data from two sources under
control of a Common Data Select input. When the Select
Output
Enable
Select
Data
Output
Z
Input
Inputs
input is LOW, the I inputs are selected and when Select is
0x
OE
S
I
0
I
1
HIGH, the I inputs are selected. The data on the selected
1x
H
L
L
L
L
X
H
H
L
X
X
X
L
X
L
Z
L
inputs appears at the outputs in true (non-inverted) form.
The device is the logic implementation of a 4-pole, 2-posi-
tion switch where the position of the switch is determined by
the logic levels supplied to the Select input. The logic equa-
tion for the outputs is shown below:
H
X
X
H
L
L
H
H
e
a
I
on
Z
n
OE (I
#
S
S)
#
#
n
e
H
L
HIGH Voltage Level
LOW Voltage Level
Immaterial
e
e
e
When the Output Enable input (OE) is HIGH, the outputs are
forced to a high impedance OFF state. If the outputs are
tied together, all but one device must be in the high imped-
ance state to avoid high currents that would exceed the
maximum ratings. Designers should ensure the Output En-
able signals to TRI-STATE devices whose outputs are tied
together are designed so there is no overlap.
X
Z
High Impedance
Logic Diagram
TL/F/9507–4
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
2
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Recommended Operating
Conditions
Free Air Ambient Temperature
Military
Commercial
b
a
55 C to 125 C
§
0 C to 70 C
§
§
b
b
a
65 C to 150 C
Storage Temperature
§
§
§
§
§
a
§
a
55 C to 125 C
Ambient Temperature under Bias
§
Supply Voltage
Military
Commercial
b
b
a
a a
4.5V to 5.5V
a a
4.5V to 5.5V
Junction Temperature under Bias
Plastic
55 C to 175 C
§
§
a
55 C to 150 C
V
Pin Potential to
CC
Ground Pin
b
a
0.5V to 7.0V
b
a
0.5V to 7.0V
Input Voltage (Note 2)
Input Current (Note 2)
Voltage Applied to Output
b
a
30 mA to 5.0 mA
e
in HIGH State (with V
Standard Output
TRI-STATE Output
0V)
CC
b
0.5V to 5.5V
0.5V to V
CC
b
a
Current Applied to Output
in LOW State (Max)
twice the rated I (mA)
OL
ESD Last Passing Voltage (Min)
4000V
Note 1: Absolute maximum ratings are values beyond which the device may
be damaged or have its useful life impaired. Functional operation under
these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
54F/74F
Symbol
Parameter
Units
V
CC
Conditions
Min
Typ
Max
V
V
V
V
Input HIGH Voltage
2.0
V
V
V
Recognized as a HIGH Signal
Recognized as a LOW Signal
IH
Input LOW Voltage
0.8
IL
b
e b
18 mA
Input Clamp Diode Voltage
1.2
Min
Min
I
IN
CD
OH
e b
e b
e b
e b
e b
e b
Output HIGH
Voltage
54F 10% V
2.5
2.4
2.5
2.4
2.7
2.7
I
I
I
I
I
I
1 mA
3 mA
1 mA
3 mA
1 mA
3 mA
CC
CC
CC
CC
OH
OH
OH
OH
OH
OH
54F 10% V
74F 10% V
74F 10% V
V
74F 5% V
74F 5% V
CC
CC
e
e
V
Output LOW
Voltage
54F 10% V
74F 10% V
0.5
0.5
I
I
20 mA
24 mA
OL
CC
CC
OL
OL
V
Min
Max
Max
Max
0.0
e
I
I
I
Input HIGH
Current
54F
74F
20.0
5.0
V
V
V
2.7V
IH
IN
mA
mA
mA
V
e
Input HIGH Current
Breakdown Test
54F
74F
100
7.0
7.0V
BVI
IN
e
Output HIGH
Leakage Current
54F
74F
250
50
V
CC
CEX
OUT
e
All Other Pins Grounded
V
ID
Input Leakage
Test
I
ID
1.9 mA
74F
74F
4.75
e
IOD
All Other Pins Grounded
I
Output Leakage
Circuit Current
V
150 mV
OD
3.75
mA
0.0
b
e
0.5V
I
I
I
I
I
I
I
I
Input LOW Current
0.6
mA
mA
mA
mA
mA
mA
mA
mA
Max
Max
Max
Max
0.0V
Max
Max
Max
V
V
V
V
V
V
V
V
IL
IN
e
Output Leakage Current
Output Leakage Current
Output Short-Circuit Current
Bus Drainage Test
50
2.7V
0.5V
0V
OZH
OZL
OS
OUT
OUT
OUT
OUT
b
e
e
e
50
b
b
150
500
60
5.25V
ZZ
e
Power Supply Current
Power Supply Current
Power Supply Current
9.0
14.5
15
15
22
23
HIGH
LOW
CCH
CCL
CCZ
O
e
O
e
HIGH Z
O
3
AC Electrical Characteristics
74F
54F
74F
e a
T
25 C
§
5.0V
A
e
50 pF
e
T
, V
CC
e
Mil
T
, V
Com
e
50 pF
A
A CC
e a
Symbol
Parameter
V
Units
CC
C
C
L
L
e
C
50 pF
L
Min
Typ
Max
Min
Max
Min
Max
t
t
Propagation Delay
2.5
2.0
4.5
4.2
5.5
5.5
2.0
1.5
7.0
7.0
2.0
2.0
6.0
6.0
PLH
ns
ns
I
to Z
n
PHL
n
t
t
Propagation Delay
S to Z
4.0
2.5
5.0
6.5
9.5
7.0
3.5
2.5
11.5
9.0
3.5
2.5
10.5
8.0
PLH
PHL
n
t
t
Output Enable Time
2.0
2.5
5.9
5.5
6.0
7.0
2.0
2.5
8.0
9.0
2.0
2.5
7.0
8.0
PZH
PZL
ns
t
t
Output Disable Time
2.0
2.0
4.3
4.5
6.0
6.0
2.0
2.0
7.0
8.5
2.0
2.0
7.0
7.0
PHZ
PLZ
4
Ordering Information
The device number is used to form part of a simplified purchasing code where the package type and temperature range are
defined as follows:
74F 257A
S
C
X
Temperature Range Family
Special Variations
e
e
e
e
74F
54F
Commercial
Military
X
QB
Devices shipped in 13 reels
×
Military grade with
environmental and burn-in
processing shipped in tubes
Device Type
Package Code
Temperature Range
e
e
e
e
e
P
D
F
L
Plastic DIP
Ceramic DIP
Flatpak
Leadless Ceramic Chip Carrier (LCC)
Small Outline SOIC JEDEC
Small Outline SOIC EIAJ
e
e
a
C
M
Commercial (0 C to 70 C)
§
§
b a
Military ( 55 C to 125 C)
§
§
S
e
SJ
Physical Dimensions inches (millimeters)
20-Lead Ceramic Leadless Chip Carrier (L)
NS Package Number E20A
5
Physical Dimensions inches (millimeters) (Continued)
16-Lead Ceramic Dual-In-Line Package (D)
NS Package Number J16A
16-Lead (0.150 Wide) Molded Small Outline Package, JEDEC (S)
×
NS Package Number M16A
6
Physical Dimensions inches (millimeters) (Continued)
16-Lead (0.300 Wide) Molded Small Outline Package, EIAJ (SJ)
×
NS Package Number M16D
16-Lead (0.300 Wide) Molded Dual-In-Line Package (P)
×
NS Package Number N16E
7
Physical Dimensions inches (millimeters) (Continued)
16-Lead Ceramic Flatpak (F)
NS Package Number W16A
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failure to perform, when properly used in accordance
with instructions for use provided in the labeling, can
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