54ACT399D [NSC]
Quad 2-Port Register; 四2端口寄存器![54ACT399D](http://pdffile.icpdf.com/pdf1/p00083/img/icpdf/54ACT399_436150_icpdf.jpg)
型号: | 54ACT399D |
厂家: | ![]() |
描述: | Quad 2-Port Register |
文件: | 总6页 (文件大小:141K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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August 1998
54ACT399
Quad 2-Port Register
General Description
Features
n ICC reduced by 50%
The ’AC/ACT399 is the logical equivalent of a quad 2-input
multiplexer feeding into four edge-triggered flip-flops. A com-
mon Select input determines which of the two 4-bit words is
accepted. The selected data enters the flip-flop on the rising
edge of the clock.
n Select inputs from two data sources
n Fully positive edge-triggered operation
n Outputs source/sink 24 mA
n ACT399 has TTL-compatible inputs
Logic Symbols
Connection Diagrams
Pin Assignment
for DIP and Flatpak
DS100356-1
IEEE/IEC
DS100356-3
Pin Assignment
for LCC
DS100356-5
DS100356-2
Pin Names
Description
Common Select Input
Clock Pulse Input
S
CP
I
I
0a–I 0d
1a–I1d
Data Inputs from Source 0
Data Inputs from Source 1
Register True Outputs
Qa–Qd
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
FACT® is a registered trademark of Fairchild Semiconductor Corporation.
© 1998 National Semiconductor Corporation
DS100356
www.national.com
Functional Description
Function Table
The ’AC/ACT399 is a high-speed quad 2-port register. It se-
lects four bits of data from either of two sources (Ports) un-
der control of a common Select input (S). The selected data
is transferred to a 4-bit output register synchronous with the
LOW-to-HIGH transition of the Clock input (CP). The 4-bit
D-type output register is fully edge-triggered. The Data in-
puts (I0x, I1x) and Select input (S) must be stable only a setup
time prior to and hold time after the LOW-to-HIGH transition
of the Clock input for predictable operation.
Inputs
Outputs
S
L
I0
L
I1
X
X
L
CP
N
N
N
N
Q
Q
H
L
L
H
L
L
H
X
X
H
H
H
L
H
H
=
=
=
H
L
X
HIGH Voltage Level
LOW Voltage Level
Immaterial
N =
LOW-to-HIGH Clock Transition
Logic Diagram
DS100356-4
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
www.national.com
2
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Junction Temperature (TJ)
CDIP
+175˚C
Recommended Operating
Conditions
Supply Voltage (VCC
)
−0.5V to +7.0V
DC Input Diode Current (IIK
)
Supply Voltage (VCC
)
=
VI −0.5V
−20 mA
+20 mA
’ACT
4.5V to 5.5V
0V to VCC
0V to VCC
=
VI VCC + 0.5V
Input Voltage (VI)
DC Input Voltage (VI)
−0.5V to VCC + 0.5V
Output Voltage (VO
)
DC Output Diode Current (IOK
)
Operating Temperature (TA)
54ACT
=
VO −0.5V
−20 mA
+20 mA
−55˚C to +125˚C
=
VO VCC + 0.5V
Minimum Input Edge Rate (∆V/∆t)
’ACT Devices
DC Output Voltage (VO
DC Output Source or
)
−0.5V to VCC + 0.5V
VIN from 0.8V to 2.0V
±
±
Sink Current (IO
)
50 mA
@
VCC 4.5V, 5.5V
125 mV/ns
DC VCC or Ground Current
per Output Pin (ICC or IGND
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, without
exception, to ensure that the system design is reliable over its power supply,
temperature, and output/input loading variables. National does not recom-
mend operation of FACT® circuits outside databook specifications.
)
50 mA
Storage Temperature (TSTG
)
−65˚C to +150˚C
DC Electrical Characteristics for ’ACT Family Devices
54ACT
=
VCC
(V)
TA −55˚C to
Symbol
Parameter
Units
Conditions
+125˚C
Guaranteed
Limits
2.0
=
VIH
VIL
Minimum High Level
Input Voltage
4.5
5.5
4.5
5.5
4.5
5.5
V
V
V
VOUT 0.1V
2.0
or VCC −0.1V
=
Maximum Low Level
Input Voltage
0.8
VOUT 0.1V
0.8
or VCC − 0.1V
=
VOH
Minimum High Level
4.4
IOUT −50 µA
5.4
(Note 2)
=
VIN VIL or VIH
4.5
5.5
4.5
5.5
3.70
4.70
0.1
V
V
IOH = −24 mA
IOH = −24 mA
=
VOL
Maximum Low Level
Output Voltage
IOUT 50 µA
0.1
(Note 2)
=
VIN VIL or VIH
4.5
5.5
5.5
0.50
0.50
V
IOL = 24 mA
IOL = 24 mA
=
±
IIN
Maximum Input
1.0
µA
VI VCC, GND
Leakage Current
Maximum ICC/Input
=
VI VCC −2.1V
ICCT
IOLD
5.5
5.5
1.6
mA
mA
=
VOLD 1.65V Max
Minimum Dynamic
(Note 3)
50
=
VOHD 3.85V Min
IOHD
ICC
Output Current
5.5
5.5
−50
mA
µA
=
Maximum Quiescent
Supply Current
80.0
VIN VCC
or Ground
Note 2: All outputs loaded; thresholds on input associated with output under test.
Note 3: Maximum test duration 2.0 ms, one output loaded at a time.
3
www.national.com
AC Electrical Characteristics
54ACT
=
VCC
(V)
TA, VCC Mil
Fig.
No.
=
Symbol
Parameter
CL 50 pF
Units
(Note 4)
Min
90
Max
10.0
10.0
fmax
tPLH
Input Clock Frequency
Propagation Delay
CP to Q
5.0
5.0
MHz
ns
1.5
tPHL
Propagation Delay
CP to Q
5.0
1.5
ns
±
Note 4: Voltage Range 5.0 is 5.0V 0.5V
AC Operating Requirements
54ACT
=
VCC
(V)
TA −55˚C
Units
Fig.
No.
Symbol
Parameter
to +125˚C
=
(Note 5)
CL 50 pF
Guaranteed
Minimum
3.5
ts
th
ts
th
tw
Setup Time, HIGH or LOW
In to CP
5.0
5.0
5.0
5.0
5.0
ns
ns
ns
ns
ns
Hold Time, HIGH or LOW
In to CP
3.0
6.0
2.5
5.0
Setup Time, HIGH or LOW
S to CP
Hold Time, HIGH or LOW
S to CP
CP Pulse Width,
HIGH or LOW
±
Note 5: Voltage Range 5.0 is 5.0V 0.5V
Capacitance
Symbol
Parameter
Input Capacitance
Power Dissipation Capacitance
Typ
4.5
30
Units
pF
Conditions
=
CIN
VCC OPEN
=
VCC 5.0V
CPD
pF
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4
Physical Dimensions inches (millimeters) unless otherwise noted
20 Terminal Ceramic Leadless Chip Carrier (L)
NS Package Number E20A
16-Lead Ceramic Dual-In-Line Package (D)
NS Package Number J16A
5
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Ceramic Flatpak (IF)
NS Package Number W16A
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DE-
VICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMI-
CONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or sys-
tems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, and whose fail-
ure to perform when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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Corporation
Americas
Tel: 1-800-272-9959
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