54ACT373 [NSC]
Octal Transparent Latch with TRI-STATE Outputs; 八路透明锁存器具有三态输出
| 型号： | 54ACT373 |
| 厂家： | 
National Semiconductor |
| 描述： | Octal Transparent Latch with TRI-STATE Outputs |
| 文件： | 总10页 (文件大小：169K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
August 1998
54AC373 • 54ACT373
Octal Transparent Latch with TRI-STATE® Outputs
General Description
Features
n ICC and IOZ reduced by 50%
n Eight latches in a single package
n TRI-STATE outputs for bus interfacing
n Outputs source/sink 24 mA
The ’AC/’ACT373 consists of eight latches with TRI-STATE
outputs for bus organized system applications. The flip-flops
appear transparent to the data when Latch Enable (LE) is
HIGH. When LE is LOW, the data that meets the setup time
is latched. Data appears on the bus when the Output Enable
(OE) is LOW. When OE is HIGH, the bus output is in the high
impedance state.
n ’ACT373 has TTL-compatible inputs
n Standard Microcircuit Drawing (SMD)
— ’AC373: 5962-87555
— ’ACT373: 5962-87556
Logic Symbols
IEEE/IEC
DS100329-1
DS100329-2
Pin Names
Description
Data Inputs
Latch Enable Input
D0–D7
LE
OE
Output Enable Input
O0–O7
TRI-STATE Latch Outputs
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
FACT® is a registered trademark of Fairchild Semiconductor Corporation.
© 1998 National Semiconductor Corporation
DS100329
www.national.com
Connection Diagrams
Pin Assignment for LCC
Pin Assignment for DIP
and Flatpak
DS100329-4
DS100329-3
Functional Description
The ’AC/’ACT373 contains eight D-type latches with
TRI-STATE standard outputs. When the Latch Enable (LE)
input is HIGH, data on the Dn inputs enters the latches. In
this condition the latches are transparent, i.e., a latch output
will change state each time its D input changes. When LE is
LOW, the latches store the information that was present on
the D inputs a setup time preceding the HIGH-to-LOW tran-
sition of LE. The TRI-STATE standard outputs are controlled
by the Output Enable (OE) input. When OE is LOW, the stan-
dard outputs are in the 2-state mode. When OE is HIGH, the
standard outputs are in the high impedance mode but this
does not interfere with entering new data into the latches.
Truth Table
Inputs
Outputs
LE
X
OE
H
L
Dn
X
On
Z
H
H
L
L
L
L
H
X
H
L
O0
=
=
=
=
H
L
Z
X
O
HIGH Voltage Level
LOW Voltage Level
High Impedance
Immaterial
=
Previous O before HIGH to Low transition of Latch Enable
0
0
www.national.com
2
Logic Diagram
DS100329-5
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
3
www.national.com
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Recommended Operating
Conditions
Supply Voltage (VCC
)
’AC
2.0V to 6.0V
4.5V to 5.5V
0V to VCC
Supply Voltage (VCC
)
−0.5V to +7.0V
’ACT
DC Input Diode Current (IIK
)
Input Voltage (VI)
=
VI −0.5V
−20 mA
+20 mA
Output Voltage (VO
)
0V to VCC
=
VI VCC + 0.5V
Operating Temperature (TA)
54AC/ACT
DC Input Voltage (VI)
−0.5V to VCC + 0.5V
−55˚C to +125˚C
125 mV/ns
DC Output Diode Current (IOK
)
Minimum Input Edge Rate (∆V/∆t)
’AC Devices
=
VO −0.5V
−20 mA
+20 mA
=
VO VCC + 0.5V
% to 70% of V
VIN from 30
CC
DC Output Voltage (VO
DC Output Source
)
−0.5V to VCC + 0.5V
@
VCC 3.3V, 4.5V, 5.5V
Minimum Input Edge Rate (∆V/∆t)
’ACT Devices
±
±
or Sink Current (IO
)
50 mA
DC VCC or Ground Current
per Output Pin (ICC or IGND
VIN from 0.8V to 2.0V
)
50 mA
@
VCC 4.5V, 5.5V
125 mV/ns
Storage Temperature (TSTG
Junction Temperature (TJ)
CDIP
)
−65˚C to +150˚C
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, without
exception, to ensure that the system design is reliable over its power supply,
temperature, and output/input loading variables. National does not recom-
mend operation of FACT® circuits outside databook specifications.
175˚C
DC Characteristics for ’AC Family Devices
54AC
=
Symbol
Parameter
VCC
(V)
TA
Units
Conditions
−55˚C to +125˚C
Guaranteed Limits
=
VIH
Minimum High
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
2.1
3.15
3.85
0.9
VOUT 0.1V
Level Input
Voltage
V
V
V
or VCC − 0.1V
=
VIL
Maximum Low
Level Input
Voltage
VOUT 0.1V
1.35
1.65
2.9
or VCC − 0.1V
=
VOH
Minimum High
Level Output
Voltage
IOUT −50 µA
4.4
5.4
(Note 2)
=
VIN VIL or VIH
3.0
4.5
5.5
3.0
4.5
5.5
2.4
3.7
4.7
0.1
0.1
0.1
−12 mA
−24 mA
−24 mA
V
V
IOH
=
VOL
Maximum Low
Level Output
Voltage
IOUT 50 µA
(Note 2)
=
VIN VIL or VIH
3.0
4.5
5.5
5.5
0.50
0.50
0.50
12 mA
24 mA
24 mA
V
IOL
=
±
IIN
Maximum Input
Leakage Current
1.0
µA
VI VCC, GND
www.national.com
4
DC Characteristics for ’AC Family Devices (Continued)
54AC
=
Symbol
Parameter
VCC
(V)
TA
Units
Conditions
−55˚C to +125˚C
Guaranteed Limits
=
IOZ
Maximum
VI (OE) VIL, VIH
=
±
TRI-STATE
Current
5.5
5.0
µA
VI VCC, GND
=
VO VCC, GND
=
VOLD 1.65V Max
IOLD
IOHD
ICC
(Note 3) Minimum
Dynamic Output
Current
5.5
5.5
5.5
50
mA
mA
µA
=
VOHD 3.85V Min
−50
80.0
=
Maximum Quiescent
Supply Current
VIN VCC
or GND
Note 2: All outputs loaded, thresholds on input associated with output under test.
Note 3: Maximum test duration 2.0 ms, one output loaded at a time.
@
@
Note 4:
I
and I
CC
3.0V are guaranteed to be less than or equal to the respective limit 5.5V V .
IN
CC
@
@
I
for 54AC 25˚C is identical to 74AC 25˚C.
CC
DC Characteristics for ’ACT Family Devices
54ACT
=
Symbol
Parameter
VCC
(V)
TA
Units
Conditions
−55˚C to +125˚C
Guaranteed Limits
=
VIH
Minimum High Level
Input Voltage
4.5
5.5
4.5
5.5
4.5
5.5
2.0
2.0
0.8
0.8
4.4
5.4
V
V
V
VOUT 0.1V
or VCC − 0.1V
=
VIL
Maximum Low Level
Input Voltage
VOUT 0.1V
or VCC − 0.1V
=
VOH
Minimum High Level
Output Voltage
IOUT −50 µA
(Note 5)
=
VIN VIL or VIH
4.5
5.5
4.5
5.5
3.70
4.70
0.1
V
V
IOH
−24 mA
−24 mA
=
VOL
Maximum Low Level
Output Voltage
IOUT 50 µA
0.1
(Note 5)
=
VIN VIL or VIH
4.5
5.5
5.5
0.50
0.50
V
IOL
24 mA
24 mA
=
±
IIN
Maximum Input Leakage
Current
1.0
µA
µA
VI VCC, GND
=
±
IOZ
Maximum TRI-STATE
Current
5.5
5.0
VI VIL, VIH
=
VO VCC, GND
=
VI VCC − 2.1V
ICCT
IOLD
IOHD
ICC
Maximum ICC/Input
(Note 6) Minimum Dynamic
Output Current
5.5
5.5
5.5
5.5
1.6
mA
mA
mA
µA
=
VOLD 1.65V Max
50
=
VOHD 3.85V Min
−50
80.0
=
Maximum Quiescent
Supply Current
VIN VCC
or GND
Note 5: All outputs loaded; thresholds on input associated with output under test.
Note 6: Maximum test duration 2.0 ms, one output loaded at a time.
@ @
I for 54ACT 25˚C is identical to 74ACT 25˚C.
CC
Note 7:
5
www.national.com
AC Electrical Characteristics
54AC
=
VCC
(V)
TA −55˚C
Symbol
Parameter
to +125˚C
Units
=
CL 50 pF
(Note 8)
Min
1.0
1.5
1.0
1.5
1.0
1.5
1.0
1.5
1.0
1.5
1.0
1.5
1.0
1.5
1.0
1.5
Max
16.5
11.5
16.0
11.5
16.5
12.0
15.0
11.0
14.0
10.5
13.5
10.0
16.0
13.5
13.0
10.5
tPLH
tPHL
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
Propagation Delay
Dn to On
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
ns
ns
ns
ns
ns
ns
ns
ns
Propagation Delay
Dn to On
Propagation Delay
LE to On
Propagation Delay
LE to On
Output Enable Time
Output Enable Time
Output Disable Time
Output Disable Time
±
Note 8: Voltage Range 3.3 is 3.3V 0.3V
±
Voltage Range 5.0 is 5.0V 0.5V
AC Operating Requirements
54AC
=
VCC
(V)
TA −55˚C
Fig.
No.
Symbol
Parameter
to +125˚C
Units
=
CL 50 pF
(Note 9)
Guaranteed Minimum
ts
Setup Time, HIGH or LOW
Dn to LE
3.3
5.0
3.3
5.0
3.3
5.0
6.5
5.0
1.0
1.0
6.5
5.0
ns
ns
ns
th
Hold Time, HIGH or LOW
Dn to LE
tw
LE Pulse Width,
HIGH
±
Note 9: Voltage Range 3.3 is 3.3V 0.3V
±
Voltage Range 5.0 is 5.0V 0.5V
www.national.com
6
AC Electrical Characteristics
54ACT
=
VCC
(V)
TA −55˚C
Symbol
Parameter
to +125˚C
Units
=
CL 50 pF
(Note 10)
Min
Max
tPLH
tPHL
tPLH
tPHL
Propagation Delay
Dn to On
5.0
5.0
5.0
5.0
1.5
12.5
ns
ns
ns
ns
Propagation Delay
Dn to On
1.5
1.5
1.5
12.5
12.5
11.5
Propagation Delay
LE to On
Propagation Delay
LE to On
tPZH
tPZL
tPHZ
tPLZ
Output Enable Time
Output Enable Time
Output Disable Time
Output Disable Time
5.0
5.0
5.0
5.0
1.5
1.5
1.5
1.5
11.5
11.0
14.0
11.0
ns
ns
ns
ns
±
Note 10: Voltage Range 5.0 is 5.0V 0.5V
AC Operating Requirements
54ACT
=
VCC
(V)
TA −55˚C
Symbol
Parameter
to +125˚C
Units
=
(Note 11)
CL 50 pF
Guaranteed
Minimum
8.5
ts
Setup Time, HIGH or LOW
Dn to LE
5.0
5.0
5.0
ns
ns
ns
th
Hold Time, HIGH or LOW
Dn to LE
1.0
8.5
tw
LE Pulse Width, HIGH
±
Note 11: Voltage Range 5.0 is 5.0V 0.5V
Capacitance
Symbol
CIN
CPD
Parameter
Typ
4.5
Units
pF
Conditions
=
VCC OPEN
Input Capacitance
=
VCC 5.0V
Power Dissipation Capacitance
40.0
pF
7
www.national.com
8
Physical Dimensions inches (millimeters) unless otherwise noted
20 Terminal Ceramic Leadless Chip Carrier (L)
NS Package Number E20A
20 Lead Ceramic Dual-In-Line Package (D)
NS Package Number J20A
9
www.national.com
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Ceramic Flatpak (F)
NS Package Number W20A
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DE-
VICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMI-
CONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or sys-
tems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, and whose fail-
ure to perform when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
National Semiconductor
Corporation
Americas
Tel: 1-800-272-9959
Fax: 1-800-737-7018
Email: support@nsc.com
National Semiconductor
Europe
National Semiconductor
Asia Pacific Customer
Response Group
Tel: 65-2544466
Fax: 65-2504466
National Semiconductor
Japan Ltd.
Tel: 81-3-5620-6175
Fax: 81-3-5620-6179
Fax: +49 (0) 1 80-530 85 86
Email: europe.support@nsc.com
Deutsch Tel: +49 (0) 1 80-530 85 85
English Tel: +49 (0) 1 80-532 78 32
Français Tel: +49 (0) 1 80-532 93 58
Italiano Tel: +49 (0) 1 80-534 16 80
Email: sea.support@nsc.com
www.national.com
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
相关型号：
54ACT373DM-MLS
Bus Driver, ACT Series, 1-Func, 8-Bit, True Output, CMOS, CDIP20, CERAMIC, DIP-20
ROCHESTER
54ACT373LM
Bus Driver, ACT Series, 1-Func, 8-Bit, True Output, CMOS, CQCC20, CERAMIC, LCC-20
FAIRCHILD
©2020 ICPDF网 联系我们和版权申明