54ACT151LM
更新时间：2024-09-18 13:03:32
品牌：NSC
描述：IC ACT SERIES, 8 LINE TO 1 LINE MULTIPLEXER, COMPLEMENTARY OUTPUT, CQCC20, CERAMIC, LCC-20, Multiplexer/Demultiplexer
概述
规格参数
数据手册54ACT151LM 概述
IC ACT SERIES, 8 LINE TO 1 LINE MULTIPLEXER, COMPLEMENTARY OUTPUT, CQCC20, CERAMIC, LCC-20, Multiplexer/Demultiplexer 复用器/解复用器
54ACT151LM 规格参数
| 生命周期： | Transferred | 包装说明： | QCCN, |
| Reach Compliance Code： | unknown | HTS代码： | 8542.39.00.01 |
| 风险等级： | 5.2 | 系列： | ACT |
| JESD-30 代码： | S-CQCC-N20 | 长度： | 8.89 mm |
| 负载电容（CL）： | 50 pF | 逻辑集成电路类型： | MULTIPLEXER |
| 功能数量： | 1 | 输入次数： | 8 |
| 输出次数： | 1 | 端子数量： | 20 |
| 最高工作温度： | 125 °C | 最低工作温度： | -55 °C |
| 输出极性： | COMPLEMENTARY | 封装主体材料： | CERAMIC, METAL-SEALED COFIRED |
| 封装代码： | QCCN | 封装形状： | SQUARE |
| 封装形式： | CHIP CARRIER | 传播延迟（tpd）： | 16 ns |
| 认证状态： | Not Qualified | 座面最大高度： | 1.905 mm |
| 最大供电电压 (Vsup)： | 5.5 V | 最小供电电压 (Vsup)： | 4.5 V |
| 标称供电电压 (Vsup)： | 5 V | 表面贴装： | YES |
| 技术： | CMOS | 温度等级： | MILITARY |
| 端子形式： | NO LEAD | 端子节距： | 1.27 mm |
| 端子位置： | QUAD | 宽度： | 8.89 mm |
| Base Number Matches： | 1 |
54ACT151LM 数据手册
通过下载54ACT151LM数据手册来全面了解它。这个PDF文档包含了所有必要的细节，如产品概述、功能特性、引脚定义、引脚排列图等信息。
PDF下载July 2003
54AC151/54ACT151
8-Input Multiplexer
General Description
The ’AC/’ACT151 is a high-speed 8-input digital multiplexer.
It provides, in one package, the ability to select one line of
data from up to eight sources. The ’AC/’ACT151 can be used
as a universal function generator to generate any logic func-
tion of four variables. Both true and complementary outputs
are provided.
n ’ACT151 has TTL-compatible inputs
n Standard Microcircuit Drawing (SMD)
—’AC151: 5962-87691
—’ACT151: 5962-88756
n 54AC151 now qualified to 300Krad RHA designation,
refer to the SMD for more information
Features
n ICC reduced by 50%
n Outputs source/sink 24 mA
Logic Symbols
IEEE/IEC
10027001
10027006
Pin Names
Description
I0–I7
Data Inputs
Select Inputs
S0–S2
E
Z
Z
Enable Input
Data Output
Inverted Data Output
FACT® is a registered trademark of Fairchild Semiconductor Corporation.
© 2003 National Semiconductor Corporation
DS100270
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Connection Diagrams
Pin Assignment
for DIP and Flatpak
Pin Assignment
for LCC
10027002
10027003
Truth Table
Functional Description
Inputs
S1
Outputs
E
H
L
L
L
L
L
L
L
L
S2
X
L
S0
X
L
Z
Z
L
The ’AC/’ACT151 is a logic implementation of a single pole,
8-position switch with the switch position controlled by the
state of three Select inputs, S0, S1, S2. Both true and
complementary outputs are provided. The Enable input (E) is
active LOW. When it is not activated, the complementary
output is HIGH and the true output is LOW regardless of all
other inputs. The logic function provided at the output is:
X
L
H
I0
I1
I2
I3
I4
I5
I6
I7
I0
I1
I2
I3
I4
I5
I6
I7
L
L
H
L
L
H
H
L
L
H
L
Z = E • (I0 • S0 • S1 • S2 + I1 • S0 • S1 • S2
+
H
H
H
H
I2 • S0 • S1 • S2 + I3 • S0 • S1 • S2 + I4 • S0 • S1 • S2
I5 • S0 • S1 • S2 + I6 • S0 • S1 • S2 + I7 • S0 • S1 • S2)
+
L
H
L
H
H
The ’AC/’ACT151 provides the ability, in one package to
select from eight sources of data or control information. By
proper manipulation of the inputs, the ’AC/’ACT151 can
provide any logic function of four variables and its comple-
ment.
H
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
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2
Logic Diagram
10027004
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
3
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Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Recommended Operating
Conditions
Supply Voltage (VCC
)
’AC
2.0V to 6.0V
4.5V to 5.5V
0V to VCC
Supply Voltage (VCC
)
−0.5V to +7.0V
’ACT
DC Input Diode Current (IIK
VI = −0.5V
)
Input Voltage (VI)
Output Voltage (VO)
−20 mA
+20 mA
0V to VCC
VI = VCC + 0.5V
Operating Temperature (TA)
54AC/ACT
DC Input Voltage (VI)
−0.5V to VCC +
−55˚C to +125˚C
125 mV/ns
0.5V
Minimum Input Edge Rate (∆V/∆t)
’AC Devices
DC Output Diode Current (IOK
VO = −0.5V
)
−20 mA
+20 mA
VIN from 30% to 70% of VCC
VO = VCC + 0.5V
@
VCC 3.3V, 4.5V, 5.5V
DC Output Voltage (VO)
−0.5V to VCC
+
Minimum Input Edge Rate (∆V/∆t)
’ACT Devices
0.5V
DC Output Source
VIN from 0.8V to 2.0V
or Sink Current (IO)
50 mA
@
VCC 4.5V, 5.5V
125 mV/ns
DC VCC or Ground Current
per Output Pin (ICC or IGND
)
50 mA
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, without
exception, to ensure that the system design is reliable over its power supply,
temperature, and output/input loading variables. National does not recom-
mend operation of FACT® circuits outside databook specifications.
Storage Temperature (TSTG
Junction Temperature (TJ)
CDIP
)
−65˚C to +150˚C
175˚C
DC Characteristics for ’AC Family Devices
54AC
Symbol
VIH
Parameter
VCC
(V)
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
TA = −55˚C to +125˚C
Units
Conditions
VOUT = 0.1V
Guaranteed Limits
Minimum High Level
Input Voltage
2.1
3.15
3.85
0.9
V
V
V
or VCC − 0.1V
VIL
Maximum Low Level
Input Voltage
VOUT = 0.1V
1.35
1.65
2.9
or VCC − 0.1V
VOH
Minimum High Level
Output Voltage
IOUT = −50 µA
4.4
5.4
(Note 2)
VIN = VIL or VIH
IOH = −12 mA
IOH = −24 mA
IOH = −24 mA
IOUT = 50 µA
3.0
4.5
5.5
3.0
4.5
5.5
2.4
3.7
4.7
0.1
0.1
0.1
V
V
VOL
Maximum Low Level
Output Voltage
(Note 2)
VIN = VIL or VIH
IOL = 12 mA
IOL = 24 mA
IOL = 24 mA
VI = VCC, GND
3.0
4.5
5.5
5.5
0.50
0.50
0.50
1.0
V
IIN
Maximum Input
Leakage Current
µA
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4
DC Characteristics for ’AC Family Devices (Continued)
54AC
Symbol
Parameter
VCC
(V)
5.5
5.5
5.5
TA = −55˚C to +125˚C
Units
Conditions
Guaranteed Limits
IOLD
IOHD
ICC
Minimum Dynamic
50
mA
mA
µA
VOLD = 1.65V Max
VOHD = 3.85V Min
VIN = VCC
Output Current (Note 3)
−50
80.0
Maximum Quiescent
Supply Current
or GND
Note 2: All outputs loaded; thresholds on input associated with output under test.
Note 3: Maximum test duration 2.0 ms, one output loaded at a time.
@
@
Note 4: I and I
3.0V are guaranteed to be less than or equal to the respective limit 5.5V V
.
CC
IN
CC
@ @
for 54AC 25˚C is identical to 74AC 25˚C
I
CC
DC Characteristics for ’ACT Family Devices
54ACT
Symbol
VIH
Parameter
VCC
(V)
4.5
5.5
4.5
5.5
4.5
5.5
TA = −55˚C to +125˚C
Units
Conditions
Guaranteed Limits
Minimum High Level
Input Voltage
2.0
2.0
0.8
0.8
4.4
5.4
V
V
V
VOUT = 0.1V
or VCC − 0.1V
VOUT = 0.1V
or VCC − 0.1V
IOUT = −50 µA
VIL
Maximum Low Level
Input Voltage
VOH
Minimum High Level
Output Voltage
(Note 5)
VIN = VIL or VIH
IOH = −24 mA
IOH = −24 mA
IOUT = 50 µA
4.5
5.5
4.5
5.5
3.70
4.70
0.1
V
V
VOL
Maximum Low Level
Output Voltage
0.1
(Note 5)
VIN = VIL or VIH
IOL = 24 mA
IOL = 24 mA
VI = VCC, GND
4.5
5.5
5.5
0.50
0.50
1.0
V
IIN
Maximum Input
Leakage Current
Maximum
µA
mA
ICCT
5.5
1.6
VI = VCC − 2.1V
I
CC/Input
IOLD
IOHD
ICC
Minimum Dynamic
Output Current (Note 6)
Maximum Quiescent
Supply Current
5.5
5.5
5.5
50
mA
mA
µA
VOLD = 1.65V Max
VOHD = 3.85V Min
VIN = VCC
−50
80.0
or GND
Note 5: All outputs loaded; thresholds on input associated with output under test.
Note 6: Maximum test duration 2.0 ms, one output loaded at a time.
@ @
for 54ACT 25˚C is identical to 74ACT 25˚C.
Note 7: I
CC
5
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AC Electrical Characteristics
54AC
VCC
(V)
TA = −55˚C to +125˚C
CL = 50 pF
Fig.
No.
Symbol
Parameter
Units
(Note 8)
3.3
Min
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
Max
22.0
15.5
22.0
15.5
15.5
12.0
15.5
12.0
16.0
12.0
18.0
13.0
tPLH
Propagation Delay
Sn to Z or Z
ns
ns
ns
ns
ns
ns
5.0
tPHL
tPLH
tPHL
tPLH
tPHL
Propagation Delay
Sn to Z or Z
3.3
5.0
Propagation Delay
E to Z or Z
3.3
5.0
Propagation Delay
E to Z or Z
3.3
5.0
Propagation Delay
In to Z or Z
3.3
5.0
Propagation Delay
In to Z or Z
3.3
5.0
Note 8: Voltage Range 3.3 is 3.3V 0.3V
Voltage Range 5.0 is 5.0V 0.5V
AC Electrical Characteristics
54ACT
VCC
(V)
TA = −55˚C to +125˚C
CL = 50 pF
Fig.
No.
Symbol
Parameter
Units
(Note 9)
5.0
Min
Max
tPLH
Propagation Delay
Sn to Z
1.0
19.5
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
Propagation Delay
Sn to Z
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
20.0
19.5
20.0
12.0
12.5
12.0
12.5
15.0
16.0
15.0
16.0
Propagation Delay
Sn to Z
Propagation Delay
Sn to Z
Propagation Delay
E to Z
Propagation Delay
E to Z
Propagation Delay
E to Z
Propagation Delay
E to Z
Propagation Delay
In to Z
Propagation Delay
In to Z
Propagation Delay
In to Z
Propagation Delay
In to Z
Note 9: Voltage Range 5.0 is 5.0V 0.5V
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6
Capacitance
Symbol
Parameter
Input Capacitance
Power Dissipation
Capacitance
Typ
4.5
Units
pF
Conditions
VCC = OPEN
VCC = 5.0V
CIN
CPD
70.0
pF
7
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Physical Dimensions inches (millimeters) unless otherwise noted
20 Terminal Ceramic Leadless Chip Carrier (L)
NS Package Number E20A
16 Lead Ceramic Dual-In-Line Package (D)
NS Package Number J16A
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8
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16 Lead Ceramic Flatpak (F)
NS Package Number W16A
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and
whose failure to perform when properly used in
accordance with instructions for use provided in the
labeling, can be reasonably expected to result in a
significant injury to the user.
2. A critical component is any component of a life
support device or system whose failure to perform
can be reasonably expected to cause the failure of
the life support device or system, or to affect its
safety or effectiveness.
National Semiconductor
Americas Customer
Support Center
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Europe Customer Support Center
Fax: +49 (0) 180-530 85 86
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Support Center
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Fax: 81-3-5639-7507
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Email: ap.support@nsc.com
Email: jpn.feedback@nsc.com
Tel: 81-3-5639-7560
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National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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