PIMD3 [NEXPERIA]

NPN/PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = 10 kΩProduction;
PIMD3
型号: PIMD3
厂家: Nexperia    Nexperia
描述:

NPN/PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = 10 kΩProduction

开关 光电二极管 晶体管
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PIMD3  
NPN/PNP resistor-equipped transistors;  
R1 = 10 kΩ, R2 = 10 kΩ  
12 August 2022  
Product data sheet  
1. General description  
NPN/PNP Resistor-Equipped Transistors (RET) in a small SOT457 (SC-74) Surface-Mounted  
Device (SMD) plastic package.  
2. Features and benefits  
100 mA output current capability  
Built-in bias resistors  
Simplifies circuit design  
Reduces component count  
Reduces pick and place costs  
AEC-Q101 qualified  
3. Applications  
Low current peripheral driver  
Control of IC inputs  
Replaces general-purpose transistors in digital applications  
4. Quick reference data  
Table 1. Quick reference data  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Per transistor, for the PNP transistor with negative polarity  
VCEO  
collector-emitter  
voltage  
open base  
-
-
50  
V
IO  
output current  
-
-
100  
13  
mA  
kΩ  
R1  
bias resistor 1 (input)  
bias resistor ratio  
7
10  
1
R2/R1  
0.8  
1.2  
 
 
 
 
Nexperia  
PIMD3  
NPN/PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = 10 kΩ  
5. Pinning information  
Table 2. Pinning information  
Pin  
1
Symbol  
GND1  
I1  
Description  
Simplified outline  
Graphic symbol  
O1 I2  
GND2  
TR2  
GND (emitter) TR1  
input (base) TR1  
output (collector) TR2  
GND (emitter) TR2  
input (base) TR2  
output (collector) TR1  
2
6
5
4
3
3
O2  
R1  
R2  
4
GND2  
I2  
TR1  
R2  
5
R1  
1
2
6
O1  
SC-74; TSOP6 (SOT457)  
GND1  
I1 O2  
006aaa143  
6. Ordering information  
Table 3. Ordering information  
Type number  
Package  
Name  
Description  
Version  
PIMD3  
SC-74; TSOP6 plastic, surface-mounted package (SC-74; TSOP6); 6  
leads  
SOT457  
7. Marking  
Table 4. Marking codes  
Type number  
Marking code  
M7  
PIMD3  
©
PIMD3  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2022. All rights reserved  
Product data sheet  
12 August 2022  
2 / 13  
 
 
 
Nexperia  
PIMD3  
NPN/PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = 10 kΩ  
8. Limiting values  
Table 5. Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol Parameter Conditions  
Per transistor, for the PNP transistor with negative polarity  
Min  
Max  
Unit  
VCBO  
VCEO  
VEBO  
VI  
collector-base voltage  
open emitter  
-
-
-
-
-
-
-
-
-
50  
V
collector-emitter voltage open base  
50  
V
emitter-base voltage  
input voltage  
open collector  
10  
V
input voltage TR1  
40  
V
-10  
10  
V
input voltage TR2  
V
-40  
100  
250  
V
IO  
output current  
mA  
mW  
Ptot  
total power dissipation  
Tamb ≤ 25 °C  
Tamb ≤ 25 °C  
[1]  
[1]  
Per device  
Ptot  
Tj  
total power dissipation  
junction temperature  
ambient temperature  
storage temperature  
-
400  
150  
150  
150  
mW  
°C  
-
Tamb  
Tstg  
-65  
-65  
°C  
°C  
[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided, 35 μm copper, tin-plated and standard footprint.  
aaa-032926  
500  
P
tot  
(mW)  
400  
300  
200  
100  
0
-75  
25  
125  
225  
T
(°C)  
amb  
FR4 PCB, single-sided, 35 µm copper, tin-plated and standard footprint  
Fig. 1. Per device: Power derating curve  
©
PIMD3  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2022. All rights reserved  
Product data sheet  
12 August 2022  
3 / 13  
 
 
Nexperia  
PIMD3  
NPN/PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = 10 kΩ  
9. Thermal characteristics  
Table 6. Thermal characteristics  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Per transistor  
Rth(j-a)  
thermal resistance from in free air  
junction to ambient  
[1]  
[1]  
-
-
500  
K/W  
Per device  
Rth(j-a)  
thermal resistance from in free air  
junction to ambient  
-
-
313  
K/W  
[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided, 35 µm copper, tin-plated and standard footprint.  
006aac767  
3
10  
duty cycle = 1  
Z
th(j-a)  
(K/W)  
0.75  
0.5  
0.33  
2
10  
0.2  
0.1  
0.05  
0.02  
0.01  
10  
0
1
-5  
10  
-4  
-3  
-2  
10  
-1  
2
3
10  
10  
10  
1
10  
10  
10  
t
(s)  
p
FR4 PCB, single-sided, 35 µm copper, tin-plated and standard footprint  
Fig. 2. Transient thermal impedance from junction to ambient as a function of pulse duration for PIMD3  
(SOT457); typical values  
©
PIMD3  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2022. All rights reserved  
Product data sheet  
12 August 2022  
4 / 13  
 
 
Nexperia  
PIMD3  
NPN/PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = 10 kΩ  
10. Characteristics  
Table 7. Characteristics  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Per transistor, for the PNP transistor with negative polarity  
V(BR)CBO  
V(BR)CEO  
ICBO  
collector-base  
breakdown voltage  
IC = 100 µA; IE = 0 A; Tamb = 25 °C  
IC = 2 mA; IB = 0 A; Tamb = 25 °C  
VCB = 50 V; IE = 0 A; Tamb = 25 °C  
50  
50  
-
-
-
-
-
V
collector-emitter  
breakdown voltage  
-
V
collector-base cut-off  
current  
100  
nA  
ICEO  
collector-emitter cut-off VCE = 30 V; IB = 0 A; Tamb = 25 °C  
-
-
-
-
-
-
1
µA  
µA  
µA  
current  
VCE = 30 V; IB = 0 A; Tj = 150 °C  
5
IEBO  
emitter-base cut-off  
current  
VEB = 5 V; IC = 0 mA; Tamb = 25 °C  
400  
hFE  
DC current gain  
VCE = 5 V; IC = 5 mA; Tamb = 25 °C  
IC = 10 mA; IB = 0.5 mA; Tamb = 25 °C  
30  
-
-
-
-
VCEsat  
collector-emitter  
150  
mV  
saturation voltage  
VI(off)  
off-state input voltage VCE = 5 V; IC = 100 µA; Tamb = 25 °C  
on-state input voltage VCE = 0.3 V; IC = 10 mA; Tamb = 25 °C  
bias resistor 1 (input)  
-
1.1  
1.8  
10  
1
0.8  
-
V
VI(on)  
R1  
2.5  
7
V
13  
1.2  
kΩ  
R2/R1  
TR1 (NPN)  
Cc  
bias resistor ratio  
0.8  
collector capacitance  
transition frequency  
VCB = 10 V; IE = 0 A; ie = 0 A; f = 1 MHz;  
Tamb = 25 °C  
-
-
-
2.5  
-
pF  
fT  
VCE = 5 V; IC = 10 mA; f = 100 MHz;  
Tamb = 25 °C  
[1]  
[1]  
230  
MHz  
TR2 (PNP)  
Cc  
collector capacitance  
transition frequency  
VCB = 10 V; IE = 0 A; ie = 0 A; f = 1 MHz;  
Tamb = 25 °C  
-
-
-
3
-
pF  
fT  
VCE = -5 V; IC = -10 mA; f = 100 MHz;  
Tamb = 25 °C  
180  
MHz  
[1] Characteristics of built-in transistor  
©
PIMD3  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2022. All rights reserved  
Product data sheet  
12 August 2022  
5 / 13  
 
 
Nexperia  
PIMD3  
NPN/PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = 10 kΩ  
006aac768  
006aac769  
3
10  
1
h
FE  
(1)  
V
CEsat  
(V)  
(2)  
(3)  
2
10  
-1  
10  
(1)  
10  
(2)  
(3)  
-2  
1
10  
-1  
10  
2
2
1
10  
10  
1
10  
10  
I
(mA)  
I (mA)  
C
C
VCE = 5 V  
IC/IB = 20  
(1) Tamb = 100 °C  
(2) Tamb = 25 °C  
(3) Tamb = -40 °C  
(1) Tamb = 100 °C  
(2) Tamb = 25 °C  
(3) Tamb = -40 °C  
Fig. 3. TR1 (NPN): DC current gain as a function of  
collector current; typical values  
Fig. 4. TR1 (NPN): Collector-emitter saturation voltage  
as a function of collector current; typical values  
006aac770  
006aac771  
10  
10  
V
I(on)  
(V)  
V
I(off)  
(V)  
(1)  
(2)  
(1)  
(2)  
1
1
(3)  
(3)  
-1  
-1  
10  
10  
-1  
2
-1  
10  
1
10  
10  
10  
1
10  
I
(mA)  
I (mA)  
C
C
VCE = 0.3 V  
VCE = 5 V  
(1) Tamb = -40 °C  
(2) Tamb = 25 °C  
(3) Tamb = 100 °C  
(1) Tamb = -40 °C  
(2) Tamb = 25 °C  
(3) Tamb = 100 °C  
Fig. 5. TR1 (NPN): On-state input voltage as a function Fig. 6. TR1 (NPN): Off-state input voltage as a function  
of collector current; typical values  
of collector current; typical values  
©
PIMD3  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2022. All rights reserved  
Product data sheet  
12 August 2022  
6 / 13  
Nexperia  
PIMD3  
NPN/PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = 10 kΩ  
006aac772  
006aac757  
3
3
10  
C
c
(pF)  
f
T
(MHz)  
2
1
0
2
10  
10  
-1  
10  
2
0
10  
20  
30  
40  
V
50  
1
10  
10  
(V)  
I (mA)  
C
CB  
f = 1 MHz  
Tamb = 25 °C  
f = 100 MHz  
Tamb = 25 °C  
VCE = 5 V  
Fig. 7. TR1 (NPN): Collector capacitance as a function  
of collector-base voltage; typical values  
Fig. 8. TR1 (NPN): Transition frequency as a function  
of collector current; typical values of built-in  
transistor  
006aac773  
006aac774  
3
10  
-1  
h
FE  
(1)  
V
CEsat  
(V)  
(2)  
(3)  
2
10  
-1  
(1)  
-10  
10  
(2)  
(3)  
-2  
1
-10  
-1  
-10  
2
2
-1  
-10  
-10  
-1  
-10  
-10  
I
(mA)  
I (mA)  
C
C
VCE = -5 V  
IC/IB = 20  
(1) Tamb = 100 °C  
(2) Tamb = 25 °C  
(3) Tamb = -40 °C  
(1) Tamb = 100 °C  
(2) Tamb = 25 °C  
(3) Tamb = -40 °C  
Fig. 9. TR2 (PNP): DC current gain as a function of  
collector current; typical values  
Fig. 10. TR2 (PNP): Collector-emitter saturation voltage  
as a function of collector current; typical values  
©
PIMD3  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2022. All rights reserved  
Product data sheet  
12 August 2022  
7 / 13  
Nexperia  
PIMD3  
NPN/PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = 10 kΩ  
006aac775  
006aac776  
-10  
-10  
V
I(on)  
(V)  
V
I(off)  
(V)  
(1)  
(2)  
(1)  
(2)  
-1  
-1  
(3)  
(3)  
-1  
-1  
-10  
-10  
-1  
2
-1  
-10  
-1  
-10  
-10  
-10  
-1  
-10  
I
(mA)  
I (mA)  
C
C
VCE = -0.3 V  
VCE = -5 V  
(1) Tamb = -40 °C  
(2) Tamb = 25 °C  
(3) Tamb = 100 °C  
(1) Tamb = -40 °C  
(2) Tamb = 25 °C  
(3) Tamb = 100 °C  
Fig. 11. TR2 (PNP): On-state input voltage as a function Fig. 12. TR2 (PNP): Off-state input voltage as a function  
of collector current; typical values of collector current; typical values  
006aac777  
006aac763  
3
6
10  
C
c
(pF)  
f
T
(MHz)  
4
2
0
2
10  
10  
-1  
-10  
2
0
-10  
-20  
-30  
-40  
V
-50  
(V)  
-1  
-10  
-10  
I (mA)  
C
CB  
f = 1 MHz  
Tamb = 25 °C  
f = 100 MHz  
Tamb = 25 °C  
VCE = -5 V  
Fig. 13. TR2 (PNP): Collector capacitance as a function  
of collector-base voltage; typical values  
Fig. 14. TR2 (PNP): Transition frequency as a function  
of collector current; typical values of built-in  
transistor  
11. Test information  
Quality information  
This product has been qualified in accordance with the Automotive Electronics Council (AEC)  
standard Q101 - Stress test qualification for discrete semiconductors, and is suitable for use in  
automotive applications.  
©
PIMD3  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2022. All rights reserved  
Product data sheet  
12 August 2022  
8 / 13  
 
Nexperia  
PIMD3  
NPN/PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = 10 kΩ  
12. Package outline  
3.1  
2.7  
1.1  
0.9  
6
5
4
0.6  
0.2  
3.0  
2.5 1.3  
1.7  
pin 1 index  
1
2
3
0.26  
0.10  
0.40  
0.25  
0.95  
1.9  
Dimensions in mm  
18-03-11  
Fig. 15. Package outline SC-74; TSOP6 (SOT457)  
©
PIMD3  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2022. All rights reserved  
Product data sheet  
12 August 2022  
9 / 13  
 
Nexperia  
PIMD3  
NPN/PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = 10 kΩ  
13. Soldering  
3.45  
1.95  
0.55  
(6×)  
solder lands  
solder resist  
0.45  
(6×)  
0.95  
0.95  
3.3 2.825  
solder paste  
occupied area  
0.7  
Dimensions in mm  
(6×)  
0.8  
(6×)  
2.4  
sot457_fr  
Fig. 16. Reflow soldering footprint for SC-74; TSOP6 (SOT457)  
5.3  
1.5  
(4×)  
solder lands  
solder resist  
occupied area  
1.475  
5.05  
0.45  
(2×)  
1.475  
Dimensions in mm  
preferred transport  
direction during soldering  
1.45  
(6×)  
2.85  
sot457_fw  
Fig. 17. Wave soldering footprint for SC-74; TSOP6 (SOT457)  
©
PIMD3  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2022. All rights reserved  
Product data sheet  
12 August 2022  
10 / 13  
 
Nexperia  
PIMD3  
NPN/PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = 10 kΩ  
14. Revision history  
Table 8. Revision history  
Data sheet ID  
Release date  
20220812  
Data sheet status  
Change  
notice  
Supersedes  
PIMD3 v.12  
Product data sheet  
-
PEMD3_PIMD3_PUMD3  
v.11  
Modification:  
Family data sheet reduced to single type data sheet.  
PEMD3_PIMD3_PUMD3  
v.11  
20130925  
20091115  
20050518  
20041206  
Product data sheet  
Product data sheet  
Product data sheet  
Product data sheet  
-
-
-
-
PEMD3_PIMD3_PUMD3  
v.10  
PEMD3_PIMD3_PUMD3  
v.10  
PEMD3_PIMD3_PUMD3 v.9  
PEMD3_PIMD3_PUMD3 v.8  
PEMD3_PUMD3 v.7  
PEMD3_PIMD3_ PUMD3  
v.9  
PEMD3_PIMD3_ PUMD3  
v.8  
©
PIMD3  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2022. All rights reserved  
Product data sheet  
12 August 2022  
11 / 13  
 
Nexperia  
PIMD3  
NPN/PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = 10 kΩ  
equipment, nor in applications where failure or malfunction of an Nexperia  
product can reasonably be expected to result in personal injury, death or  
severe property or environmental damage. Nexperia and its suppliers accept  
no liability for inclusion and/or use of Nexperia products in such equipment or  
applications and therefore such inclusion and/or use is at the customer's own  
risk.  
15. Legal information  
Data sheet status  
Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
Document status Product  
Definition  
[1][2]  
status [3]  
Applications — Applications that are described herein for any of these  
Objective [short]  
data sheet  
Development  
This document contains data from  
the objective specification for  
product development.  
products are for illustrative purposes only. Nexperia makes no representation  
or warranty that such applications will be suitable for the specified use  
without further testing or modification.  
Preliminary [short]  
data sheet  
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Production  
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Product [short]  
data sheet  
This document contains the product  
specification.  
[1] Please consult the most recently issued document before initiating or  
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profits, lost savings, business interruption, costs related to the removal  
or replacement of any products or rework charges) whether or not such  
damages are based on tort (including negligence), warranty, breach of  
contract or any other legal theory.  
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trademarks are the property of their respective owners.  
Notwithstanding any damages that customer might incur for any reason  
whatsoever, Nexperia’s aggregate and cumulative liability towards customer  
for the products described herein shall be limited in accordance with the  
Terms and conditions of commercial sale of Nexperia.  
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to information published in this document, including without limitation  
specifications and product descriptions, at any time and without notice. This  
document supersedes and replaces all information supplied prior to the  
publication hereof.  
Suitability for use in automotive applications — This Nexperia product  
has been qualified for use in automotive applications. Unless otherwise  
agreed in writing, the product is not designed, authorized or warranted to  
be suitable for use in life support, life-critical or safety-critical systems or  
©
PIMD3  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2022. All rights reserved  
Product data sheet  
12 August 2022  
12 / 13  
 
Nexperia  
PIMD3  
NPN/PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = 10 kΩ  
Contents  
1. General description......................................................1  
2. Features and benefits.................................................. 1  
3. Applications.................................................................. 1  
4. Quick reference data....................................................1  
5. Pinning information......................................................2  
6. Ordering information....................................................2  
7. Marking..........................................................................2  
8. Limiting values............................................................. 3  
9. Thermal characteristics............................................... 4  
10. Characteristics............................................................5  
11. Test information..........................................................8  
12. Package outline.......................................................... 9  
13. Soldering................................................................... 10  
14. Revision history........................................................11  
15. Legal information......................................................12  
© Nexperia B.V. 2022. All rights reserved  
For more information, please visit: http://www.nexperia.com  
For sales office addresses, please send an email to: salesaddresses@nexperia.com  
Date of release: 12 August 2022  
©
PIMD3  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2022. All rights reserved  
Product data sheet  
12 August 2022  
13 / 13  

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