PDTC124EQC-Q [NEXPERIA]
50 V, 100 mA NPN resistor-equipped transistorsProduction;型号: | PDTC124EQC-Q |
厂家: | Nexperia |
描述: | 50 V, 100 mA NPN resistor-equipped transistorsProduction |
文件: | 总18页 (文件大小:325K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PDTC143/114/124/144EQC-Q
series
50 V, 100 mA NPN resistor-equipped transistors
Rev. 1 — 1 October 2021
Product data sheet
1. General description
100 mA NPN Resistor-Equipped Transistor (RET) family in an ultra small DFN1412D-3 (SOT8009)
leadless Surface-Mounted Device (SMD) plastic package with side-wettable flanks.
Table 1. Product overview
Type number
R1
kΩ
4.7
10
22
47
R2
kΩ
4.7
10
22
47
Package
JEDEC
MO-340CA
PNP complement:
Nexperia
PDTC143EQC-Q
PDTC114EQC-Q
PDTC124EQC-Q
PDTC144EQC-Q
SOT8009
PDTA143EQC-Q
PDTA114EQC-Q
PDTA124EQC-Q
PDTA144EQC-Q
2. Features and benefits
•
•
•
•
•
•
•
•
100 mA output current capability
Built-in resistors
Simplifies circuit design
Reduces component count
Reduces pick and place costs
Low package height of 0.5 mm
Suitable for Automatic Optical Inspection (AOI) of solder joint
Qualified according to AEC-Q101 and recommended for use in automotive applications
3. Applications
•
•
•
•
Digital applications
Cost saving alternative for BC847-Q series in digital applications
Controlling IC inputs
Switching loads
4. Quick reference data
Table 2. Quick reference data
Tamb = 25 °C unless otherwise specified.
Symbol
VCEO
IO
Parameter
Conditions
Min
Typ
Max
50
Unit
V
collector-emitter voltage
output current
open base
-
-
-
-
100
mA
Nexperia
PDTC143/114/124/144EQC-Q series
50 V, 100 mA NPN resistor-equipped transistors
5. Pinning information
Table 3. Pinning
Pin
1
Symbol
Description
Simplified outline
Graphic symbol
I
input (base)
O
R1
3
2
GND
O
GND (emitter)
output (collector)
I
3
R2
1
2
GND
aaa-019964
Transparent top view
6. Ordering information
Table 4. Ordering information
Type number
Package
Name
Description
Version
PDTC143EQC-Q
PDTC114EQC-Q
PDTC124EQC-Q
PDTC144EQC-Q
DFN1412D-3
plastic leadless ultra small outline package with side- SOT8009
wettable flanks (SWF); 3 terminals; 0.8 mm pitch;
body: 1.4 x 1.2 x 0.48 mm
7. Marking
Table 5. Marking
Type number
Marking code
PDTC143EQC-Q
PDTC114EQC-Q
PDTC124EQC-Q
PDTC144EQC-Q
8N
8J
8M
8R
©
PDTC143_114_124_144EQC-Q_SER
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 1 — 1 October 2021
2 / 18
Nexperia
PDTC143/114/124/144EQC-Q series
50 V, 100 mA NPN resistor-equipped transistors
8. Limiting values
Table 6. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Tamb = 25 °C unless otherwise specified.
Symbol
VCBO
VCEO
VEBO
VI
Parameter
Conditions
open emitter
open base
Min
Max
50
Unit
V
collector-base voltage
collector-emitter voltage
emitter-base voltage
input voltage
-
-
-
50
V
open collector
10
V
PDTC143EQC-Q
PDTC114EQC-Q
PDTC124EQC-Q
PDTC144EQC-Q
output current
-10
-10
-10
-10
-
+30
+40
+40
+40
100
360
450
150
150
150
V
V
V
V
IO
mA
mW
mW
°C
°C
°C
Ptot
total power dissipation
Tamb ≤ 25 °C
[1] -
[2] -
-
Tj
junction temperature
ambient temperature
storage temperature
Tamb
Tstg
-55
-65
[1] Device mounted on an FR4 Printed-Circuit-Board (PCB); single-sided; 35 µm copper; tin-plated and standard footprint.
[2] Device mounted on an FR4 PCB; single-sided; 70 µm copper; tin-plated and standard footprint.
aaa-032836
500
P
tot
(mW)
(1)
(2)
400
300
200
100
0
-75
-25
25
75
125
175
(°C)
T
amb
(1) FR4 PCB; single-sided; 70 µm copper; standard footprint
(2) FR4 PCB; single-sided; 35 µm copper; standard footprint
Fig. 1. Power derating curves
©
PDTC143_114_124_144EQC-Q_SER
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 1 — 1 October 2021
3 / 18
Nexperia
PDTC143/114/124/144EQC-Q series
50 V, 100 mA NPN resistor-equipped transistors
9. Thermal characteristics
Table 7. Thermal characteristics
Tamb = 25 °C unless otherwise specified.
Symbol
Parameter
Conditions
Min
[1] -
[2] -
Typ
Max
348
278
Unit
K/W
K/W
Rth(j-a)
thermal resistance from junction to ambient
in free air
-
-
[1] Device mounted on an FR4 PCB; single-sided; 35 μm copper; tin-plated and standard footprint.
[2] Device mounted on an FR4 PCB; single-sided; 70 μm copper; tin-plated and standard footprint.
aaa-032834
3
10
Z
duty cycle = 1
th(j-a)
(K/W)
0.75
0.50
2
0.33
10
0.20
0.10
0.05
0.02
10
0.01
0
1
-5
10
-4
-3
-2
10
-1
2
3
10
10
10
1
10
10
10
t
(s)
p
FR4 PCB; single-sided; 35 μm copper; tin-plated and standard footprint.
Fig. 2. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
aaa-032835
3
10
Z
th(j-a)
(K/W)
duty cycle = 1
0.75
0.50
2
10
0.33
0.20
0.10
0.05
0.02
10
0.01
0
1
-5
10
-4
-3
-2
10
-1
2
3
10
10
10
1
10
10
10
t
(s)
p
FR4 PCB; single-sided; 70 μm copper; tin-plated and standard footprint.
Fig. 3. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
©
PDTC143_114_124_144EQC-Q_SER
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 1 — 1 October 2021
4 / 18
Nexperia
PDTC143/114/124/144EQC-Q series
50 V, 100 mA NPN resistor-equipped transistors
10. Characteristics
Table 8. Characteristics
Tamb = 25 °C unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max Unit
V(BR)CBO
collector-base
IC = 100 µA; IE = 0 A
50
-
-
V
breakdown voltage
V(BR)CEO
ICBO
collector-emitter
breakdown voltage
IC = 2 mA; IB = 0 A
VCB = 50 V; IE = 0 A
50
-
-
-
-
V
collector-base cut-off
current
100
nA
ICEO
collector-emitter cut-off VCE = 30 V; IB = 0 A
current
-
-
-
-
100
5
nA
µA
VCE = 30 V; IB = 0 A; Tj = 150 °C
IEBO
emitter-base cut-off current
PDTC143EQC-Q
PDTC114EQC-Q
PDTC124EQC-Q
PDTC144EQC-Q
DC current gain
PDTC143EQC-Q
PDTC114EQC-Q
PDTC124EQC-Q
PDTC144EQC-Q
VEB = 5 V; IC = 0 A
-
-
-
-
-
-
900
400
180
90
µA
µA
µA
µA
hFE
VCE = 5 V; IC = 10 mA
VCE = 5 V; IC = 5 mA
30
30
60
80
-
-
-
-
-
-
-
-
-
-
VCEsat
VI(off)
collector-emitter
saturation voltage
IC = 10 mA; IB = 0.5 mA
VCE = 5 V ; IC = 100 µA
100
mV
off-state input voltage
PDTC143EQC-Q
PDTC114EQC-Q
PDTC124EQC-Q
PDTC144EQC-Q
on-state input voltage
PDTC143EQC-Q
PDTC114EQC-Q
PDTC124EQC-Q
PDTC144EQC-Q
bias resistor 1 (input)
PDTC143EQC-Q
PDTC114EQC-Q
PDTC124EQC-Q
PDTC144EQC-Q
bias resistor ratio
transition frequency
collector capacitance
-
-
-
-
1.1
1.1
1.1
1.2
0.5
0.8
0.8
0.8
V
V
V
V
VI(on)
VCE = 0.3 V ; IC = 20 mA
VCE = 0.3 V ; IC = 10 mA
VCE = 0.3 V ; IC = 5 mA
VCE = 0.3 V ; IC = 2 mA
2.5
2.5
2.5
3.0
1.9
1.8
1.7
1.6
-
-
-
-
V
V
V
V
R1
[1] 3.3
7
4.7
10
6.1
13
kΩ
kΩ
15.4 22
28.6 kΩ
33
47
1
61
1.2
-
kΩ
R2/R1
fT
0.8
VCE = 5 V; IC = 10 mA; f = 100 MHz
VCB = 10 V; IE = ie = 0 A; f = 1 MHz
[2] -
230
-
MHz
pF
Cc
-
2.5
[1] See "Section 11: Test information" for resistor calculation and test conditions
[2] Characteristics of built-in transistor
©
PDTC143_114_124_144EQC-Q_SER
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 1 — 1 October 2021
5 / 18
Nexperia
PDTC143/114/124/144EQC-Q series
50 V, 100 mA NPN resistor-equipped transistors
006aac831
3
10
h
FE
(1)
aaa-018583
(2)
0.1
0.80 mA
(3)
0.72 mA
I
C
2
10
(A)
0.64 mA
0.56 mA
0.08
0.48 mA
0.40 mA
0.06
0.04
0.02
0
10
0.32 mA
0.24 mA
1
-1
10
2
1
10
10
I
(mA)
C
I
= 0.16 mA
4 5
B
VCE = 5 V
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = -40 °C
0
1
2
3
V
(V)
CE
Tamb = 25 °C
Fig. 4. PDTC143EQC-Q: DC current gain as a function Fig. 5. PDTC143EQC-Q: Collector current as a function
of collector current; typical values
of collector-emitter voltage; typical values
006aac832
1
006aac833
10
V
CEsat
(V)
V
I(on)
(V)
(1)
(2)
(1)
(3)
-1
(2)
(3)
10
1
-2
10
2
1
10
10
-1
10
I
(mA)
C
-1
2
10
1
10
10
I
(mA)
C
IC/IB = 20
VCE = 0.3 V
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = -40 °C
(1) Tamb = -40 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
Fig. 6. PDTC143EQC-Q: Collector-emitter saturation
voltage as a function of collector current;
typical values
Fig. 7. PDTC143EQC-Q: On-state input voltage as a
function of collector current; typical values
©
PDTC143_114_124_144EQC-Q_SER
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 1 — 1 October 2021
6 / 18
Nexperia
PDTC143/114/124/144EQC-Q series
50 V, 100 mA NPN resistor-equipped transistors
006aac834
10
006aac835
3
V
I(off)
(V)
C
(pF)
c
(1)
2
1
0
(2)
1
(3)
-1
10
-1
10
1
10
I
(mA)
C
0
10
20
30
40
V
50
(V)
CB
VCE = 5 V
(1) Tamb = -40 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
f = 1 MHz
Tamb = 25 °C
Fig. 9. PDTC143EQC-Q: Collector capacitance as
a function of collector-base voltage; typical
values
Fig. 8. PDTC143EQC-Q: Off-state input voltage as a
function of collector current; typical values
006aac768
3
10
h
FE
(1)
aaa-018663
0.1
0.60 mA
I
C
(A)
0.54 mA
0.48 mA
0.42 mA
0.36 mA
(2)
(3)
2
10
0.08
0.30 mA
0.24 mA
0.06
0.04
0.02
0
10
0.18 mA
0.12 mA
1
-1
10
2
1
10
10
I
(mA)
C
I
= 0.06 mA
4 5
B
VCE = 5 V
0
1
2
3
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = -40 °C
V
(V)
CE
Tamb = 25 °C
Fig. 10. PDTC114EQC-Q: DC current gain as a function Fig. 11. PDTC114EQC-Q: Collector current as a function
of collector current; typical values
of collector-emitter voltage; typical values
©
PDTC143_114_124_144EQC-Q_SER
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 1 — 1 October 2021
7 / 18
Nexperia
PDTC143/114/124/144EQC-Q series
50 V, 100 mA NPN resistor-equipped transistors
006aac769
1
006aac770
10
V
CEsat
(V)
V
I(on)
(V)
(1)
(2)
-1
10
(1)
1
(3)
(2)
(3)
-2
10
2
1
10
10
-1
10
I
(mA)
C
-1
2
10
1
10
10
I
(mA)
C
IC/IB = 20
VCE = 0.3 V
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = -40 °C
(1) Tamb = -40 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
Fig. 12. PDTC114EQC-Q: Collector-emitter saturation
voltage as a function of collector current;
typical values
Fig. 13. PDTC114EQC-Q: On-state input voltage as a
function of collector current; typical values
006aac771
10
006aac772
3
V
I(off)
(V)
C
(pF)
c
(1)
(2)
2
1
0
1
(3)
-1
10
-1
10
1
10
I
(mA)
C
0
10
20
30
40
V
50
(V)
CB
VCE = 5 V
(1) Tamb = -40 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
f = 1 MHz
Tamb = 25 °C
Fig. 15. PDTC114EQC-Q: Collector capacitance as
a function of collector-base voltage; typical
values
Fig. 14. PDTC114EQC-Q: Off-state input voltage as a
function of collector current; typical values
©
PDTC143_114_124_144EQC-Q_SER
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 1 — 1 October 2021
8 / 18
Nexperia
PDTC143/114/124/144EQC-Q series
50 V, 100 mA NPN resistor-equipped transistors
006aac794
3
10
h
FE
(1)
aaa-018665
0.1
(2)
0.60 mA
0.54 mA
I
C
(A)
(3)
2
10
0.48 mA
0.42 mA
0.08
0.36 mA
0.30 mA
0.06
0.04
0.02
0
0.24 mA
0.18 mA
10
0.12 mA
1
-1
10
2
1
10
10
I
(mA)
I
= 0.06 mA
4 5
C
B
VCE = 5 V
0
1
2
3
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = -40 °C
V
(V)
CE
Tamb = 25 °C
Fig. 16. PDTC124EQC-Q: DC current gain as a function Fig. 17. PDTC124EQC-Q: Collector current as a function
of collector current; typical values
of collector-emitter voltage; typical values
aaa-018664
1
006aac796
10
V
CEsat
(V)
V
I(on)
(V)
(1)
(2)
-1
(3)
10
1
(1)
(2)
(3)
-2
10
-1
2
10
1
10
10
-1
10
I
(mA)
C
-1
2
10
1
10
10
I
(mA)
C
IC/IB = 20
VCE = 0.3 V
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = -40 °C
(1) Tamb = -40 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
Fig. 18. PDTC124EQC-Q: Collector-emitter saturation
voltage as a function of collector current;
typical values
Fig. 19. PDTC124EQC-Q: On-state input voltage as a
function of collector current; typical values
©
PDTC143_114_124_144EQC-Q_SER
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 1 — 1 October 2021
9 / 18
Nexperia
PDTC143/114/124/144EQC-Q series
50 V, 100 mA NPN resistor-equipped transistors
006aac797
10
006aac798
3
V
I(off)
(V)
C
(pF)
c
(1)
(2)
(3)
2
1
0
1
-1
10
-1
10
1
10
I
(mA)
C
0
10
20
30
40
V
50
(V)
CB
VCE = 5 V
(1) Tamb = -40 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
f = 1 MHz
Tamb = 25 °C
Fig. 21. PDTC124EQC-Q: Collector capacitance as
a function of collector-base voltage; typical
values
Fig. 20. PDTC124EQC-Q: Off-state input voltage as a
function of collector current; typical values
006aac752
3
10
h
FE
(1)
(2)
(3)
aaa-018667
0.1
0.60 mA
0.54 mA
0.48 mA
0.42 mA
I
C
(A)
2
10
0.08
0.36 mA
0.30 mA
0.06
0.04
0.02
0
10
0.24 mA
0.18 mA
0.12 mA
1
-1
10
2
1
10
10
I
(mA)
C
I
= 0.06 mA
4 5
B
VCE = 5 V
0
1
2
3
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = -40 °C
V
(V)
CE
Tamb = 25 °C
Fig. 22. PDTC144EQC-Q: DC current gain as a function Fig. 23. PDTC144EQC-Q: Collector current as a function
of collector current; typical values
of collector-emitter voltage; typical values
©
PDTC143_114_124_144EQC-Q_SER
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 1 — 1 October 2021
10 / 18
Nexperia
PDTC143/114/124/144EQC-Q series
50 V, 100 mA NPN resistor-equipped transistors
aaa-018666
1
006aac754
10
V
CEsat
(V)
V
I(on)
(V)
(1)
(2)
(3)
-1
10
1
(1)
(2)
(3)
-2
10
-1
2
10
1
10
10
-1
10
I
(mA)
C
-1
2
10
1
10
10
I
(mA)
C
IC/IB = 20
VCE = 0.3 V
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = -40 °C
(1) Tamb = -40 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
Fig. 24. PDTC144EQC-Q: Collector-emitter saturation
voltage as a function of collector current;
typical values
Fig. 25. PDTC144EQC-Q: On-state input voltage as a
function of collector current; typical values
006aac755
10
006aac756
2.0
C
c
(pF)
V
I(off)
(V)
1.6
(1)
(2)
(3)
1.2
0.8
0.4
0.0
1
-1
10
-1
10
1
10
I
(mA)
C
0
10
20
30
40
V
50
(V)
CB
VCE = 5 V
(1) Tamb = -40 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
f = 1 MHz
Tamb = 25 °C
Fig. 27. PDTC144EQC-Q: Collector capacitance as
a function of collector-base voltage; typical
values
Fig. 26. PDTC144EQC-Q: Off-state input voltage as a
function of collector current; typical values
©
PDTC143_114_124_144EQC-Q_SER
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 1 — 1 October 2021
11 / 18
Nexperia
PDTC143/114/124/144EQC-Q series
50 V, 100 mA NPN resistor-equipped transistors
006aac757
3
10
f
T
(MHz)
2
10
10
-1
10
2
1
10
10
I
(mA)
C
f = 100 MHz
Tamb = 25 °C
VCE = 5 V
Fig. 28. Transition frequency as a function of collector current; typical values
©
PDTC143_114_124_144EQC-Q_SER
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 1 — 1 October 2021
12 / 18
Nexperia
PDTC143/114/124/144EQC-Q series
50 V, 100 mA NPN resistor-equipped transistors
11. Test information
Resistor calculation
•
Calculation of bias resistor 1 (R1)
•
Calculation of bias resistor ratio (R2/R1)
n.c.
I
I
; I
I1 I2
R1
; I
I3 I4
R2
GND
aaa-020082
Fig. 29. Resistor test circuit
Resistor test conditions
Table 9. Resistor test conditions
Type number
R1 (kΩ)
R2 (kΩ)
Test conditions
II1
II2
II3
II4
PDTC143EQC-Q
PDTC114EQC-Q
PDTC124EQC-Q
PDTC144EQC-Q
4.7
10
22
47
4.7
10
22
47
600 μA
350 μA
150 μA
55 μA
700 μA
450 μA
230 μA
105 μA
-600 μA
-350 μA
-150 μA
-55 μA
-700 μA
-450 μA
-230 μA
-105 μA
11.1. Quality information
This product has been qualified in accordance with the Automotive Electronics Council (AEC)
standard Q101 - Stress test qualification for discrete semiconductors, and is suitable for use in
automotive applications.
©
PDTC143_114_124_144EQC-Q_SER
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Product data sheet
Rev. 1 — 1 October 2021
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Nexperia
PDTC143/114/124/144EQC-Q series
50 V, 100 mA NPN resistor-equipped transistors
12. Package outline
1.4
0.8
0.50
0.44
0.04
max
0.30
0.22
0.35
0.27
1
2
0.25
1.2
0.55
0.47
3
1.25
1.17
0.22
0.10
Dimensions in mm
21-06-29
Fig. 30. Package outline DFN1412D-3 (SOT8009)
©
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Product data sheet
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Nexperia
PDTC143/114/124/144EQC-Q series
50 V, 100 mA NPN resistor-equipped transistors
13. Soldering
Footprint information for reflow soldering of DFN1412D-3 package
SOT8009
1.7
0.5
0.4
0.3
0.3
0.4
0.8
0.65 0.55 0.45
0.3
0.4
0.4
2.0
0.6 0.7
0.95 0.85 0.75
0.25
0.25
1.2
1.3
1.4
recommended stencil thickness: 0.1 mm
occupied area
solder resist
solder paste
solder land
Dimensions in mm
20-03-23
Issue date
sot8009_fr
Fig. 31. Reflow soldering footprint DFN1412D-3 (SOT8009)
©
PDTC143_114_124_144EQC-Q_SER
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Product data sheet
Rev. 1 — 1 October 2021
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Nexperia
PDTC143/114/124/144EQC-Q series
50 V, 100 mA NPN resistor-equipped transistors
14. Revision history
Table 10. Revision history
Data sheet ID
Release date
Data sheet status
Change
notice
Supersedes
PDTC143_114_124_144EQC-
Q_SER v.1
20211001
Product data sheet
-
-
©
PDTC143_114_124_144EQC-Q_SER
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 1 — 1 October 2021
16 / 18
Nexperia
PDTC143/114/124/144EQC-Q series
50 V, 100 mA NPN resistor-equipped transistors
equipment, nor in applications where failure or malfunction of an Nexperia
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15. Legal information
Data sheet status
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Document status Product
Definition
[1][2]
status [3]
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Production
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This document contains the product
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[1] Please consult the most recently issued document before initiating or
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[2] The term 'short data sheet' is explained in section "Definitions".
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Suitability for use in automotive applications — This Nexperia product
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be suitable for use in life support, life-critical or safety-critical systems or
©
PDTC143_114_124_144EQC-Q_SER
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 1 — 1 October 2021
17 / 18
Nexperia
PDTC143/114/124/144EQC-Q series
50 V, 100 mA NPN resistor-equipped transistors
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Applications.................................................................. 1
4. Quick reference data....................................................1
5. Pinning information......................................................2
6. Ordering information....................................................2
7. Marking..........................................................................2
8. Limiting values............................................................. 3
9. Thermal characteristics............................................... 4
10. Characteristics............................................................5
11. Test information........................................................13
11.1. Quality information...................................................13
12. Package outline........................................................ 14
13. Soldering................................................................... 15
14. Revision history........................................................16
15. Legal information......................................................17
© Nexperia B.V. 2021. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 1 October 2021
©
PDTC143_114_124_144EQC-Q_SER
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 1 — 1 October 2021
18 / 18
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