BUK9Y19-55B [NEXPERIA]
N-channel TrenchMOS logic level FETProduction;
| 型号： | BUK9Y19-55B |
| 厂家： | 
Nexperia |
| 描述： | N-channel TrenchMOS logic level FETProduction 开关 脉冲 晶体管 |
| 文件： | 总12页 (文件大小：734K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
BUK9Y19-55B
N-channel TrenchMOS logic level FET
Rev. 03 — 29 February 2008
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel enhancement mode power Field-Effect Transistor (FET) in a
plastic package using Nexperia High-Performance Automotive (HPA) TrenchMOS
technology. This product has been designed and qualified to the appropriate AEC
standard for use in automotive critical applications.
1.2 Features
175 °C rated
Logic level compatible
Q101 compliant
Very low on-state resistance
1.3 Applications
12 V and 24 V loads
Automotive systems
General purpose power switching
Motors, lamps and solenoids
1.4 Quick reference data
Table 1.
Quick reference
Symbol Parameter
Conditions
Min Typ Max Unit
ID
drain current
VGS = 5 V; Tmb = 25 °C;
-
-
46
A
see Figure 1 and 4
Ptot
total power dissipation Tmb = 25 °C; see Figure 2
-
-
85
W
Static characteristics
RDSon drain-source on-state
resistance
VGS = 5 V; ID = 20 A;
Tj = 25 °C; see Figure 12 and
13
-
-
16.3 19
mΩ
Avalanche ruggedness
EDS(AL)S non-repetitive
drain-source
ID = 46 A; Vsup ≤ 55 V;
RGS = 50 Ω; VGS = 5 V;
Tj(init) = 25 °C; unclamped
-
80
mJ
avalanche energy
BUK9Y19-55B
Nexperia
N-channel TrenchMOS logic level FET
2. Pinning information
Table 2.
Pinning
Pin
1
Symbol Description
Simplified outline
Graphic symbol
S
S
S
G
D
source
source
source
gate
D
mb
2
3
G
4
mbb076
S
mb
mounting base;
1
2 3 4
connected to drain
SOT669 (LFPAK)
3. Ordering information
Table 3.
Ordering information
Type number
Package
Name
Description
plastic single-ended surface-mounted package (LFPAK); 4 leads
Version
BUK9Y19-55B
LFPAK
SOT669
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
Min
Max
55
Unit
V
VDS
VDGR
VGS
ID
drain-source voltage
Tj ≥ 25 °C; Tj ≤ 175 °C
RGS = 20 kΩ
-
drain-gate voltage
gate-source voltage
drain current
-
55
V
-15
15
V
Tmb = 25 °C; VGS = 5 V; see Figure 1 and 4
Tmb = 100 °C; VGS = 5 V; see Figure 1
Tmb = 25 °C; tp ≤ 10 μs; pulsed; see Figure 4
Tmb = 25 °C; see Figure 2
-
46
A
-
32
A
IDM
Ptot
Tstg
Tj
peak drain current
-
184
85
A
total power dissipation
storage temperature
junction temperature
-
W
°C
°C
-55
-55
175
175
Avalanche ruggedness
EDS(AL)S non-repetitive
ID = 46 A; Vsup ≤ 55 V; RGS = 50 Ω; VGS = 5 V;
Tj(init) = 25 °C; unclamped
-
-
80
-
mJ
J
drain-source avalanche
energy
[1][2]
[3]
EDS(AL)R repetitive drain-source
avalanche energy
see Figure 3
Source-drain diode
IS
source current
Tmb = 25 °C
-
-
46
A
A
ISM
peak source current
tp ≤ 10 μs; pulsed; Tmb = 25 °C
184
[1] Single-pulse avalanche rating limited by maximum junction temperature of 175 °C.
[2] Repetitive avalanche rating limited by average junction temperature of 170 °C.
[3] Refer to application note AN10273 for further information.
©
BUK9Y19-55B_3
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 03 — 29 February 2008
2 of 12
BUK9Y19-55B
Nexperia
N-channel TrenchMOS logic level FET
03na19
03nl99
120
50
ID
(A)
40
P
(%)
der
80
30
20
10
40
0
0
0
0
50
100
150
200
50
100
150
200
T
mb (°C)
T
mb
(°C)
P
tot
V
5V
GS
P
=
× 100 %
der
P
(
)
tot 25°C
Fig 1. Continuous drain current as a function of
mounting base temperature
Fig 2. Normalized total power dissipation as a
function of mounting base temperature
03np79
102
IAL
(1)
(A)
10
(2)
(3)
1
10-1
10-3
10-2
10-1
1
10
tAL (ms)
(1) Singleípulse;T = 25 °C.
j
(2) Singleípulse;T = 150 °C.
j
(3) Repetitive.
Fig 3. Single-shot and repetitive avalanche rating; avalanche current as a function of avalanche period
©
BUK9Y19-55B_3
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 03 — 29 February 2008
3 of 12
BUK9Y19-55B
Nexperia
N-channel TrenchMOS logic level FET
03nm00
103
ID
(A)
Limit RDSon = VDS / ID
t
= 10 μs
p
102
10
1
100 μs
1 ms
10 ms
100 ms
DC
10-1
1
10
102
VDS (V)
T
= 25 °C; I
is single pulse
mb
DM
Fig 4. Safe operating area; continuous and peak drain currents as a function of drain-source voltage
5. Thermal characteristics
Table 5.
Symbol
Rth(j-mb)
Thermal characteristics
Parameter
Conditions
Min
Typ
Max
Unit
thermal resistance
from junction to
mounting base
see Figure 5
-
-
1.8
K/W
03nm01
10
Zth (j-mb)
(K/W)
1
10-1
10-2
δ = 0.5
0.2
0.1
tp
T
P
δ =
0.05
0.02
t
tp
T
single shot
10-6
10-5
10-4
10-3
10-2
10-1
1
tp (s)
Fig 5. Transient thermal impedance from junction to mounting base as a function of pulse duration
©
BUK9Y19-55B_3
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 03 — 29 February 2008
4 of 12
BUK9Y19-55B
Nexperia
N-channel TrenchMOS logic level FET
6. Characteristics
Table 6.
Symbol
Characteristics
Parameter
Conditions
Min
Typ
Max
Unit
Static characteristics
V(BR)DSS drain-source
breakdown voltage
ID = 0.25 mA; VGS = 0 V;
Tj = 25 °C
55
50
-
-
-
V
ID = 0.25 mA; VGS = 0 V;
Tj = -55 °C
-
-
V
VGS(th)
gate-source threshold ID = 1 mA; VDS = VGS
;
-
2.3
2
V
voltage Tj = -55 °C; see Figure 11
ID = 1 mA; VDS = VGS; Tj = 25 °C;
see Figure 11
1.1
0.5
-
1.5
V
ID = 1 mA; VDS = VGS
;
-
-
-
V
Tj = 175 °C; see Figure 11
IDSS
drain leakage current VDS = 55 V; VGS = 0 V;
500
μA
Tj = 175 °C
VDS = 55 V; VGS = 0 V; Tj = 25 °C
-
-
-
0.02
2
1
μA
nA
nA
IGSS
gate leakage current VDS = 0 V; VGS = 15 V; Tj = 25 °C
100
100
VDS = 0 V; VGS = -15 V;
2
Tj = 25 °C
RDSon
drain-source on-state VGS = 4.5 V; ID = 20 A; Tj = 25 °C
-
-
-
-
21
mΩ
mΩ
mΩ
resistance
VGS = 10 V; ID = 20 A; Tj = 25 °C
14.3
16.3
17.3
19
VGS = 5 V; ID = 20 A; Tj = 25 °C;
see Figure 12 and 13
VGS = 5 V; ID = 20 A; Tj = 175 °C;
see Figure 12 and 13
-
-
-
40
mΩ
Source-drain diode
VSD
source-drain voltage
IS = 25 A; VGS = 0 V; Tj = 25 °C;
0.85
1.2
V
see Figure 16
trr
reverse recovery time IS = 20 A; dIS/dt = -100 A/μs;
-
-
52
38
-
-
ns
VGS = -10 V; VDS = 30 V;
Qr
recovered charge
nC
Tj = 25 °C
Dynamic characteristics
QG(tot)
QGS
QGD
Ciss
total gate charge
ID = 25 A; VDS = 44 V; VGS = 5 V;
Tj = 25 °C; see Figure 14
-
-
-
-
-
-
18
5
-
nC
nC
nC
pF
pF
pF
gate-source charge
gate-drain charge
input capacitance
output capacitance
-
8
-
VGS = 0 V; VDS = 25 V;
f = 1 MHz; Tj = 25 °C;
see Figure 15
1494
217
86
1992
260
118
Coss
Crss
reverse transfer
capacitance
td(on)
tr
td(off)
tf
turn-on delay time
rise time
VDS = 30 V; RL = 1.2 Ω;
VGS = 5 V; RG(ext) = 10 Ω;
Tj = 25 °C
-
-
-
-
18
-
-
-
-
ns
ns
ns
ns
180
44
turn-off delay time
fall time
134
©
BUK9Y19-55B_3
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 03 — 29 February 2008
5 of 12
BUK9Y19-55B
Nexperia
N-channel TrenchMOS logic level FET
03np29
03np28
120
30
V
GS
(V) = 10
R
(mΩ)
DSon
6.0
5.0
4.6
4.4
4.2
I
D
(A)
25
80
4.0
3.8
20
15
10
3.6
40
3.4
3.2
3.0
2.8
2.6
0
0
2
4
6
8
10
(V)
3
7
11
15
V
DS
V
GS
(V)
T = 25 °C; t = 300 ȝs
T = 25 °C; I = 20 A
j D
j
p
Fig 6. Output characteristics: drain current as a
function of drain-source voltage; typical values
Fig 7. Drain-source on-state resistance as a function
of gate-source voltage; typical values
03ng53
03np15
−1
10
40
I
D
(A)
g
fs
−2
−3
−4
−5
−6
(S)
10
30
min
typ
max
10
10
10
10
20
10
0
1
2
3
5
10
15
20
25
30
V
GS
(V)
I (A)
D
T = 25 °C;V = V
T = 25 °C;V = 25V
j DS
j
DS
GS
Fig 8. Sub-threshold drain current as a function of
gate-source voltage
Fig 9. Forward transconductance as a function of
drain current; typical values
©
BUK9Y19-55B_3
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 03 — 29 February 2008
6 of 12
BUK9Y19-55B
Nexperia
N-channel TrenchMOS logic level FET
03np27
03ng52
60
2.5
V
GS(th)
(V)
I
D
(A)
2.0
1.5
1.0
0.5
0
max
40
typ
min
20
T = 175 °C
j
T = 25 °C
j
0
0
1
2
3
4
−60
0
60
120
180
T (°C)
j
V
GS
(V)
V
= 25V
I
= 1 mA;V = V
GS
DS
D
DS
Fig 10. Transfer characteristics: drain current as a
function of gate-source voltage; typical values
Fig 11. Gate-source threshold voltage as a function of
junction temperature
03np30
03nb25
44
2.4
R
(mΩ)
DSon
a
3.2 3.4 3.6 3.8 4.0
5.0
36
1.6
28
20
12
0.8
V
(V) = 10
GS
0
−60
0
40
80
120
0
60
120
180
T (°C)
j
I
D
(A)
R
DSon
T = 25 °C
j
a =
R
(
)
DSon 25°C
Fig 12. Drain-source on-state resistance as a function
of drain current; typical values
Fig 13. Normalized drain-source on-state resistance
factor as a function of junction temperature
©
BUK9Y19-55B_3
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 03 — 29 February 2008
7 of 12
BUK9Y19-55B
Nexperia
N-channel TrenchMOS logic level FET
03np14
03np31
5
2400
V
(V)
GS
C
(pF)
V
DS
= 14 V
4
3
2
1
0
1800
1200
600
0
C
iss
V
= 44 V
DS
C
oss
C
rss
−1
2
0
5
10
15
20
10
1
10
10
Q
G
(nC)
V
DS
(V)
T = 25 °C; I = 25 A
V
= 0V; f = 1 MHz
j
D
GS
Fig 14. Gate-source voltage as a function of gate
charge; typical values
Fig 15. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values
03np13
100
I
S
(A)
80
60
40
20
0
T = 175 °C
j
T = 25 °C
j
0
0.3
0.6
0.9
1.2
V
SD
(V)
V
= 0V
GS
Fig 16. Source current as a function of source-drain voltage; typical values
©
BUK9Y19-55B_3
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 03 — 29 February 2008
8 of 12
BUK9Y19-55B
Nexperia
N-channel TrenchMOS logic level FET
7. Package outline
Plastic single-ended surface-mounted package (LFPAK); 4 leads
SOT669
A
2
E
A
C
c
E
1
b
2
2
b
3
L
1
mounting
base
b
4
D
1
D
H
L
2
1
2
3
4
X
e
w
M
c
A
b
1/2 e
A
(A )
3
C
A
1
θ
L
detail X
y
C
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
D
(1)
D
(1)
(1)
1
A
A
A
H
L
L
L
2
w
y
θ
UNIT
A
b
b
b
b
c
c
E
E
1
e
1
2
3
1
2
3
4
2
max
1.20 0.15 1.10
1.01 0.00 0.95
0.50 4.41 2.2 0.9 0.25 0.30 4.10
0.35 3.62 2.0 0.7 0.19 0.24 3.80
5.0 3.3
4.8 3.1
6.2 0.85 1.3 1.3
5.8 0.40 0.8 0.8
8°
0°
mm
0.25
4.20
1.27
0.25 0.1
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
04-10-13
06-03-16
SOT669
MO-235
Fig 17. Package outline SOT669 (LFPAK)
©
BUK9Y19-55B_3
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 03 — 29 February 2008
9 of 12
BUK9Y19-55B
Nexperia
N-channel TrenchMOS logic level FET
8. Revision history
Table 7.
Revision history
Document ID
BUK9Y19-55B_3
Modifications:
Release date
Data sheet status
Change notice
Supersedes
20080229
Product data sheet
-
BUK9Y19-55B_2
• The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
• Legal texts have been adapted to the new company name where appropriate.
BUK9Y19-55B_2
20060411
Product data sheet
-
BUK9Y19-55B-01
BUK9Y19-55B-01
(9397 750 13188)
20040528
Product data sheet
-
-
©
BUK9Y19-55B_3
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 03 — 29 February 2008
10 of 12
BUK9Y19-55B
Nexperia
N-channel TrenchMOS logic level FET
9. Legal information
9.1
Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nexperia.com.
damage. Nexperia accepts no liability for inclusion and/or use of
Nexperia products in such equipment or applications and
9.2
Definitions
therefore such inclusion and/or use is at the customer’s own risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — Nexperia products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nexperia.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by Nexperia. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
9.3
Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, Nexperia does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Right to make changes — Nexperia reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — Nexperia products are not designed,
9.4
Trademarks
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of a Nexperia product can reasonably be expected
to result in personal injury, death or severe property or environmental
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
10. Contact information
For additional information, please visit: http://www.nexperia.com
For sales office addresses, send an email to: salesaddresses@nexperia.com
©
BUK9Y19-55B_3
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 03 — 29 February 2008
11 of 12
BUK9Y19-55B
Nexperia
N-channel TrenchMOS logic level FET
11. Contents
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1
1.2
1.3
1.4
General description . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data . . . . . . . . . . . . . . . . . . . . 1
2
3
4
5
6
7
8
Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
Thermal characteristics . . . . . . . . . . . . . . . . . . 4
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 10
9
Legal information. . . . . . . . . . . . . . . . . . . . . . . 11
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 11
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 11
9.1
9.2
9.3
9.4
10
11
Contact information. . . . . . . . . . . . . . . . . . . . . 11
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
© Nexperia B.V. 2017. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 29 February 2008
相关型号：
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