74LVC4066BQ [NEXPERIA]

Quad bilateral switchProduction;
74LVC4066BQ
型号: 74LVC4066BQ
厂家: Nexperia    Nexperia
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Quad bilateral switchProduction

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74LVC4066  
Quad bilateral switch  
Rev. 6 — 26 March 2020  
Product data sheet  
1. General description  
The 74LVC4066 is a high-speed Si-gate CMOS device.  
The 74LVC4066 provides four single pole, single-throw analog switch functions. Each switch has  
two input/output terminals (nY and nZ) and an active HIGH enable input (nE). When nE is LOW,  
the analog switch is turned off.  
Schmitt-trigger action at the enable inputs makes the circuit tolerant of slower input rise and fall  
times across the entire VCC range from 1.65 V to 5.5 V.  
2. Features and benefits  
Wide supply voltage range from 1.65 V to 5.5 V  
Very low ON resistance:  
7.5 Ω (typical) at VCC = 2.7 V  
6.5 Ω (typical) at VCC = 3.3 V  
6 Ω (typical) at VCC = 5 V  
Switch current capability of 32 mA  
High noise immunity  
CMOS low-power consumption  
Direct interface TTL-levels  
Latch-up performance exceeds 250 mA  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V  
Enable inputs accept voltages up to 5 V  
Multiple package options  
Specified from -40 °C to +85 °C and -40 °C to +125 °C  
3. Ordering information  
Table 1. Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
74LVC4066D  
-40 °C to +125 °C  
SO14  
plastic small outline package; 14 leads;  
body width 3.9 mm  
SOT108-1  
74LVC4066PW -40 °C to +125 °C  
74LVC4066BQ -40 °C to +125 °C  
TSSOP14  
plastic thin shrink small outline package; 14 leads;  
body width 4.4 mm  
SOT402-1  
SOT762-1  
DHVQFN14 plastic dual in-line compatible thermal enhanced  
very thin quad flat package; no leads; 14 terminals;  
body 2.5 × 3 × 0.85 mm  
 
 
 
Nexperia  
74LVC4066  
Quad bilateral switch  
4. Functional diagram  
1
1Y  
1Z  
2
1
2
1
1
1
1
1
13  
#
#
#
#
X1  
13 1E  
1
2
3
13  
#
#
#
#
4
5
3
9
4
5
8
6
2Y  
2E  
3Y  
3E  
2Z  
3Z  
3
9
1
4
5
X1  
8
6
1
8
6
9
X1  
11  
12  
10  
11  
12  
10  
1
11  
12  
4Z 10  
4Y  
4E  
X1  
(a)  
(b)  
mnb111  
mnb112  
Fig. 1. Logic symbol  
Fig. 2. Logic symbol (IEEE/IEC)  
nZ  
nY  
nE  
V
CC  
mna658  
Fig. 3. Logic diagram (one switch)  
5. Pinning information  
5.1. Pinning  
terminal 1  
index area  
2
3
4
5
6
13  
1E  
1Z  
12  
11  
10  
9
2Z  
2Y  
2E  
3E  
4E  
4Y  
4Z  
3Z  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
1Y  
1Z  
V
CC  
4066  
1E  
4E  
4Y  
4Z  
3Z  
3Y  
(1)  
GND  
2Z  
2Y  
4066  
001aad118  
2E  
Transparent top view  
3E  
(1) This is not a ground pin. There is no electrical or  
mechanical requirement to solder the pad. In case  
soldered, the solder land should remain floating or  
connected to GND.  
8
GND  
001aad117  
Fig. 4. Pin configuration for SOT108-1 (SO14) and  
SOT402-1 (TSSOP14)  
Fig. 5. Pin configuration for SOT762-1 (DHVQFN14)  
©
74LVC4066  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 6 — 26 March 2020  
2 / 20  
 
 
 
Nexperia  
74LVC4066  
Quad bilateral switch  
5.2. Pin description  
Table 2. Pin description  
Symbol  
Pin  
Description  
1Y, 2Y, 3Y, 4Y  
1Z, 2Z, 3Z, 4Z  
1E, 2E, 3E, 4E  
GND  
1, 4, 8, 11  
2, 3, 9, 10  
13, 5, 6, 12  
7
independent input/output  
independent output/input  
enable input (active HIGH)  
ground (0 V)  
VCC  
14  
supply voltage  
6. Functional description  
Table 3. Function table  
H = HIGH voltage level; L = LOW voltage level.  
Input nE  
Switch  
OFF  
L
H
ON  
7. Limiting values  
Table 4. Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
Min  
-0.5  
-0.5  
-50  
-
Max  
+6.5  
+6.5  
-
Unit  
V
VCC  
VI  
supply voltage  
input voltage  
[1]  
[2]  
V
IIK  
input clamping current  
switch clamping current  
switch voltage  
VI < -0.5 V or VI < VCC + 0.5 V  
VI < -0.5 V or VI < VCC + 0.5 V  
enable and disable mode  
-0.5 < VSW < VCC + 0.5 V  
mA  
mA  
V
ISK  
±50  
+6.5  
±50  
100  
-
VSW  
ISW  
ICC  
IGND  
Tstg  
Ptot  
-0.5  
-
switch current  
mA  
mA  
mA  
°C  
supply current  
-
ground current  
-100  
-65  
-
storage temperature  
total power dissipation  
+150  
500  
Tamb = -40 °C to +125 °C  
[3]  
mW  
[1] The minimum input voltage rating may be exceeded if the input current rating is observed.  
[2] The minimum and maximum switch voltage ratings may be exceeded if the switch clamping current rating is observed.  
[3] For SOT108-1 (SO14) package: Ptot derates linearly with 10.1 mW/K above 100 °C.  
For SOT402-1 (TSSOP14) package: Ptot derates linearly with 7.3 mW/K above 81 °C.  
For SOT762-1 (DHVQFN14) package: Ptot derates linearly with 9.6 mW/K above 98 °C.  
©
74LVC4066  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 6 — 26 March 2020  
3 / 20  
 
 
 
 
 
Nexperia  
74LVC4066  
Quad bilateral switch  
8. Recommended operating conditions  
Table 5. Recommended operating conditions  
Symbol Parameter  
Conditions  
Min  
Typ  
Max  
5.5  
Unit  
V
VCC  
VI  
supply voltage  
1.65  
-
-
-
-
-
-
input voltage  
0
0
5.5  
V
VSW  
Tamb  
Δt/ΔV  
switch voltage  
[1]  
VCC  
+125  
20  
V
ambient temperature  
input transition rise and fall rate  
-40  
-
°C  
VCC = 1.65 V to 2.7 V  
VCC = 2.7 V to 5.5 V  
[2]  
[2]  
ns/V  
ns/V  
-
10  
[1] To avoid sinking GND current from terminal nZ when switch current flows in terminal nY, the voltage drop across the bidirectional  
switch must not exceed 0.4 V. If the switch current flows into terminal nZ, no GND current will flow from terminal nY. In this case, there  
is no limit for the voltage drop across the switch.  
[2] Applies to control signal levels.  
9. Static characteristics  
Table 6. Static characteristics  
At recommended operating conditions voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
-40 °C to +85 °C  
-40 °C to  
+125 °C  
Unit  
Min  
Typ [1]  
Max  
Min  
Max  
VIH  
VIL  
II  
HIGH-level input VCC = 1.65 V to 1.95 V  
0.65VCC  
-
-
0.65VCC  
-
V
V
V
V
V
V
V
V
μA  
voltage  
VCC = 2.3 V to 2.7 V  
1.7  
-
-
1.7  
-
-
VCC = 2.7 V to 3.6 V  
VCC = 4.5 V to 5.5 V  
2.0  
-
-
-
2.0  
0.7VCC  
-
0.7VCC  
-
LOW-level input VCC = 1.65 V to 1.95 V  
-
-
-
-
-
-
0.35VCC  
0.7  
-
-
-
-
-
0.35VCC  
0.7  
voltage  
VCC = 2.3 V to 2.7 V  
-
VCC = 2.7 V to 3.6 V  
VCC = 4.5 V to 5.5 V  
-
-
0.8  
0.8  
0.3VCC  
±5  
0.3VCC  
±20  
input leakage  
current  
pin nE; VCC = 5.5 V;  
VI = 5.5 V or GND  
[2]  
[2]  
[2]  
[2]  
±0.1  
IS(OFF) OFF-state  
leakage current  
|VSW| = VCC - GND; VCC = 5.5 V;  
see Fig. 6  
-
-
-
-
±0.1  
±0.1  
0.1  
5
±5  
±5  
-
-
-
-
±20  
±20  
40  
μA  
μA  
μA  
IS(ON)  
ON-state leakage |VSW| = VCC - GND; VCC = 5.5 V;  
current  
see Fig. 7  
ICC  
supply current  
VI = VCC or GND;  
10  
VSW = GND or VCC; VCC = 5.5 V  
ΔICC  
CI  
additional supply pin nE; VI = VCC - 0.6 V; VCC = 5.5 V; [2]  
500  
5000 μA  
current  
VSW = GND or VCC  
input capacitance  
-
-
12.5  
8.0  
-
-
-
-
-
-
pF  
pF  
CS(OFF) OFF-state  
capacitance  
CS(ON) ON-state  
capacitance  
-
14.0  
-
-
-
pF  
[1] All typical values are measured at Tamb = 25 °C.  
[2] These typical values are measured at VCC = 3.3 V.  
©
74LVC4066  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 6 — 26 March 2020  
4 / 20  
 
 
 
Nexperia  
74LVC4066  
Quad bilateral switch  
9.1. Test circuits  
V
V
CC  
CC  
nE  
nZ  
nE  
nZ  
V
V
IH  
IL  
nY  
nY  
I
I
S
S
GND  
GND  
V
I
V
O
V
I
V
O
001aag488  
001aag489  
VI = VCC or GND and VO = GND or VCC  
.
VI = VCC or GND and VO = open circuit.  
Fig. 6. Test circuit for measuring OFF-state leakage  
current  
Fig. 7. Test circuit for measuring ON-state leakage  
current  
9.2. ON resistance  
Table 7. ON resistance  
At recommended operating conditions; voltages are referenced to GND (ground 0 V); for graphs see Fig. 9 to Fig. 14.  
Symbol Parameter  
Conditions  
-40 °C to +85 °C  
-40 °C to  
+125 °C  
Unit  
Min Typ [1] Max  
Min  
Max  
RON(peak) ON resistance VI = GND to VCC; see Fig. 8  
(peak)  
ISW = 4 mA; VCC = 1.65 V to 1.95 V  
-
-
-
-
-
34.0  
12.0  
10.4  
7.8  
130  
30  
25  
20  
15  
-
-
-
-
-
195  
45  
38  
30  
23  
Ω
Ω
Ω
Ω
Ω
ISW = 8 mA; VCC = 2.3 V to 2.7 V  
ISW = 12 mA; VCC = 2.7 V  
ISW = 24 mA; VCC = 3 V to 3.6 V  
ISW = 32 mA; VCC = 4.5 V to 5.5 V  
6.2  
RON(rail) ON resistance VI = GND; see Fig. 8  
(rail)  
ISW = 4 mA; VCC = 1.65 V to 1.95 V  
ISW = 8 mA; VCC = 2.3 V to 2.7 V  
ISW = 12 mA; VCC = 2.7 V  
-
-
-
-
-
8.2  
7.1  
6.9  
6.5  
5.8  
18  
16  
14  
12  
10  
-
-
-
-
-
27  
24  
21  
18  
15  
Ω
Ω
Ω
Ω
Ω
ISW = 24 mA; VCC = 3 V to 3.6 V  
ISW = 32 mA; VCC = 4.5 V to 5.5 V  
VI = VCC; see Fig. 8  
ISW = 4 mA; VCC = 1.65 V to 1.95 V  
ISW = 8 mA; VCC = 2.3 V to 2.7 V  
ISW = 12 mA; VCC = 2.7 V  
-
-
-
-
-
10.4  
7.6  
7.0  
6.1  
4.9  
30  
20  
18  
15  
10  
-
-
-
-
-
45  
30  
27  
23  
15  
Ω
Ω
Ω
Ω
Ω
ISW = 24 mA; VCC = 3 V to 3.6 V  
ISW = 32 mA; VCC = 4.5 V to 5.5 V  
©
74LVC4066  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 6 — 26 March 2020  
5 / 20  
 
 
 
 
Nexperia  
74LVC4066  
Quad bilateral switch  
Symbol Parameter  
Conditions  
-40 °C to +85 °C  
Min Typ [1] Max  
-40 °C to  
+125 °C  
Unit  
Min  
Max  
RON(flat) ON resistance VI = GND to VCC  
(flatness)  
[2]  
ISW = 4 mA; VCC = 1.65 V to 1.95 V  
-
-
-
-
-
26.0  
5.0  
3.5  
2.0  
1.5  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Ω
Ω
Ω
Ω
Ω
ISW = 8 mA; VCC = 2.3 V to 2.7 V  
ISW = 12 mA; VCC = 2.7 V  
ISW = 24 mA; VCC = 3 V to 3.6 V  
ISW = 32 mA; VCC = 4.5 V to 5.5 V  
[1] Typical values are measured at Tamb = 25 °C and nominal VCC  
.
[2] Flatness is defined as the difference between the maximum and minimum value of ON resistance measured at identical VCC and  
temperature.  
9.3. ON resistance test circuit and graphs  
mna673  
40  
R
ON  
(Ω)  
30  
(1)  
20  
10  
0
(2)  
(3)  
V
SW  
(4)  
(5)  
4
V
CC  
nE  
nY  
V
0
1
2
3
5
IH  
V (V)  
I
nZ  
(1) VCC = 1.8 V.  
(2) VCC = 2.5 V.  
(3) VCC = 2.7 V.  
(4) VCC = 3.3 V.  
(5) VCC = 5.0 V.  
GND  
V
I
I
SW  
001aag490  
RON = VSW / ISW  
.
Fig. 9. Typical ON resistance as a function of input  
voltage; Tamb = 25 °C  
Fig. 8. Test circuit for measuring ON resistance  
©
74LVC4066  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 6 — 26 March 2020  
6 / 20  
 
 
 
 
Nexperia  
74LVC4066  
Quad bilateral switch  
001aaa712  
001aaa708  
55  
15  
R
ON  
(Ω)  
R
ON  
(Ω)  
45  
13  
35  
25  
15  
5
11  
9
(4)  
(3)  
(2)  
(1)  
(1)  
(2)  
(3)  
(4)  
7
5
0
0.4  
0.8  
1.2  
1.6  
2.0  
0
0.5  
1.0  
1.5  
2.0  
2.5  
V (V)  
I
V (V)  
I
(1) Tamb = 125 °C.  
(2) Tamb = 85 °C.  
(3) Tamb = 25 °C.  
(4) Tamb = -40 °C.  
(1) Tamb = 125 °C.  
(2) Tamb = 85 °C.  
(3) Tamb = 25 °C.  
(4) Tamb = -40 °C.  
Fig. 10. ON resistance as a function of input voltage;  
VCC = 1.8 V  
Fig. 11. ON resistance as a function of input voltage;  
VCC = 2.5 V  
001aaa709  
001aaa710  
13  
10  
R
ON  
(Ω)  
R
ON  
(Ω)  
11  
8
6
4
(1)  
(1)  
(2)  
9
7
5
(2)  
(3)  
(3)  
(4)  
(4)  
0
0.5  
1.0  
1.5  
2.0  
2.5  
V (V)  
3.0  
0
1
2
3
4
V (V)  
I
I
(1) Tamb = 125 °C.  
(2) Tamb = 85 °C.  
(3) Tamb = 25 °C.  
(4) Tamb = -40 °C.  
(1) Tamb = 125 °C.  
(2) Tamb = 85 °C.  
(3) Tamb = 25 °C.  
(4) Tamb = -40 °C.  
Fig. 12. ON resistance as a function of input voltage;  
VCC = 2.7 V  
Fig. 13. ON resistance as a function of input voltage;  
VCC = 3.3 V  
©
74LVC4066  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 6 — 26 March 2020  
7 / 20  
Nexperia  
74LVC4066  
Quad bilateral switch  
001aaa711  
7
6
5
4
3
R
ON  
(Ω)  
(1)  
(2)  
(3)  
(4)  
0
1
2
3
4
5
V (V)  
I
(1) Tamb = 125 °C.  
(2) Tamb = 85 °C.  
(3) Tamb = 25 °C.  
(4) Tamb = -40 °C.  
Fig. 14. ON resistance as a function of input voltage; VCC = 5.0 V  
©
74LVC4066  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 6 — 26 March 2020  
8 / 20  
 
Nexperia  
74LVC4066  
Quad bilateral switch  
10. Dynamic characteristics  
Table 8. Dynamic characteristics  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 17.  
Symbol Parameter Conditions -40 °C to +85 °C -40 °C to +125 °C Unit  
Min Typ [1] Max  
Min  
Max  
tpd  
propagation nY to nZ or nZ to nY; see Fig. 15 [2] [3]  
delay  
VCC = 1.65 V to 1.95 V  
-
-
-
-
-
0.8  
0.4  
0.4  
0.3  
0.2  
2.0  
1.2  
1.0  
0.8  
0.6  
-
-
-
-
-
3.0  
2.0  
1.5  
1.5  
1.0  
ns  
ns  
ns  
ns  
ns  
VCC = 2.3 V to 2.7 V  
VCC = 2.7 V  
VCC = 3.0 V to 3.6 V  
VCC = 4.5 V to 5.5 V  
ten  
enable time  
nE to nY or nZ; see Fig. 16  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 2.7 V  
[4]  
[5]  
[6]  
1.0  
1.0  
1.0  
1.0  
1.0  
5.3  
3.0  
2.6  
2.5  
1.9  
10  
5.6  
5.0  
4.4  
3.9  
1.0  
1.0  
1.0  
1.0  
1.0  
12.5  
7.0  
6.5  
5.5  
5.0  
ns  
ns  
ns  
ns  
ns  
VCC = 3.0 V to 3.6 V  
VCC = 4.5 V to 5.5 V  
tdis  
disable time nE to nY or nZ; see Fig. 16  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
1.0  
1.0  
1.0  
1.0  
1.0  
4.2  
2.4  
3.6  
3.4  
2.5  
9.0  
5.5  
6.5  
6.0  
5.0  
1.0  
1.0  
1.0  
1.0  
1.0  
11.5  
7.0  
8.5  
7.5  
6.5  
ns  
ns  
ns  
ns  
ns  
VCC = 2.7 V  
VCC = 3.0 V to 3.6 V  
VCC = 4.5 V to 5.5 V  
CPD  
power  
dissipation  
capacitance  
CL = 50 pF; fi = 10 MHz;  
VI = GND to VCC  
VCC = 2.5 V  
VCC = 3.3 V  
VCC = 5.0 V  
-
-
-
11.0  
12.5  
15.6  
-
-
-
-
-
-
-
-
-
pF  
pF  
pF  
[1] Typical values are measured at Tamb = 25 °C and nominal VCC  
.
[2] tpd is the same as tPLH and tPHL  
.
[3] Propagation delay is the calculated RC time constant of the typical ON resistance of the switch and the specified capacitance when  
driven by an ideal voltage source (zero output impedance).  
[4] ten is the same as tPZH and tPZL  
.
[5] tdis is the same as tPLZ and tPHZ  
.
[6] CPD is used to determine the dynamic power dissipation (PD in μW).  
PD = CPD × VCC2 × fi × N + Σ{(CL + CS(ON)) × VCC2 × fo} where:  
fi = input frequency in MHz;  
fo = output frequency in MHz;  
CL = output load capacitance in pF;  
CS(ON) = maximum ON-state switch capacitance in pF;  
VCC = supply voltage in V;  
N = number of inputs switching;  
Σ{(CL + CS(ON)) × VCC2 × fo} = sum of the outputs.  
©
74LVC4066  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 6 — 26 March 2020  
9 / 20  
 
 
Nexperia  
74LVC4066  
Quad bilateral switch  
10.1. Waveforms and test circuit  
V
I
nY or nZ  
input  
V
V
M
M
GND  
t
t
PLH  
PHL  
V
OH  
nZ or nY  
output  
V
V
M
M
V
OL  
001aaa541  
Measurement points are given in Table 9.  
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.  
Fig. 15. Input (nY or nZ) to output (nZ or nY) propagation delays  
V
I
nE input  
V
M
GND  
t
t
PZL  
PLZ  
V
CC  
output  
nY or nZ  
nY or nZ  
LOW-to-OFF  
OFF-to-LOW  
V
M
V
X
V
OL  
t
t
PZH  
PHZ  
V
OH  
V
Y
output  
HIGH-to-OFF  
OFF-to-HIGH  
V
M
GND  
switch  
enabled  
switch  
enabled  
switch  
disabled  
001aaa542  
Measurement points are given in Table 9.  
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.  
Fig. 16. Enable and disable times  
Table 9. Measurement points  
Supply voltage  
VCC  
Input  
Output  
VM  
VM  
VX  
VY  
1.65 V to 1.95 V  
2.3 V to 2.7 V  
2.7 V  
0.5VCC  
0.5VCC  
1.5 V  
1.5 V  
0.5VCC  
0.5 VCC  
0.5VCC  
1.5 V  
VOL + 0.15 V  
VOL + 0.15 V  
VOL + 0.3 V  
VOL + 0.3 V  
VOL + 0.3 V  
VOH - 0.15 V  
VOH - 0.15 V  
VOH - 0.3 V  
VOH - 0.3 V  
VOH - 0.3 V  
3.0 V to 3.6 V  
4.5 V to 5.5 V  
1.5 V  
0.5VCC  
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74LVC4066  
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Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 6 — 26 March 2020  
10 / 20  
 
 
 
 
Nexperia  
74LVC4066  
Quad bilateral switch  
V
EXT  
V
CC  
R
L
V
V
O
I
G
DUT  
R
T
C
L
R
L
mna616  
Test data is given in Table 10.  
Definitions test circuit:  
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.  
CL = Load capacitance including jig and probe capacitance.  
RL = Load resistance.  
VEXT = External voltage for measuring switching times.  
Fig. 17. Test circuit for measuring switching times  
Table 10. Test data  
Supply voltage Input  
VCC VI  
1.65 V to 1.95 V VCC  
Load  
CL  
VEXT  
tr, tf  
RL  
tPLH, tPHL  
open  
tPZH, tPHZ  
GND  
tPZL, tPLZ  
2VCC  
2VCC  
6 V  
≤ 2.0 ns  
≤ 2.0 ns  
≤ 2.5 ns  
≤ 2.5 ns  
≤ 2.5 ns  
30 pF  
30 pF  
50 pF  
50 pF  
50 pF  
1 kΩ  
2.3 V to 2.7 V  
2.7 V  
VCC  
500 Ω  
500 Ω  
500 Ω  
500 Ω  
open  
GND  
2.7 V  
2.7 V  
VCC  
open  
GND  
3.0 V to 3.6 V  
4.5 V to 5.5 V  
open  
GND  
6 V  
open  
GND  
2VCC  
10.2. Additional dynamic characteristics  
Table 11. Additional dynamic characteristics  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); Tamb = 25 °C.  
Symbol Parameter  
Conditions  
Min  
Typ  
Max Unit  
THD  
total harmonic distortion  
RL = 10 kΩ; CL = 50 pF; fi = 1 kHz; see Fig. 18  
VCC = 1.65 V  
-
-
-
-
0.032  
0.008  
0.006  
0.005  
-
-
-
-
%
%
%
%
VCC = 2.3 V  
VCC = 3 V  
VCC = 4.5 V  
RL = 10 kΩ; CL = 50 pF; fi = 10 kHz; see Fig. 18  
VCC = 1.65 V  
VCC = 2.3 V  
VCC = 3 V  
-
-
-
-
0.068  
0.009  
0.008  
0.006  
-
-
-
-
%
%
%
%
VCC = 4.5 V  
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74LVC4066  
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Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 6 — 26 March 2020  
11 / 20  
 
 
 
Nexperia  
74LVC4066  
Quad bilateral switch  
Symbol Parameter  
Conditions  
Min  
Typ  
Max Unit  
f(-3dB)  
-3 dB frequency response  
RL = 600 Ω; CL = 50 pF; see Fig. 19  
VCC = 1.65 V  
-
-
-
-
170  
210  
212  
215  
-
-
-
-
MHz  
MHz  
MHz  
MHz  
VCC = 2.3 V  
VCC = 3 V  
VCC = 4.5 V  
RL = 50 Ω; CL = 5 pF; see Fig. 19  
VCC = 1.65 V  
-
-
-
-
> 500  
> 500  
> 500  
> 500  
-
-
-
-
MHz  
MHz  
MHz  
MHz  
VCC = 2.3 V  
VCC = 3 V  
VCC = 4.5 V  
αiso  
isolation (OFF-state)  
RL = 600 Ω; CL = 50 pF; fi = 1 MHz; see Fig. 20  
VCC = 1.65 V  
-
-
-
-
-46  
-46  
-46  
-46  
-
-
-
-
dB  
dB  
dB  
dB  
VCC = 2.3 V  
VCC = 3 V  
VCC = 4.5 V  
RL = 50 Ω; CL = 5 pF; fi = 1 MHz; see Fig. 20  
VCC = 1.65 V  
VCC = 2.3 V  
VCC = 3 V  
-
-
-
-
-42  
-42  
-42  
-42  
-
-
-
-
dB  
dB  
dB  
dB  
VCC = 4.5 V  
Vct  
crosstalk voltage  
between digital inputs and switch; RL = 600 Ω;  
CL = 50 pF; fi = 1 MHz; tr = tf = 2 ns; see Fig. 21  
VCC = 1.65 V  
VCC = 2.3 V  
VCC = 3 V  
-
-
-
-
69  
87  
-
-
-
-
mV  
mV  
mV  
mV  
156  
302  
VCC = 4.5 V  
Xtalk  
crosstalk  
between switches; RL = 600 Ω; CL = 50 pF;  
fi = 1 MHz; see Fig. 22  
VCC = 1.65 V  
VCC = 2.3 V  
VCC = 3 V  
-
-
-
-
-58  
-58  
-58  
-58  
-
-
-
-
dB  
dB  
dB  
dB  
VCC = 4.5 V  
between switches; RL = 50 Ω; CL = 5 pF;  
fi = 1 MHz; see Fig. 22  
VCC = 1.65 V  
VCC = 2.3 V  
VCC = 3 V  
-
-
-
-
-58  
-58  
-58  
-58  
-
-
-
-
dB  
dB  
dB  
dB  
VCC = 4.5 V  
Qinj  
charge injection  
CL = 0.1 nF; Vgen = 0 V; Rgen = 0 Ω; fi = 1 MHz;  
RL = 1 MΩ; see Fig. 23  
VCC = 1.8 V  
VCC = 2.5 V  
VCC = 3.3 V  
VCC = 4.5 V  
VCC = 5.5 V  
-
-
-
-
-
3.3  
4.1  
5.0  
6.4  
7.5  
-
-
-
-
-
pC  
pC  
pC  
pC  
pC  
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74LVC4066  
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Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 6 — 26 March 2020  
12 / 20  
Nexperia  
74LVC4066  
Quad bilateral switch  
10.3. Test circuits  
V
0.5V  
CC  
CC  
nE  
V
R
L
IH  
10 µF  
nY/nZ  
600 Ω  
nZ/nY  
V
O
f
i
C
L
D
001aag492  
Test conditions:  
VCC = 1.65 V: Vi = 1.4 V (p-p).  
VCC = 2.3 V: Vi = 2 V (p-p).  
VCC = 3 V: Vi = 2.5 V (p-p).  
VCC = 4.5 V: Vi = 4 V (p-p).  
Fig. 18. Test circuit for measuring total harmonic distortion  
V
0.5V  
CC  
CC  
nE  
V
R
L
IH  
0.1 µF  
50 Ω  
nY/nZ  
nZ/nY  
V
O
f
i
C
L
dB  
001aag491  
Adjust fi voltage to obtain 0 dBm level at output. Increase fi frequency until dB meter reads -3 dB.  
Fig. 19. Test circuit for measuring the frequency response when switch is in ON-state  
0.5V  
V
0.5V  
CC  
CC  
CC  
nE  
R
L
V
R
L
IL  
0.1 µF  
nY/nZ  
nZ/nY  
V
O
f
i
50 Ω  
C
L
dB  
001aag493  
Adjust fi voltage to obtain 0 dBm level at input.  
Fig. 20. Test circuit for measuring isolation (OFF-state)  
V
CC  
nE  
nY/nZ  
nZ/nY  
V
O
logic  
input  
G
R
L
C
L
50 Ω  
600 Ω  
0.5V  
0.5V  
001aag494  
CC  
CC  
Fig. 21. Test circuit for measuring crosstalk voltage (between digital inputs and switch)  
©
74LVC4066  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 6 — 26 March 2020  
13 / 20  
 
 
 
 
 
Nexperia  
74LVC4066  
Quad bilateral switch  
0.5V  
CC  
1E  
V
R
L
IH  
0.1 µF  
50 Ω  
R
i
1Y or 1Z  
1Z or 1Y  
600 Ω  
CHANNEL  
ON  
C
L
f
V
O1  
i
50 pF  
0.5V  
CC  
2E  
V
R
L
IL  
2Y or 2Z  
2Z or 2Y  
CHANNEL  
OFF  
C
L
R
600 Ω  
V
i
O2  
50 pF  
001aag496  
20 log10 (VO2 / VO1) or 20 log10 (VO1 / VO2).  
Fig. 22. Test circuit for measuring crosstalk between switches  
V
CC  
nE  
R
gen  
nY/nZ  
nZ/nY  
V
O
R
C
L
0.1 nF  
G
logic  
input  
L
V
gen  
1 MΩ  
001aag495  
logic  
input (nE)  
off  
on  
off  
V
O
ΔV  
O
mna675  
Qinj = ΔVO × CL.  
ΔVO = output voltage variation.  
Rgen = generator resistance.  
Vgen = generator voltage.  
Fig. 23. Test circuit for measuring charge injection  
©
74LVC4066  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 6 — 26 March 2020  
14 / 20  
 
 
Nexperia  
74LVC4066  
Quad bilateral switch  
11. Package outline  
SO14: plastic small outline package; 14 leads; body width 3.9 mm  
SOT108-1  
D
E
A
X
c
y
H
v
M
A
E
Z
8
14  
Q
A
2
A
(A )  
3
A
1
pin 1 index  
θ
L
p
L
1
7
e
detail X  
w
M
b
p
0
2.5  
scale  
5 mm  
DIMENSIONS (inch dimensions are derived from the original mm dimensions)  
A
(1)  
(1)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.  
0.25  
0.10  
1.45  
1.25  
0.49  
0.36  
0.25  
0.19  
8.75  
8.55  
4.0  
3.8  
6.2  
5.8  
1.0  
0.4  
0.7  
0.6  
0.7  
0.3  
mm  
1.75  
1.27  
0.05  
1.05  
0.25  
0.25  
0.1  
0.25  
0.01  
8o  
0o  
0.010 0.057  
0.004 0.049  
0.019 0.0100 0.35  
0.014 0.0075 0.34  
0.16  
0.15  
0.244  
0.228  
0.039 0.028  
0.016 0.024  
0.028  
0.012  
inches  
0.041  
0.01 0.01 0.004  
0.069  
Note  
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-19  
SOT108-1  
076E06  
MS-012  
Fig. 24. Package outline SOT108-1 (SO14)  
©
74LVC4066  
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Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 6 — 26 March 2020  
15 / 20  
 
Nexperia  
74LVC4066  
Quad bilateral switch  
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm  
SOT402-1  
D
E
A
X
c
y
H
v
M
A
E
Z
8
14  
Q
(A )  
3
A
2
A
A
1
pin 1 index  
θ
L
p
L
1
7
detail X  
w
M
b
p
e
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
(1)  
(2)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.  
8o  
0o  
0.15  
0.05  
0.95  
0.80  
0.30  
0.19  
0.2  
0.1  
5.1  
4.9  
4.5  
4.3  
6.6  
6.2  
0.75  
0.50  
0.4  
0.3  
0.72  
0.38  
mm  
1.1  
0.65  
1
0.2  
0.13  
0.1  
0.25  
Notes  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-18  
SOT402-1  
MO-153  
Fig. 25. Package outline SOT402-1 (TSSOP14)  
©
74LVC4066  
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Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 6 — 26 March 2020  
16 / 20  
Nexperia  
74LVC4066  
Quad bilateral switch  
DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;  
14 terminals; body 2.5 x 3 x 0.85 mm  
SOT762-1  
B
A
E
D
A
A
1
c
detail X  
terminal 1  
index area  
C
terminal 1  
index area  
e
1
v
w
C
C
A B  
y
y
C
1
e
b
2
6
L
1
7
8
E
h
e
14  
k
13  
9
D
h
X
k
0
2
4 mm  
w
scale  
Dimensions (mm are the original dimensions)  
(1) (1)  
(1)  
Unit  
A
A
b
c
D
D
h
E
E
e
e
k
L
v
y
y
1
1
h
1
max  
nom  
min  
1
0.05 0.30  
0.02 0.25 0.2 3.0 1.50 2.5 1.00 0.5  
0.00 0.18 2.9 1.35 2.4 0.85  
3.1 1.65 2.6 1.15  
0.5  
0.4 0.1 0.05 0.05 0.1  
0.2 0.3  
mm  
2
Note  
sot762-1_po  
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.  
References  
Outline  
version  
European  
projection  
Issue date  
IEC  
JEDEC  
JEITA  
15-04-10  
15-05-05  
SOT762-1  
MO-241  
Fig. 26. Package outline SOT762-1 (DHVQFN14)  
©
74LVC4066  
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Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 6 — 26 March 2020  
17 / 20  
 
Nexperia  
74LVC4066  
Quad bilateral switch  
12. Abbreviations  
Table 12. Abbreviations  
Acronym  
Description  
CMOS  
DUT  
ESD  
HBM  
MM  
Complementary Metal Oxide Semiconductor  
Device Under Test  
ElectroStatic Discharge  
Human Body Model  
Machine Model  
TTL  
Transistor-Transistor Logic  
13. Revision history  
Table 13. Revision history  
Document ID  
Release date Data sheet status  
20200326 Product data sheet  
Change notice Supersedes  
- 74LVC4066 v.5  
74LVC4066 v.6  
Modifications:  
The format of this data sheet has been redesigned to comply with the identity  
guidelines of Nexperia.  
Legal texts have been adapted to the new company name where appropriate.  
Table 4: Derating values for Ptot total power dissipation updated.  
Fig. 26: Package outline drawing SOT762-1 (DHVQFN14) updated.  
74LVC4066 v.5  
Modifications:  
20111123  
Product data sheet  
-
74LVC4066 v.4  
Legal pages updated.  
74LVC4066 v.4  
74LVC4066 v.3  
74LVC4066 v.2  
74LVC4066 v.1  
20101124  
20100809  
20070827  
20030812  
Product data sheet  
Product data sheet  
Product data sheet  
Product specification  
-
-
-
-
74LVC4066 v.3  
74LVC4066 v.2  
74LVC4066 v.1  
-
©
74LVC4066  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 6 — 26 March 2020  
18 / 20  
 
 
Nexperia  
74LVC4066  
Quad bilateral switch  
injury, death or severe property or environmental damage. Nexperia and its  
suppliers accept no liability for inclusion and/or use of Nexperia products in  
such equipment or applications and therefore such inclusion and/or use is at  
the customer’s own risk.  
14. Legal information  
Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
Data sheet status  
Document status Product  
Definition  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. Nexperia makes no representation  
or warranty that such applications will be suitable for the specified use  
without further testing or modification.  
[1][2]  
status [3]  
Objective [short]  
data sheet  
Development  
This document contains data from  
the objective specification for  
product development.  
Customers are responsible for the design and operation of their applications  
and products using Nexperia products, and Nexperia accepts no liability for  
any assistance with applications or customer product design. It is customer’s  
sole responsibility to determine whether the Nexperia product is suitable  
and fit for the customer’s applications and products planned, as well as  
for the planned application and use of customer’s third party customer(s).  
Customers should provide appropriate design and operating safeguards to  
minimize the risks associated with their applications and products.  
Preliminary [short]  
data sheet  
Qualification  
Production  
This document contains data from  
the preliminary specification.  
Product [short]  
data sheet  
This document contains the product  
specification.  
[1] Please consult the most recently issued document before initiating or  
completing a design.  
Nexperia does not accept any liability related to any default, damage, costs  
or problem which is based on any weakness or default in the customer’s  
applications or products, or the application or use by customer’s third party  
customer(s). Customer is responsible for doing all necessary testing for the  
customer’s applications and products using Nexperia products in order to  
avoid a default of the applications and the products or of the application or  
use by customer’s third party customer(s). Nexperia does not accept any  
liability in this respect.  
[2] The term 'short data sheet' is explained in section "Definitions".  
[3] The product status of device(s) described in this document may have  
changed since this document was published and may differ in case of  
multiple devices. The latest product status information is available on  
the internet at https://www.nexperia.com.  
Definitions  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those  
given in the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. Nexperia does not give any representations or  
warranties as to the accuracy or completeness of information included herein  
and shall have no liability for the consequences of use of such information.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is  
intended for quick reference only and should not be relied upon to contain  
detailed and full information. For detailed and full information see the relevant  
full data sheet, which is available on request via the local Nexperia sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Terms and conditions of commercial sale — Nexperia products are  
sold subject to the general terms and conditions of commercial sale, as  
published at http://www.nexperia.com/profile/terms, unless otherwise agreed  
in a valid written individual agreement. In case an individual agreement is  
concluded only the terms and conditions of the respective agreement shall  
apply. Nexperia hereby expressly objects to applying the customer’s general  
terms and conditions with regard to the purchase of Nexperia products by  
customer.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
Nexperia and its customer, unless Nexperia and customer have explicitly  
agreed otherwise in writing. In no event however, shall an agreement be  
valid in which the Nexperia product is deemed to offer functions and qualities  
beyond those described in the Product data sheet.  
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©
74LVC4066  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 6 — 26 March 2020  
19 / 20  
 
Nexperia  
74LVC4066  
Quad bilateral switch  
Contents  
1. General description......................................................1  
2. Features and benefits.................................................. 1  
3. Ordering information....................................................1  
4. Functional diagram.......................................................2  
5. Pinning information......................................................2  
5.1. Pinning.........................................................................2  
5.2. Pin description.............................................................3  
6. Functional description................................................. 3  
7. Limiting values............................................................. 3  
8. Recommended operating conditions..........................4  
9. Static characteristics....................................................4  
9.1. Test circuits..................................................................5  
9.2. ON resistance..............................................................5  
9.3. ON resistance test circuit and graphs..........................6  
10. Dynamic characteristics............................................ 9  
10.1. Waveforms and test circuit...................................... 10  
10.2. Additional dynamic characteristics...........................11  
10.3. Test circuits..............................................................13  
11. Package outline........................................................ 15  
12. Abbreviations............................................................18  
13. Revision history........................................................18  
14. Legal information......................................................19  
© Nexperia B.V. 2020. All rights reserved  
For more information, please visit: http://www.nexperia.com  
For sales office addresses, please send an email to: salesaddresses@nexperia.com  
Date of release: 26 March 2020  
©
74LVC4066  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 6 — 26 March 2020  
20 / 20  

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