74LVC2G3157DP-Q100 [NEXPERIA]
Dual 10 Ω single-pole double-throw analog switchProduction;
| 型号： | 74LVC2G3157DP-Q100 |
| 厂家： | 
Nexperia |
| 描述： | Dual 10 Ω single-pole double-throw analog switchProduction |
| 文件： | 总18页 (文件大小：272K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74LVC2G3157-Q100
Dual 10 Ω single-pole double-throw analog switch
Rev. 2 — 12 May 2021
Product data sheet
1. General description
The 74LVC2G3157-Q100 is a dual low-ohmic single-pole double-throw analog switch suitable for
use as an analog or digital 2:1 multiplexer/demultiplexer. Each switch has a digital select input (nS),
two independent inputs/outputs (nY0 and nY1) and a common input/output (nZ).
Schmitt trigger action at the select inputs makes the circuit tolerant of slower input rise and fall
times across the entire VCC range from 1.65 V to 5.5 V.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100
(Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
•
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
•
•
•
Wide supply voltage range from 1.65 V to 5.5 V
Very low ON resistance:
•
•
•
10.4 Ω (typical) at VCC = 2.7 V
7.8 Ω (typical) at VCC = 3.3 V
6.2 Ω (typical) at VCC = 5 V
•
•
•
•
•
•
•
Switch current capability of 32 mA
Break-before-make switching
High noise immunity
CMOS low power consumption
TTL interface compatibility at 3.3 V
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection:
•
•
•
MIL-STD-883, method 3015 exceeds 2 kV
HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 2 kV
MM JESD22-A115-C exceeds 200 V (C = 200 pF; R = 0 Ω)
•
Select input accepts voltages up to 5.5 V
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
Version
74LVC2G3157DP-Q100
-40 °C to +125 °C
TSSOP10 plastic thin shrink small outline package;
10 leads; body width 3 mm
SOT552-1
Nexperia
74LVC2G3157-Q100
Dual 10 Ω single-pole double-throw analog switch
4. Marking
Table 2. Marking codes
Type number
Marking code[1]
74LVC2G3157DP-Q100
YJ
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
Y1
S
Z
1Y0
1S
2Y0
2S
1Z
2Z
Y0
1Y1
2Y1
001aaj085
001aac355
Fig. 1. Logic symbol
Fig. 2. Logic diagram (one switch)
6. Pinning information
6.1. Pinning
74LVC2G3157
1
2
3
4
5
10
9
1S
1Z
1Y1
1Y0
8
GND
2Y1
2S
V
CC
7
2Y0
2Z
6
aaa-020231
Fig. 3. Pin configuration SOT552-1 (TSSOP10)
©
74LVC2G3157_Q100
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 2 — 12 May 2021
2 / 18
Nexperia
74LVC2G3157-Q100
Dual 10 Ω single-pole double-throw analog switch
6.2. Pin description
Table 3. Pin description
Symbol
Pin
1
Description
1S
select input
1Y1
GND
2Y1
2S
2
independent input or output
ground (0 V)
3
4
independent input or output
select input
5
2Z
6
common output or input
independent input or output
supply voltage
2Y0
VCC
1Y0
1Z
7
8
9
independent input or output
common output or input
10
7. Functional description
Table 4. Function table
H = HIGH voltage level; L = LOW voltage level.
Input nS
Channel on
nY0
L
H
nY1
8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
-0.5
-0.5
-50
-
Max
+6.5
+6.5
-
Unit
V
VCC
VI
supply voltage
input voltage
[1]
[2]
V
IIK
input clamping current
switch clamping current
switch voltage
VI < -0.5 V
mA
mA
V
ISK
VI < -0.5 V or VI > VCC + 0.5 V
enable and disable mode
VSW > -0.5 V or VSW < VCC + 0.5 V
±50
VSW
ISW
ICC
IGND
Tstg
Ptot
-0.5
-
VCC + 0.5
±50
switch current
mA
mA
mA
°C
supply current
-
100
ground current
-100
-65
-
-
storage temperature
total power dissipation
+150
250
Tamb = -40 °C to +125 °C
[3]
mW
[1] The minimum input voltage rating may be exceeded if the input current rating is observed.
[2] The minimum and maximum switch voltage ratings may be exceeded if the switch clamping current rating is observed.
[3] For SOT552-1 (TSSOP10) packages: Ptot derates linearly with 8.3 mW/K above 120 °C.
©
74LVC2G3157_Q100
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 2 — 12 May 2021
3 / 18
Nexperia
74LVC2G3157-Q100
Dual 10 Ω single-pole double-throw analog switch
9. Recommended operating conditions
Table 6. Recommended operating conditions
Symbol Parameter
Conditions
Min
Typ
Max
5.5
Unit
V
VCC
VI
supply voltage
1.65
-
-
-
-
-
-
input voltage
0
0
5.5
V
VSW
Tamb
Δt/ΔV
switch voltage
enable and disable mode
[1]
VCC
+125
20
V
ambient temperature
input transition rise and fall rate
-40
-
°C
VCC = 1.65 V to 2.7 V
VCC = 2.7 V to 5.5 V
[2]
[2]
ns/V
ns/V
-
10
[1] To avoid sinking GND current from terminal Z when switch current flows in terminal Yn, the voltage drop across the bidirectional switch
must not exceed 0.4 V. If the switch current flows into terminal Z, no GND current will flow from terminal Yn. In this case, there is no
limit for the voltage drop across the switch.
[2] Applies to control signal levels.
10. Static characteristics
Table 7. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground 0 V).
Symbol Parameter
Conditions
-40 °C to +85 °C
-40 °C to +125 °C Unit
Min
Typ[1]
Max
Min
Max
VIH
VIL
II
HIGH-level input VCC = 1.65 V to 1.95 V
0.65VCC
-
-
0.65VCC
-
V
V
V
V
V
V
V
V
μA
voltage
VCC = 2.3 V to 2.7 V
1.7
-
-
1.7
-
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
2.0
-
-
-
2.0
-
-
0.7VCC
-
0.7VCC
LOW-level input VCC = 1.65 V to 1.95 V
-
-
-
-
-
-
0.35VCC
0.7
-
-
-
0.35VCC
0.7
voltage
VCC = 2.3 V to 2.7 V
-
VCC = 3 V to 3.6 V
-
-
0.8
0.8
VCC = 4.5 V to 5.5 V
0.3VCC
±1
0.3VCC
±1
input leakage
current
pin nS; VI = 5.5 V or GND;
VCC = 0 V to 5.5 V
[2]
[2]
[2]
[2]
±0.1
-
-
-
-
IS(OFF) OFF-state
leakage current
VCC = 5.5 V; see Fig. 4
VCC = 5.5 V; see Fig. 5
VI = 5.5 V or GND;
-
-
-
±0.1
±0.1
0.1
±0.2
±1
4
±0.5
±2
4
μA
μA
μA
IS(ON)
ON-state
leakage current
ICC
supply current
VSW = GND or VCC
;
VCC = 1.65 V to 5.5 V
ΔICC
CI
additional supply pin nS; VI = VCC - 0.6 V;
[2]
-
-
-
-
5
500
-
-
-
-
500
μA
pF
pF
pF
current
VCC = 5.5 V; VSW = GND or VCC
input
capacitance
2.5
6.0
18
-
-
-
-
-
-
CS(OFF) OFF-state
capacitance
CS(ON) ON-state
capacitance
[1] Typical values are measured at Tamb = 25 °C.
[2] These typical values are measured at VCC = 3.3 V
©
74LVC2G3157_Q100
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 2 — 12 May 2021
4 / 18
Nexperia
74LVC2G3157-Q100
Dual 10 Ω single-pole double-throw analog switch
10.1. Test circuits
switch nS
switch nS
1
2
V
V
1
2
V
IH
IL
V
V
CC
CC
V
IH
IL
nS
nZ
nY0
nY1
1
2
nS
nZ
nY0
nY1
1
2
V
or V
V
or V
IH
IL
IH
switch
IL
switch
l
S
l
S
V
O
V
O
V
V
I
I
GND
GND
aaa-020232
aaa-020233
VI = VCC or GND and VO = GND or VCC
.
VI = VCC or GND and VO = open circuit.
Fig. 4. Test circuit for measuring OFF-state leakage
current
Fig. 5. Test circuit for measuring ON-state leakage
current
10.2. ON resistance
Table 8. ON resistance
At recommended operating conditions; voltages are referenced to GND (ground 0 V); for graphs see Fig. 7 to Fig. 12.
Symbol Parameter
Conditions
-40 °C to +85 °C
-40 °C to +125 °C Unit
Min Typ[1] Max
Min
Max
RON(peak) ON resistance VI = GND to VCC; see Fig. 6
(peak)
ISW = 4 mA;VCC = 1.65 V to 1.95 V
-
-
-
-
-
34.0
12.0
10.4
7.8
130
30
25
20
15
-
-
-
-
-
195
45
38
30
23
Ω
Ω
Ω
Ω
Ω
ISW = 8 mA; VCC = 2.3 V to 2.7 V
ISW = 12 mA; VCC = 2.7 V
ISW = 24 mA; VCC = 3.0 V to 3.6 V
ISW = 32 mA; VCC = 4.5 V to 5.5 V
6.2
RON(rail) ON resistance VI = GND; see Fig. 6
(rail)
ISW = 4 mA;VCC = 1.65 V to 1.95 V
ISW = 8 mA; VCC = 2.3 V to 2.7 V
ISW = 12 mA; VCC = 2.7 V
-
-
-
-
-
8.2
7.1
6.9
6.5
5.8
18
16
14
12
10
-
-
-
-
-
27
24
21
18
15
Ω
Ω
Ω
Ω
Ω
ISW = 24 mA; VCC = 3.0 V to 3.6 V
ISW = 32 mA; VCC = 4.5 V to 5.5 V
VI = VCC; see Fig. 6
ISW = 4 mA;VCC = 1.65 V to 1.95 V
ISW = 8 mA; VCC = 2.3 V to 2.7 V
ISW = 12 mA; VCC = 2.7 V
-
-
-
-
-
10.4
7.6
7.0
6.1
4.9
30
20
18
15
10
-
-
-
-
-
45
30
27
23
15
Ω
Ω
Ω
Ω
Ω
ISW = 24 mA; VCC = 3.0 V to 3.6 V
ISW = 32 mA; VCC = 4.5 V to 5.5 V
©
74LVC2G3157_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 2 — 12 May 2021
5 / 18
Nexperia
74LVC2G3157-Q100
Dual 10 Ω single-pole double-throw analog switch
Symbol Parameter
Conditions
-40 °C to +85 °C
-40 °C to +125 °C Unit
Min Typ[1] Max
Min
Max
RON(flat) ON resistance VI = GND to VCC
(flatness)
[2]
ISW = 4 mA;VCC = 1.65 V to 1.95 V
-
-
-
-
-
26.0
5.0
3.5
2.0
1.5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Ω
Ω
Ω
Ω
Ω
ISW = 8 mA; VCC = 2.3 V to 2.7 V
ISW = 12 mA; VCC = 2.7 V
ISW = 24 mA; VCC = 3.0 V to 3.6 V
ISW = 32 mA; VCC = 4.5 V to 5.5 V
[1] Typical values are measured at Tamb = 25 °C and nominal VCC
.
[2] Flatness is defined as the difference between the maximum and minimum value of ON resistance measured at identical VCC and
temperature.
10.3. ON resistance test circuit and graphs
mna673
40
R
ON
(Ω)
30
(1)
20
10
0
V
SW
(2)
(3)
V
switch nS
(4)
(5)
4
1
2
V
V
IL
CC
V
IH
nS
nZ
nY0
nY1
1
V
IL
or V
IH
switch
0
1
2
3
5
V (V)
I
2
(1) VCC = 1.8 V.
(2) VCC = 2.5 V.
(3) VCC = 2.7 V.
(4) VCC = 3.3 V.
(5) VCC = 5.0 V.
V
I
I
SW
GND
aaa-020235
RON = VSW/ISW
.
Fig. 7. Typical ON resistance as a function of input
voltage; Tamb = 25 °C
Fig. 6. Test circuit for measuring ON resistance
©
74LVC2G3157_Q100
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 2 — 12 May 2021
6 / 18
Nexperia
74LVC2G3157-Q100
Dual 10 Ω single-pole double-throw analog switch
001aaa712
001aaa708
55
15
R
ON
(Ω)
R
ON
(Ω)
45
13
35
25
15
5
11
9
(4)
(3)
(2)
(1)
(1)
(2)
(3)
(4)
7
5
0
0.4
0.8
1.2
1.6
2.0
0
0.5
1.0
1.5
2.0
2.5
V (V)
I
V (V)
I
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(4) Tamb = -40 °C.
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(4) Tamb = -40 °C.
Fig. 8. ON resistance as a function of input voltage;
VCC = 1.8 V
Fig. 9. ON resistance as a function of input voltage;
VCC = 2.5 V
001aaa709
001aaa710
13
10
R
ON
(Ω)
R
ON
(Ω)
11
8
6
4
(1)
(1)
(2)
9
7
5
(2)
(3)
(3)
(4)
(4)
0
0.5
1.0
1.5
2.0
2.5
V (V)
3.0
0
1
2
3
4
V (V)
I
I
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(4) Tamb = -40 °C.
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(4) Tamb = -40 °C.
Fig. 10. ON resistance as a function of input voltage;
VCC = 2.7 V
Fig. 11. ON resistance as a function of input voltage;
VCC = 3.3 V
©
74LVC2G3157_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 2 — 12 May 2021
7 / 18
Nexperia
74LVC2G3157-Q100
Dual 10 Ω single-pole double-throw analog switch
001aaa711
7
6
5
4
3
R
ON
(Ω)
(1)
(2)
(3)
(4)
0
1
2
3
4
5
V (V)
I
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(4) Tamb = -40 °C.
Fig. 12. ON resistance as a function of input voltage; VCC = 5.0 V
©
74LVC2G3157_Q100
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 2 — 12 May 2021
8 / 18
Nexperia
74LVC2G3157-Q100
Dual 10 Ω single-pole double-throw analog switch
11. Dynamic characteristics
Table 9. Dynamic characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 16.
Symbol Parameter
Conditions
-40 °C to +85 °C
Min Typ[1] Max
-40 °C to +125 °C Unit
Min
Max
tpd
propagation
delay
nYn to nZ or nZ to nYn; see Fig. 13
[2]
[3]
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
-
-
-
-
-
-
-
-
-
-
2
-
-
-
-
-
3.0
2.0
1.5
1.5
1.0
ns
ns
ns
ns
ns
1.2
1.0
0.8
0.6
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
nS to nYn; see Fig. 14
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
ten
enable time
[4]
[5]
[6]
1
1
8.7
5.3
4.9
4
24
14
1
1
26.5
15.5
15.5
8.5
ns
ns
ns
ns
ns
1
14
1
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
nS to nYn; see Fig. 14
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
0.5
0.5
7.6
5.7
0.5
0.5
3
6.6
tdis
disable time
2.5
2
6
13
7.5
7.5
5.3
3.8
2.5
2
14.5
8.5
8.5
6
ns
ns
ns
ns
ns
4.4
4.2
3.6
2.9
1.5
1.5
0.8
1.5
1.5
0.8
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
4.5
tb-m
break-before- CL = 35 pF; RL = 50 Ω; see Fig. 15
make time
VCC = 1.65 V to 1.95 V
0.5
0.5
0.5
0.5
0.5
-
-
-
-
-
-
-
-
-
-
0.5
0.5
0.5
0.5
0.5
-
-
-
-
-
ns
ns
ns
ns
ns
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
[1] Typical values are measured at Tamb = 25 °C and nominal VCC
.
[2] tpd is the same as tPLH and tPHL
.
[3] Propagation delay is the calculated RC time constant of the typical ON resistance of the switch and the specified capacitance when
driven by an ideal voltage source (zero output impedance).
[4] ten is the same as tPZH and tPZL
.
[5] tdis is the same as tPLZ and tPHZ
.
[6] Break-before-make specified by design.
©
74LVC2G3157_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 2 — 12 May 2021
9 / 18
Nexperia
74LVC2G3157-Q100
Dual 10 Ω single-pole double-throw analog switch
11.1. Waveforms and test circuits
V
I
nYn or nZ
input
V
V
M
M
GND
t
t
PHL
PLH
V
OH
nZ or nYn
output
V
V
M
M
V
OL
aaa-020236
Measurement points are given in Table 10.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 13. Input (nYn or nZ) to output (nZ or nYn) propagation delays
V
I
nS input
V
M
t
GND
t
PLZ
PZL
V
CC
output
VM
nYn
nYn
LOW to OFF
OFF to LOW
V
X
V
OL
t
t
PZH
PHZ
V
OH
V
Y
output
HIGH to OFF
OFF to HIGH
V
M
GND
switch
switch
switch
enabled
disabled
enabled
aaa-020237
Measurement points are given in Table 10.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 14. Enable and disable times
Table 10. Measurement points
Supply voltage
VCC
Input
Output
VM
VM
VX
VY
1.65 V to 5.5 V
0.5VCC
0.5VCC
VOL + 0.3 V
VOH - 0.3 V
©
74LVC2G3157_Q100
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 2 — 12 May 2021
10 / 18
Nexperia
74LVC2G3157-Q100
Dual 10 Ω single-pole double-throw analog switch
V
0.5V
CC
CC
V
I
0.5V
I
nS
nZ
nY0
nY1
0.9V
G
O
0.9V
V
I
R
L
C
L
O
V
O
V
O
t
b-m
GND
aaa-020239
001aag572
a. Test circuit
Fig. 15. Test circuit for measuring break-before-make timing
b. Input and output measurement points
t
W
V
I
90 %
negative
pulse
V
V
V
M
M
10 %
0 V
t
t
r
f
t
t
f
r
V
I
90 %
positive
pulse
V
M
M
10 %
0 V
t
W
V
EXT
V
CC
R
L
V
V
O
I
PULSE
GENERATOR
DUT
R
T
C
L
R
L
001aae235
Test data is given in Table 11.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
VEXT = Test voltage for switching times.
Fig. 16. Test circuit for measuring switching times
Table 11. Test data
Supply voltage
VCC
Input
VI
Load
CL
VEXT
tr, tf
RL
tPLH, tPHL
open
tPZH, tPHZ
GND
tPZL, tPLZ
2VCC
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
VCC
VCC
VCC
VCC
VCC
≤ 2.0 ns
≤ 2.0 ns
≤ 2.5 ns
≤ 2.5 ns
≤ 2.5 ns
50 pF
50 pF
50 pF
50 pF
50 pF
500 Ω
500 Ω
500 Ω
500 Ω
500 Ω
open
GND
2VCC
open
GND
2VCC
3 V to 3.6 V
4.5 V to 5.5 V
open
GND
2VCC
open
GND
2VCC
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Product data sheet
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Nexperia
74LVC2G3157-Q100
Dual 10 Ω single-pole double-throw analog switch
11.2. Additional dynamic characteristics
Table 12. Additional dynamic characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); Tamb = 25 °C.
Symbol Parameter
Conditions
Min
Typ
Max Unit
THD
total harmonic distortion
fi = 600 Hz to 20 kHz; RL = 600 Ω; CL = 50 pF;
VI = 0.5 V (p-p); see Fig. 17
VCC = 1.65 V
VCC = 2.3 V
-
-
-
-
0.260
0.078
0.078
0.078
-
-
-
-
%
%
%
%
VCC = 3.0 V
VCC = 4.5 V
f(-3dB)
-3 dB frequency response
isolation (OFF-state)
crosstalk
RL = 50 Ω; see Fig. 18
VCC = 1.65 V
-
-
-
-
200
300
300
300
-
-
-
-
MHz
MHz
MHz
MHz
VCC = 2.3 V
VCC = 3.0 V
VCC = 4.5 V
αiso
RL = 50 Ω; CL = 5 pF; fi = 10 MHz; see Fig. 19
VCC = 1.65 V
-
-
-
-
-42
-42
-40
-40
-
-
-
-
dB
dB
dB
dB
VCC = 2.3 V
VCC = 3.0 V
VCC = 4.5 V
Xtalk
between switches; fi = 10 MHz; see Fig. 20
VCC = 1.65 V
-
-
-
-
-54
-54
-54
-54
-
-
-
-
dB
dB
dB
dB
VCC = 2.3 V
VCC = 3.0 V
VCC = 4.5 V
Qinj
charge injection
CL = 0.1 nF; Vgen = 0 V; Rgen = 0 Ω; fi = 1 MHz;
RL = 1 MΩ; see Fig. 21
VCC = 1.8 V
VCC = 2.5 V
VCC = 3.3 V
VCC = 4.5 V
VCC = 5.5 V
-
-
-
-
-
3.3
4.1
5.0
6.4
7.5
-
-
-
-
-
pC
pC
pC
pC
pC
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Product data sheet
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Nexperia
74LVC2G3157-Q100
Dual 10 Ω single-pole double-throw analog switch
11.3. Test circuits
switch nS
0.5V
CC
1
2
V
V
IL
CC
V
IH
R
L
nS
nZ
nY0
nY1
1
2
10 µF
V
or V
IH
IL
switch
0.1 µF
600 Ω
D
f
i
C
L
GND
aaa-020238
Fig. 17. Test circuit for measuring total harmonic distortion
switch nS
V
CC
1
2
V
IL
V
IH
nS
nZ
nY0
nY1
1
2
V
or V
IL
IH
switch
0.1 µF
R
L
dB
DC bias = 350 mV
f
i
50 Ω
GND
aaa-020240
Adjust fi voltage to obtain 0 dBm level at output. Increase fi frequency until dB meter reads -3 dB.
Fig. 18. Test circuit for measuring the frequency response when switch is in ON-state
0.5V
V
0.5V
CC
CC
CC
switch nS
1
2
V
IH
R
L
R
L
V
IL
nS
nZ
nY0
nY1
1
2
V
or V
IH
IL
switch
0.1 µF
dB
f
i
50 Ω
C
L
GND
aaa-020241
Adjust fi voltage to obtain 0 dBm level at input.
Fig. 19. Test circuit for measuring isolation (OFF-state)
V
CC
nS
nY0
nY1
V
IL
or V
IH
nZ
50 Ω
dB
f
i
GND
aaa-020244
Adjust fi voltage to obtain 0 dBm level at input.
Fig. 20. Test circuit for measuring crosstalk
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Product data sheet
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Nexperia
74LVC2G3157-Q100
Dual 10 Ω single-pole double-throw analog switch
V
CC
nS
nZ
nY0
nY1
1
switch
2
G
R
gen
V
I
R
L
C
L
V
O
V
gen
GND
aaa-020242
a. Test circuit
logic
input
(nS)
off
on
off
V
V
O
O
aaa-020243
b. Input and output pulse definitions
Qinj = ΔVO × CL.
ΔVO = output voltage variation.
Rgen = generator resistance.
Vgen = generator voltage.
Fig. 21. Test circuit for measuring charge injection
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Product data sheet
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14 / 18
Nexperia
74LVC2G3157-Q100
Dual 10 Ω single-pole double-throw analog switch
12. Package outline
TSSOP10: plastic thin shrink small outline package; 10 leads; body width 3 mm
SOT552-1
D
E
A
X
c
y
H
v
M
A
E
Z
6
10
A
(A )
2
A
3
A
1
pin 1 index
θ
L
p
L
1
5
detail X
e
w M
b
p
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(2)
(1)
A
A
A
b
c
D
E
e
H
L
L
UNIT
v
w
y
Z
θ
1
2
3
p
E
p
max.
0.15
0.05
0.95
0.80
0.30
0.15
0.23
0.15
3.1
2.9
3.1
2.9
5.0
4.8
0.7
0.4
0.67
0.34
6°
0°
mm
1.1
0.5
0.95
0.1
0.1
0.1
0.25
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-07-29
03-02-18
SOT552-1
Fig. 22. Package outline SOT552-1 (TSSOP10)
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Product data sheet
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Nexperia
74LVC2G3157-Q100
Dual 10 Ω single-pole double-throw analog switch
13. Abbreviations
Table 13. Abbreviations
Acronym
Description
CMOS
DUT
ESD
HBM
MIL
Complementary Metal-Oxide Semiconductor
Device Under Test
ElectroStatic Discharge
Human Body Model
Military
MM
Machine Model
TTL
Transistor-Transistor Logic
14. Revision history
Table 14. Revision history
Document ID
74LVC2G3157_Q100 v.2 20210512
Modifications:
Release date
Data sheet status
Change notice
Supersedes
Product data sheet
-
74LVC2G3157_Q100 v.1
•
Section 8: Derating values for Ptot total power dissipation updated.
74LVC2G3157_Q100 v.1 20190429
Product data sheet
-
-
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Product data sheet
Rev. 2 — 12 May 2021
16 / 18
Nexperia
74LVC2G3157-Q100
Dual 10 Ω single-pole double-throw analog switch
equipment, nor in applications where failure or malfunction of an Nexperia
product can reasonably be expected to result in personal injury, death or
severe property or environmental damage. Nexperia and its suppliers accept
no liability for inclusion and/or use of Nexperia products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
15. Legal information
Data sheet status
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Document status Product
Definition
[1][2]
status [3]
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
Preliminary [short]
data sheet
Qualification
Production
This document contains data from
the preliminary specification.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability for
any assistance with applications or customer product design. It is customer’s
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and fit for the customer’s applications and products planned, as well as
for the planned application and use of customer’s third party customer(s).
Customers should provide appropriate design and operating safeguards to
minimize the risks associated with their applications and products.
Product [short]
data sheet
This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
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Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
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Definitions
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warranties as to the accuracy or completeness of information included herein
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Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
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Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the relevant
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Export control — This document as well as the item(s) described herein
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has been qualified for use in automotive applications. Unless otherwise
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be suitable for use in life support, life-critical or safety-critical systems or
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Product data sheet
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Nexperia
74LVC2G3157-Q100
Dual 10 Ω single-pole double-throw analog switch
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Ordering information....................................................1
4. Marking..........................................................................2
5. Functional diagram.......................................................2
6. Pinning information......................................................2
6.1. Pinning.........................................................................2
6.2. Pin description.............................................................3
7. Functional description................................................. 3
8. Limiting values............................................................. 3
9. Recommended operating conditions..........................4
10. Static characteristics..................................................4
10.1. Test circuits................................................................5
10.2. ON resistance............................................................5
10.3. ON resistance test circuit and graphs........................6
11. Dynamic characteristics.............................................9
11.1. Waveforms and test circuits.....................................10
11.2. Additional dynamic characteristics...........................12
11.3. Test circuits..............................................................13
12. Package outline........................................................ 15
13. Abbreviations............................................................16
14. Revision history........................................................16
15. Legal information......................................................17
© Nexperia B.V. 2021. All rights reserved
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For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 12 May 2021
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Product data sheet
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相关型号：
74LVC2G32DP-G
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