74LVC2G240GT [NEXPERIA]
Dual inverting buffer/line driver; 3-stateProduction;型号: | 74LVC2G240GT |
厂家: | Nexperia |
描述: | Dual inverting buffer/line driver; 3-stateProduction 驱动 光电二极管 逻辑集成电路 |
文件: | 总17页 (文件大小:279K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
74LVC2G240
Dual inverting buffer/line driver; 3-state
Rev. 12 — 1 June 2023
Product data sheet
1. General description
The 74LVC2G240 is a dual inverting buffer/line driver with 3-state outputs. The 3-state outputs are
controlled by the output enable inputs 1OE and 2OE. A HIGH level at pins nOE causes the outputs
to assume a high-impedance OFF-state. Schmitt trigger action at all inputs makes the circuit highly
tolerant of slower input rise and fall times.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of the
74LVC2G240 as a translator in a mixed 3.3 V and 5 V environment.
It is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the
output, preventing a damaging backflow current through the device when it is powered down.
2. Features and benefits
•
Wide supply voltage range from 1.65 V to 5.5 V
•
•
•
5 V tolerant input/output for interfacing with 5 V logic
High noise immunity
Complies with JEDEC standard:
•
•
•
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8-B/JESD36 (2.7 V to 3.6 V)
•
ESD protection:
•
•
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
•
•
•
•
•
•
•
±24 mA output drive (VCC = 3.0 V)
CMOS low power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Inputs accept voltages up to 5 V
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C
Nexperia
74LVC2G240
Dual inverting buffer/line driver; 3-state
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
Version
74LVC2G240DP
74LVC2G240DC
74LVC2G240GT
74LVC2G240GF
74LVC2G240GN
74LVC2G240GS
-40 °C to +125 °C
-40 °C to +125 °C
-40 °C to +125 °C
-40 °C to +125 °C
-40 °C to +125 °C
-40 °C to +125 °C
TSSOP8 plastic thin shrink small outline package;
8 leads; body width 3 mm; lead length 0.5 mm
SOT505-2
SOT765-1
SOT833-1
VSSOP8 plastic very thin shrink small outline package;
8 leads; body width 2.3 mm
XSON8
XSON8
XSON8
XSON8
plastic extremely thin small outline package;
no leads; 8 terminals; body 1 × 1.95 × 0.5 mm
extremely thin small outline package; no leads; SOT1089
8 terminals; body 1.35 × 1 × 0.5 mm
extremely thin small outline package; no leads; SOT1116
8 terminals; body 1.2 × 1.0 × 0.35 mm
extremely thin small outline package; no leads; SOT1203
8 terminals; body 1.35 × 1.0 × 0.35 mm
4. Marking
Table 2. Marking codes
Type number
Marking code [1]
74LVC2G240DP
74LVC2G240DC
74LVC2G240GT
74LVC2G240GF
74LVC2G240GN
74LVC2G240GS
V240
V40
V40
V2
V2
V2
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
EN
1OE
1A
1Y
EN
2OE
2A
2Y
001aah782
001aah783
Fig. 1. Logic symbol
Fig. 2. IEC logic symbol
©
74LVC2G240
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
Rev. 12 — 1 June 2023
2 / 17
Nexperia
74LVC2G240
Dual inverting buffer/line driver; 3-state
6. Pinning information
6.1. Pinning
GT package
SOT833-1 (XSON8)
1OE
1A
1
2
3
4
8
7
6
5
V
CC
DP package
SOT505-2 (TSSOP8)
2OE
1Y
DC package
SOT765-1 (VSSOP8)
2Y
1
8
7
6
5
1OE
1A
V
CC
1
8
7
6
5
1OE
1A
V
CC
2
3
4
2OE
1Y
2
3
4
2OE
1Y
GND
2A
2Y
2Y
GND
2A
GND
2A
aaa-036724
Transparent top view
aaa-036723
aaa-036502
GS package
SOT1203 (XSON8)
GF package
SOT1089 (XSON8)
GN package
SOT1116 (XSON8)
1OE
1A
1
2
3
4
8
7
6
5
V
CC
1OE
1
2
3
4
8
7
6
5
V
CC
1OE
1A
1
2
3
4
8
7
6
5
V
CC
2OE
1Y
1A
2Y
2OE
1Y
2OE
1Y
2Y
2Y
GND
2A
GND
2A
GND
2A
aaa-036725
aaa-036726
001aaf076
Transparent top view
Transparent top view
Transparent top view
6.2. Pin description
Table 3. Pin description
Symbol
Pin
1
Description
1OE
1A
output enable input 1OE (active LOW)
data input
2
2Y
3
data output
GND
2A
4
ground (0 V)
5
data input
1Y
6
data output
2OE
VCC
7
output enable input 2OE (active LOW)
supply voltage
8
©
74LVC2G240
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
Rev. 12 — 1 June 2023
3 / 17
Nexperia
74LVC2G240
Dual inverting buffer/line driver; 3-state
7. Functional description
Table 4. Function table
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
Input
nOE
L
Output
nA
L
nY
H
L
L
H
H
X
Z
8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
-0.5
-50
-0.5
-
Max
+6.5
-
Unit
V
VCC
IIK
supply voltage
input clamping current
input voltage
VI < 0 V
mA
V
VI
[1]
+6.5
±50
IOK
VO
output clamping current
output voltage
VO > VCC or VO < 0 V
Enable mode
mA
V
[1]
[1]
[1]
-0.5
-0.5
-0.5
-
VCC + 0.5
+6.5
+6.5
±50
Disable mode
V
Power-down mode; VCC = 0 V
VO = 0 V to VCC
V
IO
output current
mA
mA
mA
°C
mW
ICC
IGND
Tstg
Ptot
supply current
-
100
ground current
-100
-65
-
-
storage temperature
total power dissipation
+150
250
Tamb = -40 °C to +125 °C
[2]
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SOT505-2 (TSSOP8) package: Ptot derates linearly with 4.6 mW/K above 96 °C.
For SOT765-1 (VSSOP8) package: Ptot derates linearly with 4.9 mW/K above 99 °C.
For SOT833-1 (XSON8) package: Ptot derates linearly with 3.1 mW/K above 68 °C.
For SOT1089 (XSON8) package: Ptot derates linearly with 4.0 mW/K above 88 °C.
For SOT1116 (XSON8) package: Ptot derates linearly with 4.2 mW/K above 90 °C.
For SOT1203 (XSON8) package: Ptot derates linearly with 3.6 mW/K above 81 °C.
©
74LVC2G240
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
Rev. 12 — 1 June 2023
4 / 17
Nexperia
74LVC2G240
Dual inverting buffer/line driver; 3-state
9. Recommended operating conditions
Table 6. Operating conditions
Symbol Parameter
Conditions
Min
Max
5.5
Unit
V
VCC
VI
supply voltage
input voltage
output voltage
1.65
0
0
5.5
V
VO
VCC = 1.65 V to 5.5 V; Enable mode
VCC = 1.65 V to 5.5 V; Disable mode
VCC = 0 V; Power-down mode
VCC
5.5
V
0
V
0
5.5
V
Tamb
ambient temperature
-40
-
+125
20
°C
ns/V
ns/V
Δt/ΔV
input transition rise and fall rate
VCC = 1.65 V to 2.7 V
VCC = 2.7 V to 5.5 V
-
10
10. Static characteristics
Table 7. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Tamb = -40 °C to +85 °C
Tamb
=
Unit
-40 °C to +125 °C
Min
Typ [1]
Max
Min
Max
VIH
HIGH-level input VCC = 1.65 V to 1.95 V
0.65 × VCC
-
-
-
-
-
-
-
-
-
0.65 × VCC
-
V
V
V
V
V
V
V
V
voltage
VCC = 2.3 V to 2.7 V
1.7
-
1.7
-
VCC = 2.7 V to 3.6 V
VCC = 4.5 V to 5.5 V
2.0
-
2.0
-
0.7 × VCC
-
0.7 × VCC
-
VIL
LOW-level input VCC = 1.65 V to 1.95 V
-
-
-
-
0.35 × VCC
0.7
-
-
-
-
0.35 × VCC
0.7
voltage
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VCC = 4.5 V to 5.5 V
0.8
0.8
0.3 × VCC
0.3 × VCC
VOL
LOW-level
VI = VIH or VIL
output voltage
IO = 100 μA;
-
-
0.1
-
0.1
V
VCC = 1.65 V to 5.5 V
IO = 4 mA; VCC = 1.65 V
IO = 8 mA; VCC = 2.3 V
IO = 12 mA; VCC = 2.7 V
IO = 24 mA; VCC = 3.0 V
IO = 32 mA; VCC = 4.5 V
VI = VIH or VIL
-
-
-
-
-
-
-
-
-
-
0.45
0.3
-
0.70
0.45
0.60
0.80
0.80
-
V
V
V
V
V
-
0.4
-
0.55
0.55
-
-
VOH
HIGH-level
-
output voltage
IO = -100 μA;
VCC - 0.1
-
-
VCC - 0.1
-
V
VCC = 1.65 V to 5.5 V
IO = -4 mA; VCC = 1.65 V
IO = -8 mA; VCC = 2.3 V
IO = -12 mA; VCC = 2.7 V
IO = -24 mA; VCC = 3.0 V
IO = -32 mA; VCC = 4.5 V
1.2
1.9
2.2
2.3
3.8
-
-
-
-
-
-
-
-
-
-
0.95
1.7
1.9
2.0
3.4
-
-
-
-
-
V
V
V
V
V
©
74LVC2G240
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
Rev. 12 — 1 June 2023
5 / 17
Nexperia
74LVC2G240
Dual inverting buffer/line driver; 3-state
Symbol Parameter
Conditions
Tamb = -40 °C to +85 °C
Tamb
=
Unit
-40 °C to +125 °C
Min
Typ [1]
Max
Min
Max
II
input leakage
current
VI = 5.5 V or GND;
VCC = 0 V to 5.5 V
-
±0.1
±1
-
±1
μA
μA
μA
μA
μA
pF
IOZ
IOFF
ICC
ΔICC
CI
OFF-state output VI = VIH or VIL;
current
-
-
-
-
-
±0.1
±0.1
0.1
5
±2
±2
4
-
-
-
-
-
±2
±2
4
VO = 5.5 V or GND; VCC = 3.6 V
power-off
leakage current
VI or VO = 5.5 V; VCC = 0 V
supply current
VI = 5.5 V or GND; IO = 0 A;
VCC = 1.65 V to 5.5 V
additional supply per pin; VI = VCC - 0.6 V;
current
500
-
500
-
IO = 0 A; VCC = 2.3 V to 5.5 V
input
2
capacitance
[1] Typical values are measured at VCC = 3.3 V and Tamb = 25 °C.
11. Dynamic characteristics
Table 8. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 5.
Symbol Parameter Conditions Tamb = -40 °C to +85 °C
Tamb
=
Unit
-40 °C to +125 °C
Min
Typ [1]
Max
Min
Max
tpd
ten
tdis
propagation delay nA to nY; see Fig. 3
VCC = 1.65 V to 1.95 V
[2]
[3]
[4]
1.0
0.5
1.0
0.5
0.5
4.1
2.6
3.0
2.5
2.0
9.5
5.2
5.5
4.6
4.0
1.0
0.5
1.0
0.5
0.5
11.9
6.5
6.9
5.8
5.0
ns
ns
ns
ns
ns
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
nOE to nY; see Fig. 4
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
enable time
1.5
1.0
1.5
0.5
0.5
4.5
2.9
3.4
2.5
2.0
10.3
5.6
5.6
4.7
3.8
1.5
1.0
1.5
0.5
0.5
12.9
7.0
7.0
5.9
4.8
ns
ns
ns
ns
ns
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
nOE to nY; see Fig. 4
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
disable time
1.0
0.5
1.0
1.0
0.5
3.5
1.9
2.8
2.7
1.9
11.6
5.8
4.5
4.4
3.4
1.0
0.5
1.0
1.0
0.5
14.1
7.6
5.8
5.7
4.6
ns
ns
ns
ns
ns
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
©
74LVC2G240
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
Rev. 12 — 1 June 2023
6 / 17
Nexperia
74LVC2G240
Dual inverting buffer/line driver; 3-state
Symbol Parameter
Conditions
Tamb = -40 °C to +85 °C
Tamb
=
Unit
-40 °C to +125 °C
Min
Typ [1]
Max
Min
Max
CPD
power dissipation
capacitance
per buffer; VI = GND to VCC
output enabled
[5]
-
-
18
5
-
-
-
-
-
-
pF
pF
output disabled
[1] Typical values are measured at nominal VCC and at Tamb = 25 °C.
[2] tpd is the same as tPLH and tPHL
[3] ten is the same as tPZH and tPZL
[4] tdis is the same as tPLZ and tPHZ
[5] CPD is used to determine the dynamic power dissipation (PD in μW).
PD = CPD × VCC 2 × fi × N + Σ(CL × VCC 2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ(CL × VCC 2 × fo) = sum of outputs.
11.1. Waveforms and test circuit
V
I
V
V
M
nA input
GND
M
t
t
PHL
PLH
V
OH
V
V
nY output
M
M
V
OL
mna960
Measurement points are given in Table 9.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 3. The data input (nA) to output (nY) propagation delays
V
I
nOE input
V
M
t
GND
t
PLZ
PZL
V
CC
output
LOW-to-OFF
OFF-to-LOW
V
M
V
X
V
OL
t
t
PZH
PHZ
V
OH
V
Y
output
V
HIGH-to-OFF
OFF-to-HIGH
M
GND
outputs
enabled
outputs
enabled
outputs
disabled
mna961
Measurement points are given in Table 9.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 4. 3-state enable and disable times
©
74LVC2G240
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
Rev. 12 — 1 June 2023
7 / 17
Nexperia
74LVC2G240
Dual inverting buffer/line driver; 3-state
Table 9. Measurement points
Supply voltage
Input
Output
VM
VCC
VM
VX
VY
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
0.5 × VCC
0.5 × VCC
1.5 V
0.5 × VCC
0.5 × VCC
1.5 V
VOL + 0.15 V
VOL + 0.15 V
VOL + 0.3 V
VOL + 0.3 V
VOL + 0.3 V
VOH - 0.15 V
VOH - 0.15 V
VOH - 0.3 V
VOH - 0.3 V
VOH - 0.3 V
3.0 V to 3.6 V
4.5 V to 5.5 V
1.5 V
1.5 V
0.5 × VCC
0.5 × VCC
V
EXT
V
CC
R
L
L
V
V
O
I
G
DUT
R
T
C
L
R
mna616
Test data is given in Table 10.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig. 5. Test circuit for measuring switching times
Table 10. Test data
Supply voltage
VCC
Input
VI
Load
CL
VEXT
RL
tPLH, tPHL
open
tPZH, tPHZ
GND
tPZL, tPLZ
2 × VCC
2 × VCC
6 V
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
VCC
VCC
2.7 V
2.7 V
VCC
30 pF
30 pF
50 pF
50 pF
50 pF
1 kΩ
500 Ω
500 Ω
500 Ω
500 Ω
open
GND
open
GND
3.0 V to 3.6 V
4.5 V to 5.5 V
open
GND
6 V
open
GND
2 × VCC
©
74LVC2G240
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
Rev. 12 — 1 June 2023
8 / 17
Nexperia
74LVC2G240
Dual inverting buffer/line driver; 3-state
12. Package outline
TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm
SOT505-2
D
E
A
X
c
H
v
M
y
A
E
Z
5
8
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
detail X
1
4
e
w
M
b
p
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
A
A
A
b
c
D
E
e
H
E
L
L
p
UNIT
v
w
y
Z
θ
1
2
3
p
max.
0.15
0.00
0.95
0.75
0.38
0.22
0.18
0.08
3.1
2.9
3.1
2.9
4.1
3.9
0.47
0.33
0.70
0.35
8°
0°
mm
1.1
0.65
0.5
0.2
0.13
0.1
0.25
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
02-01-16
SOT505-2
- - -
Fig. 6. Package outline SOT505-2 (TSSOP8)
©
74LVC2G240
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
Rev. 12 — 1 June 2023
9 / 17
Nexperia
74LVC2G240
Dual inverting buffer/line driver; 3-state
VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm
SOT765-1
D
E
A
X
c
y
H
E
v
A
Z
5
8
Q
A
2
A
A
(A )
3
1
pin 1 index
θ
L
p
detail X
1
4
L
e
w
b
p
0
5 mm
scale
Dimensions (mm are the original dimensions)
A
(1)
(2)
(1)
Unit
A
A
A
b
c
D
E
e
H
E
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
max.
max
mm nom
min
0.15 0.85
0.00 0.60
0.27 0.23 2.1 2.4
0.17 0.08 1.9 2.2
3.2
3.0
0.40 0.21
0.15 0.19
0.4
8°
0°
1
0.12
0.5
0.4
0.2 0.08 0.1
0.1
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
sot765-1_po
References
Outline
version
European
projection
Issue date
IEC
JEDEC
JEITA
07-06-02
16-05-31
SOT765-1
MO-187
Fig. 7. Package outline SOT765-1 (VSSOP8)
©
74LVC2G240
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
Rev. 12 — 1 June 2023
10 / 17
Nexperia
74LVC2G240
Dual inverting buffer/line driver; 3-state
XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm
SOT833-1
b
1
2
3
4
4×
(2)
L
L
1
e
8
7
6
5
e
e
e
1
1
1
8×
(2)
A
A
1
D
E
terminal 1
index area
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
A
A
1
UNIT
b
D
E
e
e
1
L
L
1
max max
0.25
0.17
2.0
1.9
1.05
0.95
0.35 0.40
0.27 0.32
mm
0.5 0.04
0.6
0.5
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
REFERENCES
JEDEC JEITA
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
07-11-14
07-12-07
SOT833-1
- - -
- - -
MO-252
Fig. 8. Package outline SOT833-1 (XSON8)
©
74LVC2G240
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Nexperia B.V. 2023. All rights reserved
Product data sheet
Rev. 12 — 1 June 2023
11 / 17
Nexperia
74LVC2G240
Dual inverting buffer/line driver; 3-state
XSON8: extremely thin small outline package; no leads;
8 terminals; body 1.35 x 1 x 0.5 mm
SOT1089
E
terminal 1
index area
D
A
A
1
detail X
(2)
(4×)
e
L
(2)
(8×)
b
4
5
e
1
1
8
terminal 1
index area
L
X
1
0
0.5
1 mm
scale
Dimensions
Unit
(1)
A
A
b
D
E
e
e
1
L
L
1
1
max 0.5 0.04 0.20 1.40 1.05
0.35 0.40
0.15 1.35 1.00 0.55 0.35 0.30 0.35
0.12 1.30 0.95 0.27 0.32
mm nom
min
Note
1. Including plating thickness.
2. Visible depending upon used manufacturing technology.
sot1089_po
Issue date
References
Outline
version
European
projection
IEC
JEDEC
MO-252
JEITA
10-04-09
10-04-12
SOT1089
Fig. 9. Package outline SOT1089 (XSON8)
©
74LVC2G240
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Nexperia B.V. 2023. All rights reserved
Product data sheet
Rev. 12 — 1 June 2023
12 / 17
Nexperia
74LVC2G240
Dual inverting buffer/line driver; 3-state
XSON8: extremely thin small outline package; no leads;
8 terminals; body 1.2 x 1.0 x 0.35 mm
SOT1116
b
4
(2)
1
2
3
(4×)
L
L
1
e
8
7
6
5
e
e
e
1
1
1
(2)
(8×)
A
1
A
D
E
terminal 1
index area
0
0.5
scale
1 mm
Dimensions
Unit
(1)
A
A
b
D
E
e
e
1
L
L
1
1
max 0.35 0.04 0.20 1.25 1.05
0.35 0.40
0.15 1.20 1.00 0.55 0.3 0.30 0.35
0.12 1.15 0.95 0.27 0.32
mm nom
min
Note
1. Including plating thickness.
2. Visible depending upon used manufacturing technology.
sot1116_po
References
Outline
version
European
Issue date
projection
IEC
JEDEC
JEITA
10-04-02
10-04-07
SOT1116
Fig. 10. Package outline SOT1116 (XSON8)
©
74LVC2G240
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Nexperia B.V. 2023. All rights reserved
Product data sheet
Rev. 12 — 1 June 2023
13 / 17
Nexperia
74LVC2G240
Dual inverting buffer/line driver; 3-state
XSON8: extremely thin small outline package; no leads;
8 terminals; body 1.35 x 1.0 x 0.35 mm
SOT1203
b
4
(2)
(4×)
1
2
3
L
L
1
e
8
7
6
5
e
e
e
1
1
1
(2)
(8×)
A
1
A
D
E
terminal 1
index area
0
L
0.5
scale
1 mm
Dimensions
Unit
(1)
A
A
b
D
E
e
e
1
L
1
1
max 0.35 0.04 0.20 1.40 1.05
0.35 0.40
0.15 1.35 1.00 0.55 0.35 0.30 0.35
0.12 1.30 0.95 0.27 0.32
mm nom
min
Note
1. Including plating thickness.
2. Visible depending upon used manufacturing technology.
sot1203_po
References
Outline
version
European
Issue date
projection
IEC
JEDEC
JEITA
10-04-02
10-04-06
SOT1203
Fig. 11. Package outline SOT1203 (XSON8)
©
74LVC2G240
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
Rev. 12 — 1 June 2023
14 / 17
Nexperia
74LVC2G240
Dual inverting buffer/line driver; 3-state
13. Abbreviations
Table 11. Abbreviations
Acronym
Description
CMOS
DUT
ESD
HBM
MM
Complementary Metal-Oxide Semiconductor
Device Under Test
ElectroStatic Discharge
Human Body Model
Machine Model
TTL
Transistor-Transistor Logic
14. Revision history
Table 12. Revision history
Document ID
Release date
20230601
Data sheet status
Change notice Supersedes
74LVC2G240 v.12
Modifications:
Product data sheet
-
74LVC2G240 v.11
•
Section 6.1 updated in line with 74LVC2G240_Q100.
74LVC2G240 v.11
Modifications:
20190730 Product data sheet
-
74LVC2G240 v.10
•
•
Type number 74LVC2G240GM (SOT902-2/XQFN8) removed.
Table 5: Derating values for Ptot total power dissipation updated.
74LVC2G240 v.10
Modifications:
20181101
Product data sheet
-
74LVC2G240 v.9
•
The format of this data sheet has been redesigned to comply with the identity guidelines
of Nexperia.
•
•
Legal texts have been adapted to the new company name where appropriate.
Type number 74LVC2G240GD (SOT996-2) removed.
74LVC2G240 v.9
Modifications:
20161215
Table 7: The maximum limits for leakage current and supply current have changed.
20130408 Product data sheet 74LVC2G240 v.7
For type number 74LVC2G240GD XSON8U has changed to XSON8.
20120622 Product data sheet 74LVC2G240 v.6
For type number 74LVC2G240GM the SOT code has changed to SOT902-2.
Product data sheet
-
74LVC2G240 v.8
•
74LVC2G240 v.8
Modifications:
-
•
74LVC2G240 v.7
Modifications:
-
•
74LVC2G240 v.6
Modifications:
20111128
Product data sheet
-
74LVC2G240 v.5
•
Legal pages updated.
74LVC2G240 v.5
74LVC2G240 v.4
74LVC2G240 v.3
74LVC2G240 v.2
74LVC2G240 v.1
20100915
20080229
20071005
20060728
20030311
Product data sheet
Product data sheet
Product data sheet
Product data sheet
Product specification
-
-
-
-
-
74LVC2G240 v.4
74LVC2G240 v.3
74LVC2G240 v.2
74LVC2G240 v.1
-
©
74LVC2G240
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Nexperia B.V. 2023. All rights reserved
Product data sheet
Rev. 12 — 1 June 2023
15 / 17
Nexperia
74LVC2G240
Dual inverting buffer/line driver; 3-state
injury, death or severe property or environmental damage. Nexperia and its
suppliers accept no liability for inclusion and/or use of Nexperia products in
such equipment or applications and therefore such inclusion and/or use is at
the customer’s own risk.
15. Legal information
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Data sheet status
Document status Product
Definition
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
[1][2]
status [3]
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability for
any assistance with applications or customer product design. It is customer’s
sole responsibility to determine whether the Nexperia product is suitable
and fit for the customer’s applications and products planned, as well as
for the planned application and use of customer’s third party customer(s).
Customers should provide appropriate design and operating safeguards to
minimize the risks associated with their applications and products.
Preliminary [short]
data sheet
Qualification
Production
This document contains data from
the preliminary specification.
Product [short]
data sheet
This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for the
customer’s applications and products using Nexperia products in order to
avoid a default of the applications and the products or of the application or
use by customer’s third party customer(s). Nexperia does not accept any
liability in this respect.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.
Definitions
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the relevant
full data sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of commercial sale — Nexperia products are
sold subject to the general terms and conditions of commercial sale, as
published at http://www.nexperia.com/profile/terms, unless otherwise agreed
in a valid written individual agreement. In case an individual agreement is
concluded only the terms and conditions of the respective agreement shall
apply. Nexperia hereby expressly objects to applying the customer’s general
terms and conditions with regard to the purchase of Nexperia products by
customer.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no responsibility
for the content in this document if provided by an information source outside
of Nexperia.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Nexperia product is automotive qualified, the
product is not suitable for automotive use. It is neither qualified nor tested in
accordance with automotive testing or application requirements. Nexperia
accepts no liability for inclusion and/or use of non-automotive qualified
products in automotive equipment or applications.
In no event shall Nexperia be liable for any indirect, incidental, punitive,
special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards,
customer (a) shall use the product without Nexperia’s warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
Nexperia’s specifications such use shall be solely at customer’s own risk,
and (c) customer fully indemnifies Nexperia for any liability, damages or failed
product claims resulting from customer design and use of the product for
automotive applications beyond Nexperia’s standard warranty and Nexperia’s
product specifications.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards customer
for the products described herein shall be limited in accordance with the
Terms and conditions of commercial sale of Nexperia.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Right to make changes — Nexperia reserves the right to make changes
to information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Trademarks
Suitability for use — Nexperia products are not designed, authorized or
warranted to be suitable for use in life support, life-critical or safety-critical
systems or equipment, nor in applications where failure or malfunction
of an Nexperia product can reasonably be expected to result in personal
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
©
74LVC2G240
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Nexperia B.V. 2023. All rights reserved
Product data sheet
Rev. 12 — 1 June 2023
16 / 17
Nexperia
74LVC2G240
Dual inverting buffer/line driver; 3-state
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Ordering information....................................................2
4. Marking..........................................................................2
5. Functional diagram.......................................................2
6. Pinning information......................................................3
6.1. Pinning.........................................................................3
6.2. Pin description.............................................................3
7. Functional description................................................. 4
8. Limiting values............................................................. 4
9. Recommended operating conditions..........................5
10. Static characteristics..................................................5
11. Dynamic characteristics.............................................6
11.1. Waveforms and test circuit........................................ 7
12. Package outline.......................................................... 9
13. Abbreviations............................................................15
14. Revision history........................................................15
15. Legal information......................................................16
© Nexperia B.V. 2023. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 1 June 2023
©
74LVC2G240
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
Rev. 12 — 1 June 2023
17 / 17
相关型号:
74LVC2G240GT-G
IC LVC/LCX/Z SERIES, DUAL 1-BIT DRIVER, INVERTED OUTPUT, PDSO8, 1 X 1.95 MM, 0.50 MM HEIGHT, PLASTIC, MO-252, SOT-833-1, SON-8, Bus Driver/Transceiver
NXP
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