74LVC08APW [NEXPERIA]
Quad 2-input AND gateProduction;型号: | 74LVC08APW |
厂家: | Nexperia |
描述: | Quad 2-input AND gateProduction 光电二极管 逻辑集成电路 |
文件: | 总12页 (文件大小:229K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
74LVC08A
Quad 2-input AND gate
Rev. 9 — 17 September 2021
Product data sheet
1. General description
The 74LVC08A is a quad 2-input AND gate. Inputs can be driven from either 3.3 V or 5 V devices.
This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications.
Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.
2. Features and benefits
•
Overvoltage tolerant inputs to 5.5 V
•
•
•
•
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low power consumption
Direct interface with TTL levels
Complies with JEDEC standard:
•
•
•
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
•
ESD protection:
•
•
•
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-B exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
•
Specified from -40 °C to +85 °C and -40 °C to +125 °C
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
Version
74LVC08AD
74LVC08APW
74LVC08ABQ
-40 °C to +125 °C
-40 °C to +125 °C
-40 °C to +125 °C
SO14
plastic small outline package; 14 leads;
body width 3.9 mm
SOT108-1
TSSOP14
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT402-1
SOT762-1
DHVQFN14 plastic dual in-line compatible thermal enhanced
very thin quad flat package; no leads; 14 terminals;
body 2.5 × 3 × 0.85 mm
Nexperia
74LVC08A
Quad 2-input AND gate
4. Functional diagram
1
2
&
&
&
&
3
6
4
5
1
2
1A
1B
3
6
1Y
2Y
4
5
2A
2B
9
8
10
9
3A
3B
3Y
8
10
A
B
12
13
12
13
4A
4B
11
4Y
11
Y
mna222
mna223
mna221
Fig. 1. Logic symbol
Fig. 2. IEC logic symbol
Fig. 3. Logic diagram for one gate
5. Pinning information
5.1. Pinning
74LVC08A
terminal 1
index area
74LVC08A
2
3
4
5
6
13
12
11
10
9
1B
4B
4A
4Y
3B
3A
1Y
2A
2B
2Y
1
2
3
4
5
6
7
14
13
12
11
10
9
1A
1B
V
CC
4B
4A
4Y
3B
3A
3Y
(1)
GND
1Y
2A
001aac946
2B
Transparent top view
2Y
(1) This is not a ground pin. There is no electrical or
mechanical requirement to solder the pad. In case
soldered, the solder land should remain floating or
connected to GND.
8
GND
001aac945
Fig. 4. Pin configuration SOT108-1 (SO14) and
SOT402-1 (TSSOP14)
Fig. 5. Pin configuration SOT762-1 (DHVQFN14)
5.2. Pin description
Table 2. Pin description
Symbol
Pin
Description
data input
1A, 2A, 3A, 4A
1B, 2B, 3B, 4B
1Y, 2Y, 3Y, 4Y
GND
1, 4, 9, 12
2, 5, 10, 13
3, 6, 8, 11
7
data input
data output
ground (0 V)
supply voltage
VCC
14
©
74LVC08A
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 9 — 17 September 2021
2 / 12
Nexperia
74LVC08A
Quad 2-input AND gate
6. Functional description
Table 3. Function selection
H = HIGH voltage level; L = LOW voltage level; X = don’t care
Input
Output
nA
L
nB
X
nY
L
X
L
L
H
H
H
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
-0.5
-50
-0.5
-
Max
+6.5
-
Unit
V
VCC
IIK
supply voltage
input clamping current
input voltage
VI < 0 V
mA
V
VI
[1]
[2]
+6.5
±50
IOK
VO
IO
output clamping current
output voltage
VO > VCC or VO < 0 V
output HIGH or LOW-state
VO = 0 V to VCC
mA
-0.5
-
VCC + 0.5 V
output current
±50
100
-
mA
ICC
IGND
Ptot
Tstg
supply current
-
mA
mA
mW
°C
ground current
-100
-
total power dissipation
storage temperature
Tamb = -40 °C to +125 °C
[3]
500
+150
-65
[1] The minimum input voltage ratings may be exceeded if the input current ratings are observed.
[2] The output voltage ratings may be exceeded if the output current ratings are observed.
[3] For SOT108-1 (SO14) package: Ptot derates linearly with 10.1 mW/K above 100 °C.
For SOT402-1 (TSSOP14) package: Ptot derates linearly with 7.3 mW/K above 81 °C.
For SOT762-1 (DHVQFN14) package: Ptot derates linearly with 9.6 mW/K above 98 °C.
8. Recommended operating conditions
Table 5. Recommended operating conditions
Symbol Parameter
Conditions
Min
Typ
Max
3.6
-
Unit
V
VCC
supply voltage
1.65
1.2
0
-
-
-
-
-
-
-
functional
V
VI
input voltage
5.5
VCC
+125
20
V
VO
output voltage
output HIGH or LOW-state
0
V
Tamb
Δt/ΔV
ambient temperature
input transition rise and fall rate
-40
0
°C
ns/V
ns/V
VCC = 1.65 V to 2.7 V
VCC = 2.7 V to 3.6 V
0
10
©
74LVC08A
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 9 — 17 September 2021
3 / 12
Nexperia
74LVC08A
Quad 2-input AND gate
9. Static characteristics
Table 6. Static characteristics
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
-40 °C to +85 °C
-40 °C to +125 °C Unit
Min
Typ [1]
Max
Min
Max
VIH
HIGH-level
input voltage
VCC = 1.2 V
1.08
-
-
-
-
-
-
-
-
-
1.08
-
V
V
V
V
V
V
V
V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VCC = 1.2 V
0.65VCC
-
0.65VCC
-
1.7
-
-
1.7
-
-
2.0
2.0
VIL
LOW-level
input voltage
-
-
-
-
0.12
0.35VCC
0.7
-
-
-
-
0.12
0.35VCC
0.7
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VI = VIH or VIL
0.8
0.8
VOH
HIGH-level
output voltage
IO = -100 μA; VCC = 1.65 V to 3.6 V VCC - 0.2
-
-
-
-
-
-
-
-
-
-
-
-
VCC - 0.3
1.05
-
-
-
-
-
-
V
V
V
V
V
V
IO = -4 mA; VCC = 1.65 V
IO = -8 mA; VCC = 2.3 V
IO = -12 mA; VCC = 2.7 V
IO = -18 mA; VCC = 3.0 V
IO = -24 mA; VCC = 3.0 V
1.2
1.8
2.2
2.4
2.2
1.65
2.05
2.25
2.0
VOL
LOW-level
VI = VIH or VIL
output voltage
IO = 100 μA; VCC = 1.65 V to 3.6 V
IO = 4 mA; VCC = 1.65 V
IO = 8 mA; VCC = 2.3 V
-
-
-
-
-
-
-
0.2
0.45
0.6
-
-
-
-
-
-
0.3
0.65
0.8
V
-
V
-
V
IO = 12 mA; VCC = 2.7 V
IO = 24 mA; VCC = 3.0 V
-
-
0.4
0.6
V
0.55
±5
0.8
V
II
input leakage VCC = 3.6 V; VI = 5.5 V or GND
current
±0.1
±20
μA
ICC
supply current VCC = 3.6 V; VI = VCC or GND; IO = 0 A
-
-
0.1
5
10
-
-
40
μA
μA
ΔICC
additional
per input pin; VCC = 2.7 V to 3.6 V;
500
5000
supply current VI = VCC - 0.6 V; IO = 0 A
CI
input
VCC = 0 V to 3.6 V; VI = GND to VCC
-
4.0
-
-
-
pF
capacitance
[1] All typical values are measured at VCC = 3.3 V (unless stated otherwise) and Tamb = 25 °C.
©
74LVC08A
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 9 — 17 September 2021
4 / 12
Nexperia
74LVC08A
Quad 2-input AND gate
10. Dynamic characteristics
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Fig. 7.
Symbol Parameter
Conditions
-40 °C to +85 °C
-40 °C to +125 °C Unit
Min
Typ [1]
Max
Min
Max
tpd
propagation delay
nA, nB to nY; see Fig. 6
VCC = 1.2 V
[2]
-
11.0
4.2
2.5
2.5
2.3
-
-
-
-
ns
ns
ns
ns
ns
ns
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
0.5
1.0
1.5
1.0
-
9.0
6.9
4.8
4.1
1.0
0.5
1.0
1.5
1.0
-
10.4
8.0
5.6
4.8
1.5
VCC = 3.0 V to 3.6 V
VCC = 3.0 V to 3.6 V
per gate; VI = GND to VCC
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
tsk(o)
CPD
output skew time
[3]
[4]
power dissipation
capacitance
-
-
-
4.4
7.7
-
-
-
-
-
-
-
-
-
pF
pF
pF
10.5
[1] Typical values are measured at Tamb = 25 °C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V, and 3.3 V respectively.
[2] tpd is the same as tPLH and tPHL
.
[3] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
[4] CPD is used to determine the dynamic power dissipation (PD in μW).
PD = CPD × VCC 2 × fi × N + Σ(CL × VCC 2 × fo) where:
fi = input frequency in MHz, fo = output frequency in MHz
CL = output load capacitance in pF
VCC = supply voltage in Volts
N = number of inputs switching
Σ(CL × VCC 2 × fo) = sum of the outputs.
10.1. Waveforms and test circuit
V
I
V
M
nA, nB input
GND
t
t
PLH
PHL
V
OH
nY output
V
M
V
OL
mna224
VM = 1.5 V at VCC ≥ 2.7 V
VM = 0.5 × VCC at VCC < 2.7 V
VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 6. The input nA, nB to output nY propagation delays
©
74LVC08A
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 9 — 17 September 2021
5 / 12
Nexperia
74LVC08A
Quad 2-input AND gate
t
W
V
I
90 %
negative
pulse
V
V
V
M
M
10 %
0 V
t
t
r
f
t
t
f
r
V
I
90 %
positive
pulse
V
M
M
10 %
0 V
t
W
V
CC
V
V
O
I
PULSE
GENERATOR
DUT
R
T
C
L
R
L
001aaf615
Test data is given in Table 8. Definitions for test circuit:
RL = Load resistance
CL = Load capacitance including jig and probe capacitance
RT = Termination resistance should be equal to output impedance Zo of the pulse generator
Fig. 7. Test circuit for measuring switching times
Table 8. Test data
Supply voltage
Input
VI
Load
CL
tr, tf
RL
1.2 V
VCC
VCC
VCC
2.7 V
2.7 V
≤ 2 ns
≤ 2 ns
≤ 2 ns
≤ 2.5 ns
≤ 2.5 ns
30 pF
30 pF
30 pF
50 pF
50 pF
1 kΩ
1 kΩ
500 Ω
500 Ω
500 Ω
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
3.0 V to 3.6 V
©
74LVC08A
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 9 — 17 September 2021
6 / 12
Nexperia
74LVC08A
Quad 2-input AND gate
11. Package outline
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
D
E
A
X
v
c
y
H
M
A
E
Z
8
14
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
7
e
detail X
w
M
b
p
0
2.5
scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
0.25
0.10
1.45
1.25
0.49
0.36
0.25
0.19
8.75
8.55
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.6
0.7
0.3
mm
1.75
1.27
0.05
1.05
0.25
0.25
0.1
0.25
0.01
8o
0o
0.010 0.057
0.004 0.049
0.019 0.0100 0.35
0.014 0.0075 0.34
0.16
0.15
0.244
0.228
0.039 0.028
0.016 0.024
0.028
0.012
inches
0.041
0.01 0.01 0.004
0.069
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT108-1
076E06
MS-012
Fig. 8. Package outline SOT108-1 (SO14)
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74LVC08A
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 9 — 17 September 2021
7 / 12
Nexperia
74LVC08A
Quad 2-input AND gate
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
D
E
A
X
c
y
H
v
M
A
E
Z
8
14
Q
(A )
3
A
2
A
A
1
pin 1 index
θ
L
p
L
1
7
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(2)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.
8o
0o
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
6.6
6.2
0.75
0.50
0.4
0.3
0.72
0.38
mm
1.1
0.65
1
0.2
0.13
0.1
0.25
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-18
SOT402-1
MO-153
Fig. 9. Package outline SOT402-1 (TSSOP14)
©
74LVC08A
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 9 — 17 September 2021
8 / 12
Nexperia
74LVC08A
Quad 2-input AND gate
DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
14 terminals; body 2.5 x 3 x 0.85 mm
SOT762-1
B
A
E
D
A
A
1
c
detail X
terminal 1
index area
C
terminal 1
index area
e
1
v
w
C
C
A B
y
y
C
1
e
b
2
6
L
1
7
8
E
h
e
14
k
13
9
D
h
X
k
0
2
4 mm
w
scale
Dimensions (mm are the original dimensions)
(1) (1)
(1)
Unit
A
A
b
c
D
D
h
E
E
e
e
k
L
v
y
y
1
1
h
1
max
nom
min
1
0.05 0.30
0.02 0.25 0.2 3.0 1.50 2.5 1.00 0.5
0.00 0.18 2.9 1.35 2.4 0.85
3.1 1.65 2.6 1.15
0.5
0.4 0.1 0.05 0.05 0.1
0.2 0.3
mm
2
Note
sot762-1_po
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
References
Outline
version
European
projection
Issue date
IEC
JEDEC
JEITA
15-04-10
15-05-05
SOT762-1
MO-241
Fig. 10. Package outline SOT762-1 (DHVQFN14)
©
74LVC08A
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 9 — 17 September 2021
9 / 12
Nexperia
74LVC08A
Quad 2-input AND gate
12. Abbreviations
Table 9. Abbreviations
Acronym
Description
CDM
CMOS
DUT
ESD
HBM
MM
Charged Device Model
Complementary Metal-Oxide Semiconductor
Device Under Test
ElectroStatic Discharge
Human Body Model
Machine Model
TTL
Transistor-Transistor Logic
13. Revision history
Table 10. Revision history
Document ID
Release date Data sheet status
20210917 Product data sheet
Change notice Supersedes
- 74LVC08A v.8
74LVC08A v.9
Modifications:
•
•
Type number 74LVC08ADB (SOT337-1/SSOP14) removed.
Section 1 updated.
74LVC08A v.8
Modifications:
20200402
Product data sheet
-
74LVC08A v.7
•
The format of this data sheet has been redesigned to comply with the identity
guidelines of Nexperia.
•
•
Legal texts have been adapted to the new company name where appropriate.
Table 4: Derating values for Ptot total power dissipation updated.
74LVC08A v.7
Modifications:
20160419
Table 2: Pin description for 1A to 4A inputs and 1Y to 4Y outputs swapped (errata).
20111216 Product data sheet 74LVC08A v.5
Product data sheet
74LVC08A v.6
•
74LVC08A v.6
Modifications:
•
The format of this document has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
•
•
Legal texts have been adapted to the new company name where appropriate.
Table 4, Table 5, Table 6, Table 7 and Table 8: values added for lower voltage ranges.
74LVC08A v.5
74LVC08A v.4
74LVC08A v.3
74LVC08A v.2
74LVC08A v.1
20030224
20021030
20020308
19970630
19970630
Product specification
Product specification
Product specification
Product specification
Product specification
-
-
-
-
-
74LVC08A v.4
74LVC08A v.3
74LVC08A v.2
74LVC08A v.1
-
©
74LVC08A
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 9 — 17 September 2021
10 / 12
Nexperia
74LVC08A
Quad 2-input AND gate
injury, death or severe property or environmental damage. Nexperia and its
suppliers accept no liability for inclusion and/or use of Nexperia products in
such equipment or applications and therefore such inclusion and/or use is at
the customer’s own risk.
14. Legal information
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Data sheet status
Document status Product
Definition
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
[1][2]
status [3]
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability for
any assistance with applications or customer product design. It is customer’s
sole responsibility to determine whether the Nexperia product is suitable
and fit for the customer’s applications and products planned, as well as
for the planned application and use of customer’s third party customer(s).
Customers should provide appropriate design and operating safeguards to
minimize the risks associated with their applications and products.
Preliminary [short]
data sheet
Qualification
Production
This document contains data from
the preliminary specification.
Product [short]
data sheet
This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for the
customer’s applications and products using Nexperia products in order to
avoid a default of the applications and the products or of the application or
use by customer’s third party customer(s). Nexperia does not accept any
liability in this respect.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.
Definitions
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the relevant
full data sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of commercial sale — Nexperia products are
sold subject to the general terms and conditions of commercial sale, as
published at http://www.nexperia.com/profile/terms, unless otherwise agreed
in a valid written individual agreement. In case an individual agreement is
concluded only the terms and conditions of the respective agreement shall
apply. Nexperia hereby expressly objects to applying the customer’s general
terms and conditions with regard to the purchase of Nexperia products by
customer.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
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Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no responsibility
for the content in this document if provided by an information source outside
of Nexperia.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Nexperia product is automotive qualified, the
product is not suitable for automotive use. It is neither qualified nor tested in
accordance with automotive testing or application requirements. Nexperia
accepts no liability for inclusion and/or use of non-automotive qualified
products in automotive equipment or applications.
In no event shall Nexperia be liable for any indirect, incidental, punitive,
special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards,
customer (a) shall use the product without Nexperia’s warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
Nexperia’s specifications such use shall be solely at customer’s own risk,
and (c) customer fully indemnifies Nexperia for any liability, damages or failed
product claims resulting from customer design and use of the product for
automotive applications beyond Nexperia’s standard warranty and Nexperia’s
product specifications.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards customer
for the products described herein shall be limited in accordance with the
Terms and conditions of commercial sale of Nexperia.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Right to make changes — Nexperia reserves the right to make changes
to information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Trademarks
Suitability for use — Nexperia products are not designed, authorized or
warranted to be suitable for use in life support, life-critical or safety-critical
systems or equipment, nor in applications where failure or malfunction
of an Nexperia product can reasonably be expected to result in personal
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
©
74LVC08A
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 9 — 17 September 2021
11 / 12
Nexperia
74LVC08A
Quad 2-input AND gate
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Ordering information....................................................1
4. Functional diagram.......................................................2
5. Pinning information......................................................2
5.1. Pinning.........................................................................2
5.2. Pin description.............................................................2
6. Functional description................................................. 3
7. Limiting values............................................................. 3
8. Recommended operating conditions..........................3
9. Static characteristics....................................................4
10. Dynamic characteristics............................................ 5
10.1. Waveforms and test circuit........................................ 5
11. Package outline.......................................................... 7
12. Abbreviations............................................................10
13. Revision history........................................................10
14. Legal information......................................................11
© Nexperia B.V. 2021. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 17 September 2021
©
74LVC08A
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 9 — 17 September 2021
12 / 12
相关型号:
74LVC08APW-Q100
LVC/LCX/Z SERIES, QUAD 2-INPUT AND GATE, PDSO14, 4.40 MM, PLASTIC, MO-153, SOT402-1, TSSOP-14
NXP
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