74HCT4520D [NEXPERIA]
Dual 4-bit synchronous binary counterProduction;型号: | 74HCT4520D |
厂家: | Nexperia |
描述: | Dual 4-bit synchronous binary counterProduction 输入元件 光电二极管 逻辑集成电路 触发器 |
文件: | 总14页 (文件大小:249K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
74HC4520; 74HCT4520
Dual 4-bit synchronous binary counter
Rev. 6 — 9 October 2020
Product data sheet
1. General description
The 74HC4520; 74HCT4520 are dual 4-bit internally synchronous binary counters with two clock
inputs (nCP0 and nCP1). They have buffered outputs from all 4 bit positions (nQ0 to nQ3) and an
asynchronous master reset input (nMR). The counter advances on the LOW-to-HIGH transition of
nCP0 when nCP1 is HIGH. It also advances on the HIGH-to-LOW transition of nCP1 when nCP0
is LOW. Either nCP0 or nCP1 may be used as the clock input to the counter. The other clock input
may be used as a clock enable input. A HIGH on nMR, resets the counter (nQ0 to nQ3 = LOW)
independent of nCP0 and nCP1. Inputs include clamp diodes. It enables the use of current limiting
resistors to interface inputs to voltages in excess of VCC
.
2. Features and benefits
•
Wide supply voltage range from 2.0 V to 6.0 V
•
•
•
•
CMOS low power dissipation
High noise immunity
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
Complies with JEDEC standards:
•
•
JESD8C (2.7 V to 3.6 V)
JESD7A (2.0 V to 6.0 V)
•
•
Input levels:
•
•
For 74HC4520: CMOS level
For 74HCT4520: TTL level
ESD protection:
•
•
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
•
Specified from -40 °C to +85 °C and -40 °C to +125 °C
3. Applications
•
•
•
Multistage synchronous counting
Multistage asynchronous counting
Frequency dividers
4. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
Version
74HC4520D
74HCT4520D
74HC4520PW
-40 °C to +125 °C
SO16
plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
-40 °C to +125 °C
TSSOP16
plastic thin shrink small outline package;
16 leads; body width 4.4 mm
SOT403-1
Nexperia
74HC4520; 74HCT4520
Dual 4-bit synchronous binary counter
5. Functional diagram
1Q0
3
4
5
6
1
2
1CP0
1CP1
1Q1
1Q2
1Q3
7
9
1MR
2Q0 11
2Q1 12
2Q2 13
2Q3 14
2CP0
10 2CP1
15 2MR
001aae698
Fig. 1. Functional diagram
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10 11 12 13 14 15 16 17 18
nCP0
nCP1
nMR
1
10 11 12 13 14 15
0
1
2
3
4
nQ0
nQ1
nQ2
nQ
3
001aae707
Fig. 2. Timing diagram
nQ0
nQ1
nQ2
nQ3
Q
Q
Q
Q
Q
Q
Q
FF1
CP
FF2
CP
FF3
CP
FF4
CP
nCP1
nCP0
Q
RD
RD
RD
RD
nMR
aaa-015608
Fig. 3. Logic diagram for one counter
©
74HC_HCT4520
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 6 — 9 October 2020
2 / 14
Nexperia
74HC4520; 74HCT4520
Dual 4-bit synchronous binary counter
6. Pinning information
6.1. Pinning
74HC4520
74HCT4520
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1CP0
1CP1
1Q0
V
CC
2MR
2Q3
74HC4520
1CP0
1CP1
1Q0
V
1
2
3
4
5
6
7
8
16
15
CC
2MR
1Q1
2Q2
14 2Q3
1Q2
2Q1
1Q1
2Q2
13
12
11
10
9
1Q2
2Q1
1Q3
2Q0
1Q3
2Q0
1MR
GND
2CP1
2CP0
1MR
GND
2CP1
2CP0
aaa-015592
aaa-015593
Fig. 4. Pin configuration SOT109-1 (SO16)
Fig. 5. Pin configuration SOT403-1 (TSSOP16)
6.2. Pin description
Table 2. Pin description
Symbol
Pin
Description
1CP0, 2CP0
1CP1, 2CP1
1Q0 to 1Q3
1MR, 2MR
GND
1, 9
clock input (LOW-to-HIGH edge-triggered)
2, 10
clock input (HIGH-to-LOW edge-triggered)
3, 4, 5, 6
output
7, 15
asynchronous master reset input (active HIGH)
8
ground (0 V)
output
2Q0 to 2Q3
VCC
11, 12, 13, 14
16
supply voltage
7. Functional description
Table 3. Function table
H = HIGH voltage level; L = LOW voltage level; X = don’t care; ↑ = positive-going transition; ↓ = negative-going transition.
nCP0
nCP1
nMR
Mode
↑
H
↓
L
L
L
L
L
L
H
counter advances
counter advances
no change
L
↓
X
↑
X
↑
no change
L
↓
no change
H
X
no change
X
nQ0 to nQ3 = LOW
©
74HC_HCT4520
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 6 — 9 October 2020
3 / 14
Nexperia
74HC4520; 74HCT4520
Dual 4-bit synchronous binary counter
8. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Max
+7.0
±20
±20
±25
50
Unit
V
VCC
IIK
supply voltage
-0.5
input clamping current
output clamping current
output current
VI < -0.5 V or VI > VCC + 0.5 V
VO < -0.5 V or VO > VCC + 0.5 V
VO = -0.5 V to VCC + 0.5 V
-
mA
mA
mA
mA
mA
°C
IOK
IO
-
-
ICC
IGND
Tstg
Ptot
supply current
-
ground current
-50
-65
-
-
storage temperature
total power dissipation
+150
500
[1]
mW
[1] For SOT109-1 (SO16) package: Ptot derates linearly with 12.4 mW/K above 110 °C.
For SOT403-1 (TSSOP16) package: Ptot derates linearly with 8.5 mW/K above 91 °C.
9. Recommended operating conditions
Table 5. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V)
Symbol Parameter
Conditions
74HC4520
74HCT4520
Unit
Min
Typ
Max
6.0
Min
Typ
Max
5.5
VCC
VI
supply voltage
2.0
5.0
4.5
5.0
V
V
V
input voltage
0
0
-
VCC
VCC
+125
625
139
83
0
0
-
VCC
VCC
VO
output voltage
-
+25
-
-
+25
-
Tamb
Δt/ΔV
ambient temperature
input transition rise and fall rate
-40
-
-40
-
+125 °C
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
-
ns/V
-
1.67
-
-
1.67
-
139 ns/V
-
-
-
ns/V
10. Static characteristics
Table 6. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
25 °C
-40 °C to
+85 °C
-40 °C to
+125 °C
Unit
Min
Typ
Max
Min
Max
Min
Max
74HC4520
VIH
HIGH-level
input voltage
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
1.5
1.2
2.4
3.2
0.8
2.1
2.8
-
-
1.5
-
-
1.5
-
-
V
V
V
V
V
V
3.15
3.15
3.15
4.2
-
4.2
-
4.2
-
VIL
LOW-level
input voltage
-
-
-
0.5
1.35
1.8
-
-
-
0.5
1.35
1.8
-
-
-
0.5
1.35
1.8
©
74HC_HCT4520
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 6 — 9 October 2020
4 / 14
Nexperia
74HC4520; 74HCT4520
Dual 4-bit synchronous binary counter
Symbol Parameter
Conditions
25 °C
Typ
-40 °C to
+85 °C
-40 °C to
+125 °C
Unit
Min
Max
Min
Max
Min
Max
VOH
HIGH-level
VI = VIH or VIL
output voltage
IO = -20 μA; VCC = 2.0 V
1.9
4.4
2.0
4.5
-
-
-
-
-
1.9
4.4
-
-
-
-
-
1.9
4.4
5.9
3.7
5.2
-
-
-
-
-
V
V
V
V
V
IO = -20 μA; VCC = 4.5 V
IO = -20 μA; VCC = 6.0 V
IO = -4.0; VCC = 4.5 V
IO = -5.2; VCC = 6.0 V
5.9
6.0
5.9
3.98
5.48
4.32
5.81
3.84
5.34
VOL
LOW-level
VI = VIH or VIL
output voltage
IO = 20 μA; VCC = 2.0 V
IO = 20 μA; VCC = 4.5 V
IO = 20 μA; VCC = 6.0 V
IO = 4.0 mA; VCC = 4.5 V
IO = 5.2 mA; VCC = 6.0 V
-
-
-
-
-
-
0
0
0.1
0.1
-
-
-
-
-
-
0.1
0.1
-
-
-
-
-
-
0.1
0.1
0.1
0.4
0.4
V
V
V
V
V
0
0.1
0.1
0.15
0.16
-
0.26
0.26
±0.1
0.33
0.33
±1.0
II
input leakage VI = VCC or GND; VCC = 6.0 V
current
±1.0 μA
ICC
CI
supply current VI = VCC or GND; IO = 0 A;
VCC = 6.0 V
-
-
-
8.0
-
-
-
80.0
-
-
-
160.0 μA
input
3.5
-
pF
capacitance
74HCT4520
VIH
HIGH-level
input voltage
VCC = 4.5 V to 5.5 V
VCC = 4.5 V to 5.5 V
2.0
-
1.6
1.2
-
2.0
-
-
2.0
-
-
V
V
VIL
LOW-level
0.8
0.8
0.8
input voltage
VOH
HIGH-level
output voltage
VI = VIH or VIL; VCC = 4.5 V
IO = -20 μA
4.4
4.5
-
-
4.4
-
-
4.4
3.7
-
-
V
V
IO = -4.0 mA
3.98
4.32
3.84
VOL
LOW-level
output voltage
VI = VIH or VIL; VCC = 4.5 V
IO = 20 μA
-
-
-
0
0.15
-
0.1
-
-
-
0.1
-
-
-
0.1
0.4
V
V
IO = 4.0 mA
0.26
±0.1
0.33
±1.0
II
input leakage VI = VCC or GND; VCC = 5.5 V
current
±1.0 μA
ICC
ΔICC
supply current VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
-
-
8.0
-
80.0
-
160.0 μA
additional
per input pin; VI = VCC - 2.1 V;
supply current other inputs at VCC or GND;
VCC = 4.5 V to 5.5 V; IO = 0 A
pin nCP0, nCP1
pin nMR
-
-
-
80
150
3.5
288
540
-
-
-
-
360
675
-
-
-
-
392 μA
735 μA
CI
input
-
pF
capacitance
©
74HC_HCT4520
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 6 — 9 October 2020
5 / 14
Nexperia
74HC4520; 74HCT4520
Dual 4-bit synchronous binary counter
11. Dynamic characteristics
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Fig. 8.
Symbol Parameter
Conditions
25 °C
-40 °C to
+85 °C
-40 °C to
+125 °C
Unit
Min
Typ Max Min Max Min Max
74HC4520
tpd
propagation nCP0 to nQn; see Fig. 6
[1]
[1]
delay
VCC = 2.0 V
-
-
-
-
77
28
24
22
240
48
-
-
-
-
-
300
60
-
-
-
-
-
360 ns
72 ns
ns
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
VCC = 6.0 V
-
41
51
61 ns
nCP1 to nQn; see Fig. 6
VCC = 2.0 V
-
-
-
-
77
28
24
22
240
48
-
-
-
-
-
300
60
-
-
-
-
-
360 ns
72 ns
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
VCC = 6.0 V
-
ns
41
51
61 ns
tPHL
HIGH to LOW nMR to nQn; see Fig. 6
propagation
delay
VCC = 2.0 V
-
-
-
-
44
16
13
13
150
30
-
-
-
-
-
190
38
-
-
-
-
-
225 ns
45 ns
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
VCC = 6.0 V
-
ns
26
33
38 ns
tt
transition
time
nQn; see Fig. 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
[2]
-
-
-
19
7
75
15
13
-
-
-
95
19
16
-
-
-
110 ns
22 ns
19 ns
6
tW
pulse width
nCP0, nCP1 HIGH or LOW;
see Fig. 7
VCC = 2.0 V
VCC = 4.5 V
80
16
14
22
8
-
-
-
100
20
-
-
-
120
24
-
-
-
ns
ns
ns
VCC = 6.0 V
6
17
20
nMR HIGH; see Fig. 7
VCC = 2.0 V
120
24
39
14
11
-
-
-
150
30
-
-
-
180
36
-
-
-
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
20
26
31
trec
recovery time nMR to nCP0, nCP1; see Fig. 7
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
0
0
0
-28
-10
-8
-
-
-
0
0
0
-
-
-
0
0
0
-
-
-
ns
ns
ns
tsu
set-up time
nCP0 to nCP1; nCP1 to nCP0;
see Fig. 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
80
16
14
14
5
-
-
-
100
20
-
-
-
120
24
-
-
-
ns
ns
ns
4
17
20
©
74HC_HCT4520
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 6 — 9 October 2020
6 / 14
Nexperia
74HC4520; 74HCT4520
Dual 4-bit synchronous binary counter
Symbol Parameter
Conditions
25 °C
-40 °C to
+85 °C
-40 °C to
+125 °C
Unit
Min
Typ Max Min Max Min Max
fmax
maximum
frequency
nCP0, nCP1; see Fig. 7
VCC = 2.0 V
6
30
-
19
58
68
69
29
-
-
-
-
-
4.8
24
-
-
-
-
-
-
4
20
-
-
-
-
-
-
MHz
MHz
MHz
MHz
pF
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
VCC = 6.0 V
35
-
28
-
24
-
CPD
power
VI = GND to VCC; VCC = 5 V;
fi = 1 MHz
[3]
dissipation
capacitance
74HCT4520
tpd
propagation nCP0 to nQn; see Fig. 6
[1]
[1]
delay
VCC = 4.5 V
-
-
28
24
53
-
-
-
66
-
-
-
80 ns
ns
VCC = 5.0 V; CL = 15 pF
nCP1 to nQn; see Fig. 6
-
VCC = 4.5 V
-
-
25
24
53
-
-
-
66
-
-
-
80 ns
ns
VCC = 5.0 V; CL = 15 pF
-
tPHL
HIGH to LOW nMR to nQn; see Fig. 6
propagation
delay
VCC = 4.5 V
-
-
16
13
35
-
-
-
44
-
-
-
53 ns
ns
VCC = 5.0 V; CL = 15 pF
-
tt
transition
time
nQn; see Fig. 6
VCC = 4.5 V
[2]
-
7
15
-
19
-
22 ns
tW
pulse width
nCP0, nCP1 HIGH or LOW;
see Fig. 7
VCC = 4.5 V
nMR HIGH; see Fig. 7
VCC = 4.5 V
20
20
0
10
12
-8
-
-
-
25
25
0
-
-
-
30
30
0
-
-
-
ns
ns
ns
trec
recovery time nMR to nCP0, nCP1; see Fig. 7
VCC = 4.5 V
tsu
set-up time
nCP0 to nCP1; nCP1 to nCP0;
see Fig. 6
VCC = 4.5 V
16
6
-
20
-
24
-
ns
fmax
maximum
frequency
nCP0, nCP1; see Fig. 7
VCC = 4.5 V
30
-
58
64
24
-
-
-
24
-
-
-
-
20
-
-
-
-
MHz
MHz
pF
VCC = 5.0 V; CL = 15 pF
CPD
power
VI = GND to VCC - 1.5 V; VCC = 5 V; [3]
fi = 1 MHz
-
-
-
dissipation
capacitance
[1] tpd is the same as tPHL and tPLH
.
[2] tt is the same as tTHL and tTLH
.
[3] CPD is used to determine the dynamic power dissipation (PD in μW):
PD = CPD × VCC 2 × fi × N + Σ(CL × VCC 2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ(CL × VCC 2 × fo) = sum of outputs.
©
74HC_HCT4520
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 6 — 9 October 2020
7 / 14
Nexperia
74HC4520; 74HCT4520
Dual 4-bit synchronous binary counter
11.1. Waveforms and test circuit
V
I
V
nCP0 input
0 V
M
V
I
nCP1 input
0 V
V
M
0 V
t
t
su
su
V
I
nMR input
0 V
V
M
t
t
t
PHL
PHL
PLH
V
OH
90 %
nQn output
V
M
10 %
V
OL
t
t
t
t
001aae702
Measurement points are given in Table 8.
The logic levels VOH and VOL are typical output voltage levels that occur with the output load.
Fig. 6. nCP0 and nCP1 set-up times, propagation delays and output transition times
1/f
max
V
I
nCP1 input
(nCP0 = LOW)
V
V
M
0 V
t
t
W
V
I
nCP0 input
(nCP1 = HIGH)
M
0 V
W
V
I
V
nMR input
0 V
M
t
W
t
rec
001aae701
Measurement points are given in Table 8.
The logic levels VOH and VOL are typical output voltage levels that occur with the output load.
Fig. 7. nMR recovery time, minimum nCP0, nCP1, nMR pulse widths and maximum frequency
Table 8. Measurement points
Type
Input
VM
Output
VM
VI
74HC4520
0.5 × VCC
1.3 V
GND to VCC
GND to 3 V
0.5 × VCC
1.3 V
74HCT4520
©
74HC_HCT4520
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 6 — 9 October 2020
8 / 14
Nexperia
74HC4520; 74HCT4520
Dual 4-bit synchronous binary counter
t
W
V
I
90 %
negative
pulse
V
V
V
M
M
10 %
0 V
t
t
r
f
t
t
f
r
V
I
90 %
positive
pulse
V
M
M
10 %
0 V
t
W
V
V
CC
CC
V
I
V
O
R
L
S1
G
open
DUT
R
T
C
L
001aad983
Test data is given in Table 9.
Test circuit definitions:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator
CL = Load capacitance including jig and probe capacitance
RL = Load resistance.
S1 = Test selection switch
Fig. 8. Test circuit for measuring switching times
Table 9. Test data
Type
Input
Load
S1 position
tPHL, tPLH
open
VI
tr, tf
6 ns
6 ns
CL
RL
74HC4520
GND to VCC
GND to 3 V
15 pF, 50 pF
15 pF, 50 pF
1 kΩ
1 kΩ
74HCT4520
open
©
74HC_HCT4520
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 6 — 9 October 2020
9 / 14
Nexperia
74HC4520; 74HCT4520
Dual 4-bit synchronous binary counter
12. Package outline
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
D
E
A
X
v
c
y
H
M
A
E
Z
16
9
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
8
e
w
M
detail X
b
p
0
2.5
scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
E
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
max.
0.25
0.10
1.45
1.25
0.49
0.36
0.25
0.19
10.0
9.8
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.6
0.7
0.3
mm
1.27
0.05
1.05
0.041
1.75
0.25
0.01
0.25
0.1
0.25
0.01
8o
0o
0.0100
0.0075
0.010 0.057
0.004 0.049
0.019
0.014
0.39
0.38
0.16
0.15
0.244
0.228
0.039 0.028
0.016 0.020
0.028
0.012
inches
0.069
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT109-1
076E07
MS-012
Fig. 9. Package outline SOT109-1 (SO16)
©
74HC_HCT4520
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 6 — 9 October 2020
10 / 14
Nexperia
74HC4520; 74HCT4520
Dual 4-bit synchronous binary counter
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
SOT403-1
D
E
A
X
c
y
H
v
M
A
E
Z
9
16
Q
(A )
3
A
2
A
A
1
pin 1 index
θ
L
p
L
1
8
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(2)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.
8o
0o
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
6.6
6.2
0.75
0.50
0.4
0.3
0.40
0.06
mm
1.1
0.65
1
0.2
0.13
0.1
0.25
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-18
SOT403-1
MO-153
Fig. 10. Package outline SOT403-1 (TSSOP16)
©
74HC_HCT4520
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 6 — 9 October 2020
11 / 14
Nexperia
74HC4520; 74HCT4520
Dual 4-bit synchronous binary counter
13. Abbreviations
Table 10. Abbreviations
Acronym
Description
CMOS
DUT
ESD
HBM
MM
Complementary Metal-Oxide Semiconductor
Device Under Test
ElectroStatic Discharge
Human Body Model
Machine Model
TTL
Transistor-Transistor Logic
14. Revision history
Table 11. Revision history
Document ID
Release date Data sheet status
Change notice Supersedes
74HC_HCT4520 v.6
Modifications:
20201009
Product data sheet
Section 2 updated.
Table 4: Derating values for Ptot total power dissipation have been updated.
Product data sheet 74HC_HCT4520 v.4
-
74HC_HCT4520 v.5
•
•
74HC_HCT4520 v.5
Modifications:
20190214
-
•
The format of this data sheet has been redesigned to comply with the identity
guidelines of Nexperia.
•
•
Legal texts have been adapted to the new company name where appropriate.
Type numbers 74HC4520DB and 74HCT4520DB (SOT338-1) removed.
74HC_HCT4520 v.4
Modifications:
20160510
Type numbers 74HC4520N and 74HCT4520N (SOT38-4) removed.
20141204 Product data sheet 74HC_HCT4520_CNV v.2
Product data sheet
-
74HC_HCT4520 v.3
•
74HC_HCT4520 v.3
Modifications:
-
•
The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
•
Legal texts have been adapted to the new company name where appropriate.
74HC_HCT4520_CNV v.2
19930927
Product specification
-
-
©
74HC_HCT4520
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 6 — 9 October 2020
12 / 14
Nexperia
74HC4520; 74HCT4520
Dual 4-bit synchronous binary counter
injury, death or severe property or environmental damage. Nexperia and its
suppliers accept no liability for inclusion and/or use of Nexperia products in
such equipment or applications and therefore such inclusion and/or use is at
the customer’s own risk.
15. Legal information
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Data sheet status
Document status Product
Definition
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
[1][2]
status [3]
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability for
any assistance with applications or customer product design. It is customer’s
sole responsibility to determine whether the Nexperia product is suitable
and fit for the customer’s applications and products planned, as well as
for the planned application and use of customer’s third party customer(s).
Customers should provide appropriate design and operating safeguards to
minimize the risks associated with their applications and products.
Preliminary [short]
data sheet
Qualification
Production
This document contains data from
the preliminary specification.
Product [short]
data sheet
This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for the
customer’s applications and products using Nexperia products in order to
avoid a default of the applications and the products or of the application or
use by customer’s third party customer(s). Nexperia does not accept any
liability in this respect.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.
Definitions
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the relevant
full data sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of commercial sale — Nexperia products are
sold subject to the general terms and conditions of commercial sale, as
published at http://www.nexperia.com/profile/terms, unless otherwise agreed
in a valid written individual agreement. In case an individual agreement is
concluded only the terms and conditions of the respective agreement shall
apply. Nexperia hereby expressly objects to applying the customer’s general
terms and conditions with regard to the purchase of Nexperia products by
customer.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no responsibility
for the content in this document if provided by an information source outside
of Nexperia.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Nexperia product is automotive qualified, the
product is not suitable for automotive use. It is neither qualified nor tested in
accordance with automotive testing or application requirements. Nexperia
accepts no liability for inclusion and/or use of non-automotive qualified
products in automotive equipment or applications.
In no event shall Nexperia be liable for any indirect, incidental, punitive,
special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards,
customer (a) shall use the product without Nexperia’s warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
Nexperia’s specifications such use shall be solely at customer’s own risk,
and (c) customer fully indemnifies Nexperia for any liability, damages or failed
product claims resulting from customer design and use of the product for
automotive applications beyond Nexperia’s standard warranty and Nexperia’s
product specifications.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards customer
for the products described herein shall be limited in accordance with the
Terms and conditions of commercial sale of Nexperia.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Right to make changes — Nexperia reserves the right to make changes
to information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Trademarks
Suitability for use — Nexperia products are not designed, authorized or
warranted to be suitable for use in life support, life-critical or safety-critical
systems or equipment, nor in applications where failure or malfunction
of an Nexperia product can reasonably be expected to result in personal
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
©
74HC_HCT4520
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 6 — 9 October 2020
13 / 14
Nexperia
74HC4520; 74HCT4520
Dual 4-bit synchronous binary counter
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Applications.................................................................. 1
4. Ordering information....................................................1
5. Functional diagram.......................................................2
6. Pinning information......................................................3
6.1. Pinning.........................................................................3
6.2. Pin description.............................................................3
7. Functional description................................................. 3
8. Limiting values............................................................. 4
9. Recommended operating conditions..........................4
10. Static characteristics..................................................4
11. Dynamic characteristics.............................................6
11.1. Waveforms and test circuit........................................ 8
12. Package outline........................................................ 10
13. Abbreviations............................................................12
14. Revision history........................................................12
15. Legal information......................................................13
© Nexperia B.V. 2020. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 9 October 2020
©
74HC_HCT4520
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 6 — 9 October 2020
14 / 14
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