74HC75PW [NEXPERIA]
Quad bistable transparant latchProduction;
| 型号： | 74HC75PW |
| 厂家： | 
Nexperia |
| 描述： | Quad bistable transparant latchProduction 光电二极管 逻辑集成电路 |
| 文件： | 总16页 (文件大小：253K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74HC75
Quad bistable transparant latch
Rev. 5 — 17 March 2021
Product data sheet
1. General description
The 74HC75 is a quad bistable transparent latch with complementary outputs. Two latches are
simultaneously controlled by one of two active HIGH enable inputs (LE12 and LE34). When LEnn
is HIGH, the data enters the latches and appears at the nQ outputs. The nQ outputs follow the data
inputs (nD) as long as LEnn is HIGH (transparent). The data on the nD inputs one set-up time prior
to the HIGH-to-LOW transition of the LEnn will be stored in the latches. The latched outputs remain
stable as long as the LEnn is LOW. Inputs include clamp diodes. This enables the use of current
limiting resistors to interface inputs to voltages in excess of VCC
.
2. Features and benefits
•
Wide supply voltage range from 2.0 V to 6.0 V
•
•
•
•
CMOS low power dissipation
High noise immunity
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
Complies with JEDEC standards:
•
•
JESD8C (2.7 V to 3.6 V)
JESD7A (2.0 V to 6.0 V)
•
•
•
•
Complementary Q and Q outputs
VCC and GND on the center pins
CMOS input levels
ESD protection:
•
•
HBM EIA/JESD22-A114F exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V
•
Specified from -40 °C to +80 °C and from -40 °C to +125 °C.
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range
-40 °C to +125 °C
Name
Description
Version
74HC75D
SO16
plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
74HC75PW
-40 °C to +125 °C
TSSOP16
plastic thin shrink small outline package;
16 leads; body width 4.4 mm
SOT403-1
Nexperia
74HC75
Quad bistable transparant latch
4. Functional diagram
13
C1
16
1
2
3
1D
13
LE12
15
14
16
1
1Q
2
1D
1Q
15
14
2Q
3
2D
2Q
4
C1
L1,2
L3,4
10
11
9
9
8
3Q
6
3D
3Q
7
6
1D
4Q
4Q
7
10
11
4D
8
LE34
4
001aab851
001aab852
Fig. 1. Logic symbol
Fig. 2. IEC logic symbol
1D
2
1Q
Q
D
16
1
LE12
13
1Q
CP
1D
D
Q
Q
Q
Q
1Q
1Q
L1
L2
L3
L4
LE12
CP
LATCH
1
2D
3
2Q
Q
D
15
14
2Q
CP
2D
D
2Q
2Q
CP
LATCH
2
3D
6
3Q
Q
D
10
11
LE34
4
3Q
CP
3D
D
3Q
3Q
LE34
CP
LATCH
4D
7
4Q
Q
3
D
9
8
4Q
CP
4D
D
4Q
4Q
CP
LATCH
4
001aab853
001aab854
Fig. 3. Functional diagram
Fig. 4. Logic diagram
©
74HC75
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 5 — 17 March 2021
2 / 16
Nexperia
74HC75
Quad bistable transparant latch
5. Pinning information
5.1. Pinning
74HC75
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1Q
1D
1Q
2Q
74HC75
2D
2Q
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1Q
1D
1Q
2Q
LE34
LE12
GND
3Q
2D
2Q
V
CC
LE34
LE12
GND
3Q
3D
V
CC
3D
4D
3Q
4D
3Q
4Q
4Q
4Q
4Q
001aab850
aaa-033311
Fig. 5. Pin configuration SOT109-1 (SO16)
Fig. 6. Pin configuration SOT403-1 (TSSOP16)
5.2. Pin description
Table 2. Pin description
Symbol
Pin
Description
1Q, 2Q, 3Q, 4Q
1D, 2D, 3D, 4D
LE34
1, 14, 11, 8
complementary latch output
data input
2, 3, 6, 7
4
latch enable input for latches 3 and 4 (active HIGH)
positive supply voltage
VCC
5
GND
12
ground (0 V)
LE12
13
latch enable input for latches 1 and 2 (active HIGH)
latch output
1Q, 2Q, 3Q, 4Q
16, 15, 10, 9
6. Function description
Table 3. Function table
H = HIGH voltage level; L = LOW voltage level; X = don’t care;
q = lower case letters indicate the state of the referenced output one set-up time prior to the HIGH-to-LOW LEnn transition.
Operating mode
Data enabled
Data latched
Input
LEnn
H
Output
nD
L
nQ
L
nQ
H
H
H
H
L
L
X
q
q
©
74HC75
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 5 — 17 March 2021
3 / 16
Nexperia
74HC75
Quad bistable transparant latch
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
VCC
IIK
Parameter
Conditions
Min
Max Unit
supply voltage
-0.5
+7.0
±20
±20
±25
50
V
input clamping current
output clamping current
output current
VI < -0.5 V or VI > VCC + 0.5 V
VO < -0.5 V or VO > VCC + 0.5 V
VO = -0.5 V to VCC + 0.5 V
[1]
[1]
-
mA
mA
mA
mA
mA
IOK
-
-
IO
ICC
supply current
-
IGND
Tstg
Ptot
ground current
-50
-65
-
-
storage temperature
total power dissipation
+150 °C
500 mW
Tamb = -40 °C to +125 °C
[2]
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SOT109-1 (SO16) package: Ptot derates linearly with 12.4 mW/K above 110 °C.
For SOT403-1 (TSSOP16) package: Ptot derates linearly with 8.5 mW/K above 91 °C.
8. Recommended operating conditions
Table 5. Recommended operating conditions
Symbol
VCC
Parameter
Conditions
Min
Typ
Max
Unit
V
supply voltage
2.0
5.0
6.0
VCC
VCC
+125
625
139
83
VI
input voltage
0
0
-
V
VO
output voltage
-
V
Tamb
Δt/ΔV
ambient temperature
input transition rise and fall rate
-40
-
-
°C
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
-
1.67
-
ns/V
ns/V
ns/V
-
-
9. Static characteristics
Table 6. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
Tamb = 25 °C
VIH
Parameter
Conditions
Min
Typ
Max Unit
HIGH-level input voltage
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
1.5
1.2
2.4
3.2
0.8
2.1
2.8
-
-
V
V
V
V
V
V
3.15
4.2
-
VIL
LOW-level input voltage
-
-
-
0.5
1.35
1.8
©
74HC75
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 5 — 17 March 2021
4 / 16
Nexperia
74HC75
Quad bistable transparant latch
Symbol
Parameter
Conditions
Min
Typ
Max Unit
VOH
HIGH-level output voltage
VI = VIH or VIL
IO = -20 μA; VCC = 2.0 V
1.9
4.4
2.0
4.5
-
-
-
-
-
V
V
V
V
V
IO = -20 μA; VCC = 4.5 V
IO = -20 μA; VCC = 6.0 V
IO = -4 mA; VCC = 4.5 V
IO = -5.2 mA; VCC = 6.0 V
5.9
6.0
3.98
5.48
4.32
5.81
VOL
LOW-level output voltage
VI = VIH or VIL
IO = 20 μA; VCC = 2.0 V
IO = 20 μA; VCC = 4.5 V
IO = 20 μA; VCC = 6.0 V
IO = 4 mA; VCC = 4.5 V
-
-
-
-
-
-
-
0
0.1
0.1
V
V
V
V
V
0
0
0.15
0.16
-
0.1
0.26
0.26
IO = 5.2 mA; VCC = 6.0 V
VI = VCC or GND; VCC = 6.0 V
II
input leakage current
supply current
±0.1 μA
8.0 μA
ICC
VI = VCC or GND; IO = 0 A;
VCC = 6.0 V
-
CI
input capacitance
-
3.5
-
pF
Tamb = -40 °C to +85 °C
VIH HIGH-level input voltage
VCC = 2.0 V
1.5
-
-
-
-
-
-
-
-
V
V
V
V
V
V
VCC = 4.5 V
3.15
VCC = 6.0 V
4.2
-
VIL
LOW-level input voltage
HIGH-level output voltage
VCC = 2.0 V
-
-
-
0.5
1.35
1.8
VCC = 4.5 V
VCC = 6.0 V
VOH
VI = VIH or VIL
IO = -20 μA; VCC = 2.0 V
IO = -20 μA; VCC = 4.5 V
IO = -20 μA; VCC = 6.0 V
IO = -4 mA; VCC = 4.5 V
IO = -5.2 mA; VCC = 6.0 V
VI = VIH or VIL
1.9
4.4
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
5.9
3.84
5.34
VOL
LOW-level output voltage
IO = 20 μA; VCC = 2.0 V
IO = 20 μA; VCC = 4.5 V
IO = 20 μA; VCC = 6.0 V
IO = 4 mA; VCC = 4.5 V
IO = 5.2 mA; VCC = 6.0 V
VI = VCC or GND; VCC = 6.0 V
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.1
0.1
V
V
V
V
V
0.1
0.33
0.33
II
input leakage current
supply current
±1.0 μA
80 μA
ICC
VI = VCC or GND; IO = 0 A;
VCC = 6.0 V
©
74HC75
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 5 — 17 March 2021
5 / 16
Nexperia
74HC75
Quad bistable transparant latch
Symbol
Parameter
Conditions
Min
Typ
Max Unit
Tamb = -40 °C to +125 °C
VIH HIGH-level input voltage
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
VI = VIH or VIL
1.5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
3.15
4.2
-
VIL
LOW-level input voltage
HIGH-level output voltage
-
-
-
0.5
1.35
1.8
VOH
IO = -20 μA; VCC = 2.0 V
1.9
4.4
5.9
3.7
5.2
-
-
-
-
-
V
V
V
V
V
IO = -20 μA; VCC = 4.5 V
IO = -20 μA; VCC = 6.0 V
IO = -4 mA; VCC = 4.5 V
IO = -5.2 mA; VCC = 6.0 V
VOL
LOW-level output voltage
VI = VIH or VIL
IO = 20 μA; VCC = 2.0 V
IO = 20 μA; VCC = 4.5 V
IO = 20 μA; VCC = 6.0 V
IO = 4 mA; VCC = 4.5 V
-
-
-
-
-
-
-
0.1
0.1
0.1
0.4
0.4
V
V
V
V
V
IO = 5.2 mA; VCC = 6.0 V
VI = VCC or GND; VCC = 6.0 V
II
input leakage current
supply current
±1.0 μA
160 μA
ICC
VI = VCC or GND; IO = 0 A;
VCC = 6.0 V
©
74HC75
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 5 — 17 March 2021
6 / 16
Nexperia
74HC75
Quad bistable transparant latch
10. Dynamic characteristics
Table 7. Dynamic characteristics
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; unless otherwise specified, for test circuit see Fig. 11.
Symbol
Tamb = 25 °C
tpd
Parameter
Conditions
Min
Typ
Max
Unit
propagation delay
nD to nQ; see Fig. 7
VCC = 2.0 V
[1]
[1]
[1]
[1]
[2]
-
-
-
-
33
12
10
11
110
22
19
-
ns
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
VCC = 5.0 V; CL = 15 pF
nD to nQ; see Fig. 8
VCC = 2.0 V
-
-
-
-
39
14
11
11
120
24
20
-
ns
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
VCC = 5.0 V; CL = 15 pF
LEnn to nQ; see Fig. 10
VCC = 2.0 V
-
-
-
-
33
12
10
11
120
24
20
-
ns
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
VCC = 5.0 V; CL = 15 pF
LEnn to nQ; see Fig. 10
VCC = 2.0 V
-
-
-
-
39
14
11
11
125
25
21
-
ns
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
VCC = 5.0 V; CL = 15 pF
nQ, nQ; see Fig. 7 and Fig. 8
VCC = 2.0 V
tt
transition time
pulse width
set-up time
hold time
-
-
-
19
7
75
15
13
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
6
tW
tsu
th
LEnn HIGH; see Fig. 10
VCC = 2.0 V
80
16
14
17
6
-
-
-
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
5
nD to LEnn; see Fig. 9
VCC = 2.0 V
60
12
10
14
5
-
-
-
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
4
nD to LEnn; see Fig. 9
VCC = 2.0 V
3
3
3
-
-8
-3
-2
42
-
-
-
-
ns
ns
ns
pF
VCC = 4.5 V
VCC = 6.0 V
CPD
power dissipation
capacitance
per latch; VI = GND to VCC
[3]
©
74HC75
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 5 — 17 March 2021
7 / 16
Nexperia
74HC75
Quad bistable transparant latch
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Tamb = -40 °C to +85 °C
tpd
propagation delay
nD to nQ; see Fig. 7
VCC = 2.0 V
[1]
[1]
[1]
[1]
[2]
-
-
-
-
-
-
140
28
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
24
nD to nQ; see Fig. 8
VCC = 2.0 V
-
-
-
-
-
-
150
30
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
26
LEnn to nQ; see Fig. 10
VCC = 2.0 V
-
-
-
-
-
-
150
30
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
26
LEnn to nQ; see Fig. 10
VCC = 2.0 V
-
-
-
-
-
-
155
31
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
26
tt
transition time
pulse width
set-up time
hold time
nQ, nQ; see Fig. 7 and Fig. 8
VCC = 2.0 V
-
-
-
-
-
-
95
19
16
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
tW
tsu
th
LEnn HIGH; see Fig. 10
VCC = 2.0 V
100
20
-
-
-
-
-
-
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
17
nD to LEnn; see Fig. 9
VCC = 2.0 V
75
15
13
-
-
-
-
-
-
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
nD to LEnn; see Fig. 9
VCC = 2.0 V
3
3
3
-
-
-
-
-
-
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
©
74HC75
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 5 — 17 March 2021
8 / 16
Nexperia
74HC75
Quad bistable transparant latch
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Tamb = -40 °C to +125 °C
tpd
propagation delay
nD to nQ; see Fig. 7
VCC = 2.0 V
[1]
[1]
[1]
[1]
[2]
-
-
-
-
-
-
165
33
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
28
nD to nQ; see Fig. 8
VCC = 2.0 V
-
-
-
-
-
-
180
36
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
31
LEnn to nQ; see Fig. 10
VCC = 2.0 V
-
-
-
-
-
-
180
36
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
31
LEnn to nQ; see Fig. 10
VCC = 2.0 V
-
-
-
-
-
-
190
38
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
32
tt
transition time
pulse width
set-up time
hold time
nQ, nQ; see Fig. 7 and Fig. 8
VCC = 2.0 V
-
-
-
-
-
-
110
22
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
19
tW
tsu
th
LEnn HIGH; see Fig. 10
VCC = 2.0 V
120
24
-
-
-
-
-
-
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
20
nD to LEnn; see Fig. 9
VCC = 2.0 V
90
18
15
-
-
-
-
-
-
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
nD to LEnn; see Fig. 9
VCC = 2.0 V
3
3
3
-
-
-
-
-
-
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
[1] tpd is the same as tPHL and tPLH
.
[2] tt is the same as tTHL and tTLH
.
[3] CPD is used to determine the dynamic power dissipation (PD in μW).
PD = CPD x VCC 2 x fi x N + Σ(CL x VCC 2 x fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ(CL x VCC 2 x fo) = sum of outputs.
©
74HC75
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 5 — 17 March 2021
9 / 16
Nexperia
74HC75
Quad bistable transparant latch
10.1. Waveforms and test circuit
nD input
V
M
t
t
PLH
PHL
nQ output
V
M
t
t
TLH
THL
001aab855
VM = 0.5 × VI
Fig. 7. Waveforms showing the data input (nD) to output (nQ) propagation delays and the output transition times
nD input
V
M
t
t
PLH
PHL
nQ output
V
M
t
t
THL
TLH
001aab856
VM = 0.5 × VI
Fig. 8. Waveforms showing the data input (nD) to output (nQ) propagation delays and the output transition times
nD input
V
M
t
h
t
h
t
t
su
su
V
LEnn input
M
nQ output
Q = D
Q = D
001aab858
The shaded areas indicate when the input is permitted to change for predictable output performance.
VM = 0.5 × VI
Fig. 9. Waveforms showing the data set-up and hold times for nD input to LEnn input
©
74HC75
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 5 — 17 March 2021
10 / 16
Nexperia
74HC75
Quad bistable transparant latch
nD input
LEnn input
V
M
t
W
t
t
PLH
PHL
V
nQ output
nQ output
M
t
t
TLH
THL
t
t
PHL
PLH
V
M
t
t
TLH
THL
001aab857
VM = 0.5 × VI
Fig. 10. Waveforms showing the latch enable input (LEnn) pulse width, the latch enable input to outputs (nQ, nQ)
propagation delays and the output transition times
V
CC
V
V
O
I
PULSE
GENERATOR
DUT
C
L
R
T
mna101
Test data is given in Table 8
Definitions for test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator
CL = Load capacitance including jig and probe capacitance
Fig. 11. Test circuit for measuring switching times
Table 8. Test data
Supply
VCC
Input
VI
Load
CL
tr, tf
6 ns
6 ns
6 ns
6 ns
2.0 V
4.5 V
6.0 V
5.0 V
VCC
VCC
VCC
VCC
50 pF
50 pF
50 pF
15 pF
©
74HC75
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 5 — 17 March 2021
11 / 16
Nexperia
74HC75
Quad bistable transparant latch
11. Package outline
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
D
E
A
X
c
y
H
v
M
A
E
Z
16
9
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
8
e
w
M
detail X
b
p
0
2.5
scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
E
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
max.
0.25
0.10
1.45
1.25
0.49
0.36
0.25
0.19
10.0
9.8
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.6
0.7
0.3
mm
1.27
0.05
1.05
0.041
1.75
0.25
0.01
0.25
0.1
0.25
0.01
8o
0o
0.0100
0.0075
0.010 0.057
0.004 0.049
0.019
0.014
0.39
0.38
0.16
0.15
0.244
0.228
0.039 0.028
0.016 0.020
0.028
0.012
inches
0.069
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT109-1
076E07
MS-012
Fig. 12. Package outline SOT109-1 (SO16)
©
74HC75
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 5 — 17 March 2021
12 / 16
Nexperia
74HC75
Quad bistable transparant latch
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
SOT403-1
D
E
A
X
c
y
H
v
M
A
E
Z
9
16
Q
(A )
3
A
2
A
A
1
pin 1 index
θ
L
p
L
1
8
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(2)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.
8o
0o
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
6.6
6.2
0.75
0.50
0.4
0.3
0.40
0.06
mm
1.1
0.65
1
0.2
0.13
0.1
0.25
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-18
SOT403-1
MO-153
Fig. 13. Package outline SOT403-1 (TSSOP16)
©
74HC75
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 5 — 17 March 2021
13 / 16
Nexperia
74HC75
Quad bistable transparant latch
12. Abbreviations
Table 9. Abbreviations
Acronym
CMOS
DUT
Abbreviation
Complementary Metal Oxide Semiconductor
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
LSTTL
MM
Low-power Schottky Transistor-Transistor Logic
Machine Model
13. Revision history
Table 10. Revision history
Document ID
74HC75 v.5
Release date
20210317
Data sheet status
Change notice
Supersedes
Product data sheet
-
74HC75 v.4
Modifications:
•
•
•
Section 2 updated.
Section 7: Derating values for Ptot total power dissipation updated.
Type number 74HC75DB (SOT338-1 / SSOP16) removed.
74HC75 v.4
20160224
Type number 74HC75N (SOT38-4) removed.
20041112 Product data sheet
Product data sheet
-
74HC75 v.3
Modifications:
•
74HC75 v.3
-
74HC_HCT75_CNV v.2
Modifications:
•
The format of this data sheet has been redesigned to comply with the current presentation
and information standard of Philips Semiconductors.
•
•
Removed type number 74HCT75.
Inserted family specification.
74HC_HCT75_CNV v.2
74HC_HCT75 v.1
19970918
19901201
Product specification
Product specification
-
-
74HC_HCT75 v.1
-
©
74HC75
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 5 — 17 March 2021
14 / 16
Nexperia
74HC75
Quad bistable transparant latch
injury, death or severe property or environmental damage. Nexperia and its
suppliers accept no liability for inclusion and/or use of Nexperia products in
such equipment or applications and therefore such inclusion and/or use is at
the customer’s own risk.
14. Legal information
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Data sheet status
Document status Product
Definition
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
[1][2]
status [3]
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability for
any assistance with applications or customer product design. It is customer’s
sole responsibility to determine whether the Nexperia product is suitable
and fit for the customer’s applications and products planned, as well as
for the planned application and use of customer’s third party customer(s).
Customers should provide appropriate design and operating safeguards to
minimize the risks associated with their applications and products.
Preliminary [short]
data sheet
Qualification
Production
This document contains data from
the preliminary specification.
Product [short]
data sheet
This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for the
customer’s applications and products using Nexperia products in order to
avoid a default of the applications and the products or of the application or
use by customer’s third party customer(s). Nexperia does not accept any
liability in this respect.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.
Definitions
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the relevant
full data sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of commercial sale — Nexperia products are
sold subject to the general terms and conditions of commercial sale, as
published at http://www.nexperia.com/profile/terms, unless otherwise agreed
in a valid written individual agreement. In case an individual agreement is
concluded only the terms and conditions of the respective agreement shall
apply. Nexperia hereby expressly objects to applying the customer’s general
terms and conditions with regard to the purchase of Nexperia products by
customer.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no responsibility
for the content in this document if provided by an information source outside
of Nexperia.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Nexperia product is automotive qualified, the
product is not suitable for automotive use. It is neither qualified nor tested in
accordance with automotive testing or application requirements. Nexperia
accepts no liability for inclusion and/or use of non-automotive qualified
products in automotive equipment or applications.
In no event shall Nexperia be liable for any indirect, incidental, punitive,
special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards,
customer (a) shall use the product without Nexperia’s warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
Nexperia’s specifications such use shall be solely at customer’s own risk,
and (c) customer fully indemnifies Nexperia for any liability, damages or failed
product claims resulting from customer design and use of the product for
automotive applications beyond Nexperia’s standard warranty and Nexperia’s
product specifications.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards customer
for the products described herein shall be limited in accordance with the
Terms and conditions of commercial sale of Nexperia.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Right to make changes — Nexperia reserves the right to make changes
to information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Trademarks
Suitability for use — Nexperia products are not designed, authorized or
warranted to be suitable for use in life support, life-critical or safety-critical
systems or equipment, nor in applications where failure or malfunction
of an Nexperia product can reasonably be expected to result in personal
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
©
74HC75
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 5 — 17 March 2021
15 / 16
Nexperia
74HC75
Quad bistable transparant latch
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Ordering information....................................................1
4. Functional diagram.......................................................2
5. Pinning information......................................................3
5.1. Pinning.........................................................................3
5.2. Pin description.............................................................3
6. Function description.................................................... 3
7. Limiting values............................................................. 4
8. Recommended operating conditions..........................4
9. Static characteristics....................................................4
10. Dynamic characteristics............................................ 7
10.1. Waveforms and test circuit...................................... 10
11. Package outline........................................................ 12
12. Abbreviations............................................................14
13. Revision history........................................................14
14. Legal information......................................................15
© Nexperia B.V. 2021. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 17 March 2021
©
74HC75
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 5 — 17 March 2021
16 / 16
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