74HC4094PW [NEXPERIA]
8-stage shift-and-store bus registerProduction;型号: | 74HC4094PW |
厂家: | Nexperia |
描述: | 8-stage shift-and-store bus registerProduction 光电二极管 输出元件 逻辑集成电路 触发器 |
文件: | 总19页 (文件大小:295K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
74HC4094; 74HCT4094
8-stage shift-and-store bus register
Rev. 9 — 22 October 2021
Product data sheet
1. General description
The 74HC4094; 74HCT4094 is an 8-bit serial-in/serial or parallel-out shift register with a storage
register and 3-state outputs. Both the shift and storage register have separate clocks. The device
features a serial input (D) and two serial outputs (QS1 and QS2) to enable cascading. Data is
shifted on the LOW-to-HIGH transitions of the CP input. Data is available at QS1 on the LOW-to-
HIGH transitions of the CP input to allow cascading when clock edges are fast. The same data
is available at QS2 on the next HIGH-to-LOW transition of the CP input to allow cascading when
clock edges are slow. The data in the shift register is transferred to the storage register when the
STR input is HIGH. Data in the storage register appears at the outputs whenever the output enable
input (OE) is HIGH. A LOW on OE causes the outputs to assume a high-impedance OFF-state.
Operation of the OE input does not affect the state of the registers. Inputs include clamp diodes.
This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC
.
2. Features and benefits
•
•
Complies with JEDEC standard JESD7A
Input levels:
For 74HC4094: CMOS level
For 74HCT4094: TTL level
•
•
•
•
•
Low-power dissipation
ESD protection:
•
•
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
•
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
3. Applications
•
•
Serial-to-parallel data conversion
Remote control holding register
4. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
Version
74HC4094D
-40 °C to +125 °C
SO16
plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
74HCT4094D
74HCT4094DB
-40 °C to +125 °C
-40 °C to +125 °C
SSOP16
plastic shrink small outline package; 16 leads;
body width 5.3 mm
SOT338-1
SOT403-1
74HC4094PW
74HCT4094PW
TSSOP16 plastic thin shrink small outline package;
16 leads; body width 4.4 mm
Nexperia
74HC4094; 74HCT4094
8-stage shift-and-store bus register
5. Functional diagram
3
1
1
C2
15
EN3
CP
STR
QS1
9
SRG8
C1/
3
2
QS2
QP0
QP1
10
4
4
1D
2D
3
5
5
6
QP2
QP3
QP4
QP5
QP6
QP7
6
2
D
7
7
14
13
12
11
9
14
13
12
11
OE
15
10
001aaf111
001aaf112
Fig. 1. Logic symbol
Fig. 2. IEC Logic symbol
D
2
8-STAGE SHIFT
REGISTER
QS2
QS1
10
9
CP
3
STR
OE
8-BIT STORAGE
REGISTER
1
15
3-STATE OUTPUTS
QP0 QP1 QP2 QP3 QP4 QP5 QP6 QP7
4
5
6
7
14
13
12
11
001aaf119
Fig. 3. Functional diagram
STAGE 0
STAGES 1 TO 6
STAGE 7
D
D
Q
D
Q
D
Q
QS1
QS2
CP
CP
D
Q
FF 0
FF 7
CP
CP
LE
LATCH
D
Q
D
Q
LE
LE
LATCH 0
LATCH 7
STR
OE
001aag799
QP0
QP2
QP4
QP6
QP1
QP3
QP5
QP7
Fig. 4. Logic diagram
©
74HC_HCT4094
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 9 — 22 October 2021
2 / 19
Nexperia
74HC4094; 74HCT4094
8-stage shift-and-store bus register
6. Pinning information
6.1. Pinning
74HC4094
74HCT4094
74HC4094
74HCT4094
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
STR
D
V
CC
OE
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
STR
D
V
CC
CP
QP4
QP5
QP6
QP7
QS2
QS1
OE
CP
QP4
QP5
QP6
QP7
QS2
QS1
QP0
QP1
QP2
QP3
GND
QP0
QP1
QP2
QP3
GND
001aan578
001aan577
Fig. 6. Pin configuration SOT338-1 (SSOP16) and
SOT403-1 (TSSOP16)
Fig. 5. Pin configuration SOT109-1 (SO16)
6.2. Pin description
Table 2. Pin description
Symbol
STR
Pin
1
Description
strobe input
data input
D
2
CP
3
clock input
QP0 to QP7
GND
4, 5, 6, 7, 14, 13, 12, 11
parallel output
8
ground supply voltage
serial output
QS1, QS2
OE
9, 10
15
output enable input
supply voltage
VCC
16
©
74HC_HCT4094
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 9 — 22 October 2021
3 / 19
Nexperia
74HC4094; 74HCT4094
8-stage shift-and-store bus register
7. Functional description
Table 3. Function table
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = HIGH-impedance OFF-state; NC = no change;
↑ = positive-going transition; ↓ = negative-going transition;
Q6S = the data in register stage 6 before the LOW to HIGH clock transition;
Q7S = the data in register stage 7 before the HIGH to LOW clock transition.
Inputs
Parallel outputs
Serial outputs
CP
↑
OE
L
STR
X
D
X
X
X
L
QP0
Z
QPn
QS1
Q6S
NC
QS2
NC
Z
↓
L
X
Z
Z
Q7S
NC
↑
H
H
H
H
L
NC
L
NC
Q6S
Q6S
Q6S
NC
↑
H
QPn -1
QPn -1
NC
NC
↑
H
H
H
H
NC
↓
H
NC
Q7S
CLOCK INPUT
DATA INPUT
STROBE INPUT
OUTPUT ENABLE INPUT
INTERNAL Q0S (FF 0)
OUTPUT QP0
Z-state
INTERNAL Q6S (FF 6)
OUTPUT QP6
Z-state
SERIAL OUTPUT QS1
SERIAL OUTPUT QS2
001aaf117
At the positive clock edge, the information in the 7th register stage is transferred to the 8th register stage and the
QSn outputs.
Fig. 7. Timing diagram
©
74HC_HCT4094
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 9 — 22 October 2021
4 / 19
Nexperia
74HC4094; 74HCT4094
8-stage shift-and-store bus register
8. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
VCC
IIK
Parameter
Conditions
Min
Max Unit
supply voltage
-0.5
+7
V
input clamping current
output clamping current
output current
VI < -0.5 V or VI > VCC + 0.5 V
VO < -0.5 V or VO > VCC + 0.5 V
VO = -0.5 V to (VCC + 0.5 V)
-
±20
±20
±25
mA
mA
mA
IOK
-
IO
-
ICC
supply current
-
-
+50 mA
-50 mA
+150 °C
500 mW
IGND
Tstg
Ptot
ground current
storage temperature
total power dissipation
-65
-
[1]
[1] For SOT109-1 (SO16) package: Ptot derates linearly with 12.4 mW/K above 110 °C.
For SOT338-1 (SSOP16) package: Ptot derates linearly with 8.5 mW/K above 91 °C.
For SOT403-1 (TSSOP16) package: Ptot derates linearly with 8.5 mW/K above 91 °C.
9. Recommended operating conditions
Table 5. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V)
Symbol Parameter
Conditions
74HC4094
74HCT4094
Unit
Min
Typ
Max
6.0
Min
Typ
Max
5.5
VCC
VI
supply voltage
input voltage
2.0
5.0
4.5
5.0
V
V
V
0
0
-
VCC
VCC
+125
625
139
83
0
0
-
VCC
VCC
VO
output voltage
ambient temperature
-
+25
-
-
+25
-
Tamb
Δt/ΔV
-40
-
-40
-
+125 °C
input transition rise and fall rate VCC = 2.0 V
-
ns/V
VCC = 4.5 V
VCC = 6.0 V
-
1.67
-
-
1.67
-
139 ns/V
-
-
-
ns/V
©
74HC_HCT4094
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 9 — 22 October 2021
5 / 19
Nexperia
74HC4094; 74HCT4094
8-stage shift-and-store bus register
10. Static characteristics
Table 6. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
25 °C
-40 °C to +85 °C -40 °C to +125 °C Unit
Min Typ Max
Min
Max
Min
Max
74HC4094
VIH
HIGH-level
input voltage
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
VI = VIH or VIL
1.5
1.2
-
-
1.5
-
-
1.5
-
-
V
V
V
V
V
V
3.15 2.4
3.15
3.15
4.2
3.2
0.8
-
4.2
-
4.2
-
VIL
LOW-level
input voltage
-
-
-
0.5
-
-
-
0.5
1.35
1.8
-
-
-
0.5
1.35
1.8
2.1 1.35
2.8
1.8
VOH
HIGH-level
output voltage
IO = -20 μA; VCC = 2.0 V
1.9
4.4
5.9
2.0
4.5
6.0
-
-
-
-
-
1.9
4.4
-
-
-
-
-
1.9
4.4
5.9
3.7
5.2
-
-
-
-
-
V
V
V
V
V
IO = -20 μA; VCC = 4.5 V
IO = -20 μA; VCC = 6.0 V
5.9
IO = -4.0 mA; VCC = 4.5 V 3.98 4.32
IO = -5.2 mA; VCC = 6.0 V 5.48 5.81
3.84
5.34
VOL
LOW-level
output voltage
VI = VIH or VIL
IO = 20 μA; VCC = 2.0 V
-
-
-
-
-
-
0
0
0
0.1
0.1
0.1
-
-
-
-
-
-
0.1
0.1
-
-
-
-
-
-
0.1
0.1
0.1
0.4
0.4
V
V
V
V
V
IO = 20 μA; VCC = 4.5 V
IO = 20 μA; VCC = 6.0 V
0.1
IO = 4.0 mA; VCC = 4.5 V
IO = 5.2 mA; VCC = 6.0 V
VI = VCC or GND; VCC = 6.0 V
0.15 0.26
0.16 0.26
0.33
0.33
±1.0
II
input leakage
current
-
±0.1
±1.0 μA
IOZ
OFF-state
VI = VIH or VIL;
-
-
±0.5
-
±5.0
-
±10.0 μA
output current VO = VCC or GND;
VCC = 6.0 V
ICC
CI
supply current VI = VCC or GND; IO = 0 A;
VCC = 6.0 V
-
-
-
8.0
-
-
-
80
-
-
-
160
-
μA
pF
input
3.5
capacitance
©
74HC_HCT4094
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 9 — 22 October 2021
6 / 19
Nexperia
74HC4094; 74HCT4094
8-stage shift-and-store bus register
Symbol Parameter
74HCT4094
Conditions
25 °C
-40 °C to +85 °C -40 °C to +125 °C Unit
Min Typ Max
Min
Max
Min
Max
VIH
HIGH-level
input voltage
VCC = 4.5 V to 5.5 V
VCC = 4.5 V to 5.5 V
2.0
-
1.6
1.2
-
2.0
-
-
2.0
-
-
V
V
VIL
LOW-level
0.8
0.8
0.8
input voltage
VOH
HIGH-level
output voltage
VI = VIH or VIL; VCC = 4.5 V
IO = -20 μA
4.4
4.5
-
-
4.4
-
-
4.4
3.7
-
-
V
V
IO = -4.0 mA
3.98 4.32
3.84
VOL
LOW-level
output voltage
VI = VIH or VIL; VCC = 4.5 V
IO = 20 μA
-
-
-
0
0.1
-
-
-
0.1
-
-
-
0.1
0.4
V
V
IO = 4.0 mA
0.15 0.26
0.33
±1.0
II
input leakage
current
VI = VCC or GND; VCC = 5.5 V
-
±0.1
±1.0 μA
IOZ
OFF-state
output current VO = VCC or GND;
VCC = 5.5 V
VI = VIH or VIL;
-
-
-
±0.5
-
-
±5.0
80
-
-
±10
160
μA
μA
ICC
supply current VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
-
8.0
ΔICC
additional
VI = VCC - 2.1 V;
supply current other inputs at VCC or GND;
VCC = 4.5 V to 5.5 V; IO = 0 A
per input pin; STR input
per input pin; OE input
per input pin; CP input
per input pin; D input
-
-
-
-
-
100 360
150 540
150 540
-
-
-
-
-
450
675
675
180
-
-
-
-
-
-
490
735
735
196
-
μA
μA
μA
μA
pF
40
144
-
CI
input
3.5
capacitance
©
74HC_HCT4094
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 9 — 22 October 2021
7 / 19
Nexperia
74HC4094; 74HCT4094
8-stage shift-and-store bus register
11. Dynamic characteristics
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Fig. 12.
Symbol Parameter Conditions
74HC4094
25 °C
-40 °C to +85 °C -40 °C to +125 °C Unit
Min Typ Max
Min
Max
Min
Max
tpd
propagation CP to QS1; see Fig. 8
[1]
[1]
[1]
[1]
delay
VCC = 2.0 V
VCC = 4.5 V
-
-
-
-
50
18
15
14
150
30
-
-
-
-
-
190
38
-
-
-
-
-
225
45
-
ns
ns
ns
ns
VCC = 5 V; CL = 15 pF
VCC = 6.0 V
26
33
38
CP to QS2; see Fig. 8
VCC = 2.0 V
-
-
-
-
44
16
13
13
135
27
-
-
-
-
-
170
34
-
-
-
-
-
205
41
-
ns
ns
ns
ns
VCC = 4.5 V
VCC = 5 V; CL = 15 pF
VCC = 6.0 V
23
29
35
CP to QPn; see Fig. 8
VCC = 2.0 V
-
-
-
-
63
23
20
18
195
39
-
-
-
-
-
245
49
-
-
-
-
-
295
59
-
ns
ns
ns
ns
VCC = 4.5 V
VCC = 5 V; CL = 15 pF
VCC = 6.0 V
33
42
50
STR to QPn; see Fig. 9
VCC = 2.0 V
-
-
-
-
58
21
18
17
180
36
-
-
-
-
-
225
45
-
-
-
-
-
270
54
-
ns
ns
ns
ns
VCC = 4.5 V
VCC = 5 V; CL = 15 pF
VCC = 6.0 V
31
38
46
ten
tdis
tt
enable time OE to QPn; see Fig. 10
VCC = 2.0 V
[1]
[1]
[1]
-
-
-
55
20
16
175
35
-
-
-
220
44
-
-
-
265
53
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
30
37
45
disable time OE to QPn; see Fig. 10
VCC = 2.0 V
-
-
-
41
15
12
125
25
-
-
-
155
31
-
-
-
190
38
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
21
26
32
transition
time
QPn and QSn; see Fig. 8
VCC = 2.0 V
-
-
-
19
7
75
15
13
-
-
-
95
19
16
-
-
-
110
22
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
6
19
©
74HC_HCT4094
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 9 — 22 October 2021
8 / 19
Nexperia
74HC4094; 74HCT4094
8-stage shift-and-store bus register
Symbol Parameter Conditions
25 °C
-40 °C to +85 °C -40 °C to +125 °C Unit
Min Typ Max
Min
Max
Min
Max
tW
pulse width CP HIGH or LOW;
see Fig. 8
VCC = 2.0 V
VCC = 4.5 V
80
16
14
14
5
-
-
-
100
20
-
-
-
120
24
-
-
-
ns
ns
ns
VCC = 6.0 V
4
17
20
STR HIGH; see Fig. 9
VCC = 2.0 V
80
16
14
14
5
-
-
-
100
20
-
-
-
120
24
-
-
-
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
4
17
20
tsu
set-up time D to CP; see Fig. 11
VCC = 2.0 V
50
10
9
14
5
-
-
-
65
13
11
-
-
-
75
15
13
-
-
-
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
4
CP to STR; see Fig. 9
VCC = 2.0 V
100
20
28
10
8
-
-
-
125
25
-
-
-
150
30
-
-
-
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
17
21
26
th
hold time
D to CP; see Fig. 11
VCC = 2.0 V
3
3
3
-6
-2
-2
-
-
-
3
3
3
-
-
-
3
3
3
-
-
-
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
CP to STR; see Fig. 9
VCC = 2.0 V
0
0
0
-14
-5
-
-
-
0
0
0
-
-
-
0
0
0
-
-
-
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
-4
fmax
maximum
frequency
CP; see Fig. 8
VCC = 2.0 V
6.0
30
-
28
87
-
-
-
-
-
4.8
24
-
-
-
-
-
-
4.0
20
-
-
-
-
-
-
MHz
MHz
MHz
MHz
pF
VCC = 4.5 V
VCC = 5 V; CL = 15 pF
VCC = 6.0 V
95
35
-
103
83
28
-
24
-
CPD
power
CL = 50 pF; f = 1 MHz;
VI = GND to VCC
[2]
dissipation
capacitance
©
74HC_HCT4094
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 9 — 22 October 2021
9 / 19
Nexperia
74HC4094; 74HCT4094
8-stage shift-and-store bus register
Symbol Parameter Conditions
74HCT4094
25 °C
-40 °C to +85 °C -40 °C to +125 °C Unit
Min Typ Max
Min
Max
Min
Max
tpd
propagation CP to QS1; see Fig. 8
[1]
[1]
[1]
[1]
delay
VCC = 4.5 V
-
-
23
19
39
-
-
-
49
-
-
-
59
-
ns
ns
VCC = 5 V; CL = 15 pF
CP to QS2; see Fig. 8
VCC = 4.5 V
-
-
21
18
36
-
-
-
45
-
-
-
54
-
ns
ns
VCC = 5 V; CL = 15 pF
CP to QPn; see Fig. 8
VCC = 4.5 V
-
-
25
21
43
-
-
-
54
-
-
-
65
-
ns
ns
VCC = 5 V; CL = 15 pF
STR to QPn; see Fig. 9
VCC = 4.5 V
-
-
22
19
39
-
-
-
49
-
-
-
59
-
ns
ns
VCC = 5 V; CL = 15 pF
ten
tdis
tt
enable time OE to QPn; see Fig. 10
VCC = 4.5 V
[1]
[1]
[1]
-
-
-
20
21
7
35
35
15
-
-
-
44
44
19
-
-
-
53
53
22
ns
ns
ns
disable time OE to QPn; see Fig. 10
VCC = 4.5 V
transition
time
QPn and QSn; see Fig. 8
VCC = 4.5 V
tW
pulse width CP HIGH or LOW;
see Fig. 8
VCC = 4.5 V
STR HIGH; see Fig. 9
VCC = 4.5 V
16
16
10
20
4
7
5
-
-
-
-
-
-
20
20
13
25
4
-
-
-
-
-
-
24
24
15
30
4
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
tsu
set-up time Dn to CP; see Fig. 11
VCC = 4.5 V
4
CP to STR; see Fig. 9
VCC = 4.5 V
9
th
hold time
Dn to CP; see Fig. 11
VCC = 4.5 V
0
CP to STR; see Fig. 9
VCC = 4.5 V
0
-4
0
0
fmax
maximum
frequency
CP; see Fig. 8
VCC = 4.5 V
30
-
80
86
92
-
-
-
24
-
-
-
-
20
-
-
-
-
MHz
MHz
pF
VCC = 5 V; CL = 15 pF
CPD
power
CL = 50 pF; f = 1 MHz;
VI = GND to VCC - 1.5 V
[2]
-
-
-
dissipation
capacitance
[1] tpd is the same as tPLH and tPHL; ten is the same as tPZH and tPZL; tdis is the same as tPLZ and tPHZ; tt is the same as tTHL and tTLH
.
[2] CPD is used to determine the dynamic power dissipation (PD in μW).
PD = CPD x VCC 2 x fi x N + ∑(CL x VCC 2 x fo) where:
fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF;
VCC = supply voltage in V; N = number of inputs switching; ∑(CL x VCC 2 x fo) = sum of outputs.
©
74HC_HCT4094
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 9 — 22 October 2021
10 / 19
Nexperia
74HC4094; 74HCT4094
8-stage shift-and-store bus register
11.1. Waveforms and test circuits
1/f
max
V
I
CP input
QPn, QS1 output
QS2 output
V
M
GND
t
W
t
t
PHL
PLH
V
OH
90 %
10 %
V
M
V
OL
t
t
THL
TLH
t
t
PHL
PLH
V
OH
V
M
V
OL
aaa-003132
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig. 8. Propagation delay input (CP) to output (QPn, QS1, QS2), output transition time, clock input (CP) pulse
width and the maximum frequency (CP)
V
I
CP input
STR input
QPn output
V
M
GND
t
t
h
su
M
V
I
V
GND
t
W
t
t
PHL
PLH
V
OH
V
M
V
OL
001aaf114
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig. 9. Propagation delay strobe input (STR) to output (QPn), strobe input (STR) pulse width and the clock set-up
and hold times for strobe input
©
74HC_HCT4094
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 9 — 22 October 2021
11 / 19
Nexperia
74HC4094; 74HCT4094
8-stage shift-and-store bus register
V
I
V
M
OE input
GND
t
PZL
t
PLZ
V
CC
output
V
M
LOW-to-OFF
OFF-to-LOW
V
X
V
OL
t
t
PHZ
PZH
V
OH
V
Y
output
HIGH-to-OFF
OFF-to-HIGH
V
M
GND
outputs
enabled
outputs
enabled
outputs
disabled
001aaf116
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig. 10. Enable and disable times
V
I
V
CP input
M
GND
t
t
su
su
t
t
h
h
V
I
V
D input
M
GND
V
OH
V
QPn, QS1, QS2 output
M
V
OL
001aaf115
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig. 11. The data input (D) to clock input (CP) set-up times and clock input (CP) to data input (D) hold times
Table 8. Measurement points
Type
Input
VM
Output
VM
VX
VY
74HC4094
0.5VCC
1.3 V
0.5VCC
1.3 V
0.1VOH
0.1VOH
0.9VOH
0.9VOH
74HCT4094
©
74HC_HCT4094
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 9 — 22 October 2021
12 / 19
Nexperia
74HC4094; 74HCT4094
8-stage shift-and-store bus register
t
W
V
I
90 %
negative
pulse
V
V
V
M
M
10 %
0 V
t
t
r
f
t
t
f
r
V
I
90 %
positive
pulse
V
M
M
10 %
0 V
t
W
V
V
CC
CC
V
I
V
O
R
L
S1
G
open
DUT
R
T
C
L
001aad983
Test data is given in Table 9.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
S1 = Test selection switch.
Fig. 12. Test circuit for measuring switching times
Table 9. Test data
Type
Input
VI
Load
CL
S1 position
tPHL, tPLH
open
tr, tf
6 ns
6 ns
RL
tPZH, tPHZ
GND
tPZL, tPLZ
VCC
74HC4094
VCC
3 V
15 pF, 50 pF 1 kΩ
15 pF, 50 pF 1 kΩ
74HCT4094
open
GND
VCC
©
74HC_HCT4094
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 9 — 22 October 2021
13 / 19
Nexperia
74HC4094; 74HCT4094
8-stage shift-and-store bus register
12. Package outline
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
D
E
A
X
v
c
y
H
M
A
E
Z
16
9
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
8
e
w
M
detail X
b
p
0
2.5
scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
E
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
max.
0.25
0.10
1.45
1.25
0.49
0.36
0.25
0.19
10.0
9.8
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.6
0.7
0.3
mm
1.27
0.05
1.05
0.041
1.75
0.25
0.01
0.25
0.1
0.25
0.01
8o
0o
0.0100
0.0075
0.010 0.057
0.004 0.049
0.019
0.014
0.39
0.38
0.16
0.15
0.244
0.228
0.039 0.028
0.016 0.020
0.028
0.012
inches
0.069
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT109-1
076E07
MS-012
Fig. 13. Package outline SOT109-1 (SO16)
©
74HC_HCT4094
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 9 — 22 October 2021
14 / 19
Nexperia
74HC4094; 74HCT4094
8-stage shift-and-store bus register
SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm
SOT338-1
D
E
A
X
c
y
H
E
v
M
A
Z
9
16
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
8
1
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
p
p
1
2
3
E
max.
8o
0o
0.21
0.05
1.80
1.65
0.38
0.25
0.20
0.09
6.4
6.0
5.4
5.2
7.9
7.6
1.03
0.63
0.9
0.7
1.00
0.55
mm
2
0.2
0.13
0.1
0.25
0.65
1.25
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT338-1
MO-150
Fig. 14. Package outline SOT338-1 (SSOP16)
©
74HC_HCT4094
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 9 — 22 October 2021
15 / 19
Nexperia
74HC4094; 74HCT4094
8-stage shift-and-store bus register
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
SOT403-1
D
E
A
X
c
y
H
v
M
A
E
Z
9
16
Q
(A )
3
A
2
A
A
1
pin 1 index
θ
L
p
L
1
8
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(2)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.
8o
0o
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
6.6
6.2
0.75
0.50
0.4
0.3
0.40
0.06
mm
1.1
0.65
1
0.2
0.13
0.1
0.25
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-18
SOT403-1
MO-153
Fig. 15. Package outline SOT403-1 (TSSOP16)
©
74HC_HCT4094
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 9 — 22 October 2021
16 / 19
Nexperia
74HC4094; 74HCT4094
8-stage shift-and-store bus register
13. Abbreviations
Table 10. Abbreviations
Acronym
CMOS
DUT
Description
Complementary Metal Oxide Semiconductor
Device Under Test
ESD
ElectroStatic Discharge
Human Body Model
HBM
MM
Machine Model
TTL
Transistor-Transistor Logic
14. Revision history
Table 11. Revision history
Document ID
Release date Data sheet status
20211022 Product data sheet
Change notice
Supersedes
74HC_HCT4094 v.9
Modifications:
-
74HC_HCT4094 v.8
•
•
•
Type number 74HCT4094PW (SOT403-1/TSSOP16) added.
Type number 74HC4094DB (SOT338-1/SSOP16) removed.
Section 8: Derating values for Ptot total power dissipation updated.
74HC_HCT4094 v.8
Modifications:
20181114
Product data sheet 74HC_HCT4094 v.7
-
•
The format of this data sheet has been redesigned to comply with the identity guidelines of
Nexperia.
•
•
Legal texts have been adapted to the new company name where appropriate.
Fig. 7 corrected.
74HC_HCT4094 v.7
Modifications:
20160210
Product data sheet
-
74HC_HCT4094 v.6
•
Type numbers 74HC4094N and 74HCT4094N (SOT38-4) removed.
74HC_HCT4094 v.6
Modifications:
20121231
General description updated.
20120628 Product data sheet
Product data sheet
-
-
74HC_HCT4094 v.5
74HC_HCT4094 v.4
74HC_HCT4094 v.3
•
74HC_HCT4094 v.5
Modifications:
•
VX and VY measurement points added to Table 8.
74HC_HCT4094 v.4
Modifications:
20111219
Product data sheet
-
•
Legal pages updated.
74HC_HCT4094 v.3
20110214
Product data sheet
Product specification
-
-
74HC_HCT4094_CNV v.2
-
74HC_HCT4094_CNV v.2 19970901
©
74HC_HCT4094
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 9 — 22 October 2021
17 / 19
Nexperia
74HC4094; 74HCT4094
8-stage shift-and-store bus register
injury, death or severe property or environmental damage. Nexperia and its
suppliers accept no liability for inclusion and/or use of Nexperia products in
such equipment or applications and therefore such inclusion and/or use is at
the customer’s own risk.
15. Legal information
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Data sheet status
Document status Product
Definition
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
[1][2]
status [3]
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability for
any assistance with applications or customer product design. It is customer’s
sole responsibility to determine whether the Nexperia product is suitable
and fit for the customer’s applications and products planned, as well as
for the planned application and use of customer’s third party customer(s).
Customers should provide appropriate design and operating safeguards to
minimize the risks associated with their applications and products.
Preliminary [short]
data sheet
Qualification
Production
This document contains data from
the preliminary specification.
Product [short]
data sheet
This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for the
customer’s applications and products using Nexperia products in order to
avoid a default of the applications and the products or of the application or
use by customer’s third party customer(s). Nexperia does not accept any
liability in this respect.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.
Definitions
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the relevant
full data sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of commercial sale — Nexperia products are
sold subject to the general terms and conditions of commercial sale, as
published at http://www.nexperia.com/profile/terms, unless otherwise agreed
in a valid written individual agreement. In case an individual agreement is
concluded only the terms and conditions of the respective agreement shall
apply. Nexperia hereby expressly objects to applying the customer’s general
terms and conditions with regard to the purchase of Nexperia products by
customer.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no responsibility
for the content in this document if provided by an information source outside
of Nexperia.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Nexperia product is automotive qualified, the
product is not suitable for automotive use. It is neither qualified nor tested in
accordance with automotive testing or application requirements. Nexperia
accepts no liability for inclusion and/or use of non-automotive qualified
products in automotive equipment or applications.
In no event shall Nexperia be liable for any indirect, incidental, punitive,
special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards,
customer (a) shall use the product without Nexperia’s warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
Nexperia’s specifications such use shall be solely at customer’s own risk,
and (c) customer fully indemnifies Nexperia for any liability, damages or failed
product claims resulting from customer design and use of the product for
automotive applications beyond Nexperia’s standard warranty and Nexperia’s
product specifications.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards customer
for the products described herein shall be limited in accordance with the
Terms and conditions of commercial sale of Nexperia.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Right to make changes — Nexperia reserves the right to make changes
to information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Trademarks
Suitability for use — Nexperia products are not designed, authorized or
warranted to be suitable for use in life support, life-critical or safety-critical
systems or equipment, nor in applications where failure or malfunction
of an Nexperia product can reasonably be expected to result in personal
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
©
74HC_HCT4094
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 9 — 22 October 2021
18 / 19
Nexperia
74HC4094; 74HCT4094
8-stage shift-and-store bus register
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Applications.................................................................. 1
4. Ordering information....................................................1
5. Functional diagram.......................................................2
6. Pinning information......................................................3
6.1. Pinning.........................................................................3
6.2. Pin description.............................................................3
7. Functional description................................................. 4
8. Limiting values............................................................. 5
9. Recommended operating conditions..........................5
10. Static characteristics..................................................6
11. Dynamic characteristics.............................................8
11.1. Waveforms and test circuits.....................................11
12. Package outline........................................................ 14
13. Abbreviations............................................................17
14. Revision history........................................................17
15. Legal information......................................................18
© Nexperia B.V. 2021. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 22 October 2021
©
74HC_HCT4094
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 9 — 22 October 2021
19 / 19
相关型号:
74HC4094PW-T
IC HC/UH SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16, 4.40 MM, PLASTIC, MO-153, SOT403-1, TSSOP-16, Shift Register
NXP
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