74CBTLV3384DK [NEXPERIA]
10-bit bus switch with 5-bit output enables;
| 型号： | 74CBTLV3384DK |
| 厂家： | 
Nexperia |
| 描述： | 10-bit bus switch with 5-bit output enables 驱动 光电二极管 逻辑集成电路 |
| 文件： | 总19页 (文件大小：857K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74CBTLV3384
10-bit bus switch with 5-bit output enables
Rev. 3 — 11 November 2016
Product data sheet
1. General description
The 74CBTLV3384 is a dual 5-pole, single-throw bus switch. The device features two
output enable inputs (nOE) that each control five switch channels. The switches are
disabled when the associated nOE input is HIGH. Schmitt-trigger action at control inputs
makes the circuit tolerant of slower input rise and fall times. This device is fully specified
for partial power-down applications using IOFF. The IOFF circuitry disables the output,
preventing the damaging backflow current through the device when it is powered down.
2. Features and benefits
Supply voltage range from 2.3 V to 3.6 V
High noise immunity
Complies with JEDEC standard:
JESD8-5 (2.3 V to 2.7 V)
JESD8-B/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
CDM AEC-Q100-011 revision B exceeds 1000 V
5 switch connection between two ports
Rail to rail switching on data I/O ports
CMOS low power consumption
Latch-up performance exceeds 250 mA per JESD78B Class I level A
IOFF circuitry provides partial Power-down mode operation
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C
74CBTLV3384
Nexperia
10-bit bus switch with 5-bit output enables
3. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature
range
Name
Description
Version
74CBTLV3384DK 40 C to +125 C SSOP24[1]
74CBTLV3384PW 40 C to +125 C TSSOP24
plastic shrink small outline package; 24 leads;
body width 3.9 mm; lead pitch 0.635 mm
SOT556-1
SOT355-1
plastic thin shrink small outline package; 24 leads;
body width 4.4 mm
74CBTLV3384BQ 40 C to +125 C DHVQFN24 plastic dual in-line compatible thermal enhanced very SOT815-1
thin quad flat package; no leads; 24 terminals;
body 3.5 5.5 0.85 mm
[1] Also known as QSOP24 package
4. Functional diagram
ꢁ$ꢁ
ꢃ
ꢁ$ꢀ
ꢂ
ꢁ$ꢃ
ꢄ
ꢁ$ꢂ
ꢅ
ꢁ$ꢆ
ꢁꢁ
ꢁ
ꢁ2(
ꢀ
ꢆ
ꢇ
ꢈ
ꢁꢉ
ꢁ%ꢆ
ꢁ%ꢁ
ꢁ%ꢀ
ꢁ%ꢃ
ꢁ%ꢂ
ꢀ$ꢁ
ꢀ$ꢀ
ꢀ$ꢃ
ꢀ$ꢂ
ꢀ$ꢆ
ꢀꢀ
ꢁꢂ
ꢁꢄ
ꢁꢅ
ꢀꢁ
ꢁꢃ
ꢀ2(
ꢁꢆ
ꢀ%ꢁ
ꢁꢇ
ꢀ%ꢀ
ꢁꢈ
ꢀ%ꢃ
ꢀꢉ
ꢀ%ꢂ
ꢀꢃ
ꢀ%ꢆ
ꢀꢀꢁDDPꢀꢂꢃ
Fig 1. Logic symbol
Q$Q
Q%Q
Q2(
ꢀꢀꢁDDLꢀꢂꢂ
Fig 2. Logic diagram (one switch)
74CBTLV3384
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 3 — 11 November 2016
2 of 19
74CBTLV3384
Nexperia
10-bit bus switch with 5-bit output enables
5. Pinning information
5.1 Pinning
ꢀꢁ&%7/9ꢂꢂꢃꢁ
ꢀꢁ&%7/9ꢂꢂꢃꢁ
ꢁ
ꢀ
ꢀꢂ
ꢀꢃ
ꢀꢀ
ꢀꢁ
ꢀꢉ
ꢁꢈ
ꢁꢅ
ꢁꢄ
ꢁꢇ
ꢁꢆ
ꢁꢂ
ꢁꢃ
ꢀꢂ
ꢀꢃ
ꢀꢀ
ꢀꢁ
ꢀꢉ
ꢁꢈ
ꢁꢅ
ꢁꢄ
ꢁꢇ
ꢁꢆ
ꢁꢂ
ꢁꢃ
ꢁ2(
ꢁ%ꢁ
ꢁ$ꢁ
ꢁ$ꢀ
ꢁ%ꢀ
ꢁ%ꢃ
ꢁ$ꢃ
ꢁ$ꢂ
ꢁ%ꢂ
ꢁ%ꢆ
ꢁ$ꢆ
*1'
9
ꢁ2(
ꢁ%ꢁ
ꢁ$ꢁ
ꢁ$ꢀ
ꢁ%ꢀ
ꢁ%ꢃ
ꢁ$ꢃ
ꢁ$ꢂ
ꢁ%ꢂ
ꢁ%ꢆ
ꢁ$ꢆ
*1'
ꢁ
ꢀ
9
&&
&&
ꢀ%ꢆ
ꢀ$ꢆ
ꢀ$ꢂ
ꢀ%ꢂ
ꢀ%ꢃ
ꢀ$ꢃ
ꢀ$ꢀ
ꢀ%ꢀ
ꢀ%ꢁ
ꢀ$ꢁ
ꢀ2(
ꢀ%ꢆ
ꢀ$ꢆ
ꢀ$ꢂ
ꢀ%ꢂ
ꢀ%ꢃ
ꢀ$ꢃ
ꢀ$ꢀ
ꢀ%ꢀ
ꢀ%ꢁ
ꢀ$ꢁ
ꢀ2(
ꢃ
ꢃ
ꢂ
ꢂ
ꢆ
ꢆ
ꢇ
ꢇ
ꢄ
ꢄ
ꢅ
ꢅ
ꢈ
ꢈ
ꢁꢉ
ꢁꢁ
ꢁꢀ
ꢁꢉ
ꢁꢁ
ꢁꢀ
ꢀꢀꢁDDPꢀꢂꢄ
ꢀꢀꢁDDPꢀꢂꢅ
Fig 3. Pin configuration for TSSOP24 (SOT355-1)
Fig 4. Pin configuration for SSOP24 (SOT556-1)
ꢀꢁ&%7/9ꢂꢂꢃꢁ
WHUPLQDOꢊꢁꢊ
LQGH[ꢊDUHD
ꢀ
ꢃ
ꢀꢃ
ꢀꢀ
ꢀꢁ
ꢀꢉ
ꢁꢈ
ꢁꢅ
ꢁꢄ
ꢁꢇ
ꢁꢆ
ꢁꢂ
ꢁ%ꢁ
ꢁ$ꢁ
ꢁ$ꢀ
ꢁ%ꢀ
ꢁ%ꢃ
ꢁ$ꢃ
ꢁ$ꢂ
ꢁ%ꢂ
ꢁ%ꢆ
ꢁ$ꢆ
ꢀ%ꢆ
ꢀ$ꢆ
ꢀ$ꢂ
ꢀ%ꢂ
ꢀ%ꢃ
ꢀ$ꢃ
ꢀ$ꢀ
ꢀ%ꢀ
ꢀ%ꢁ
ꢀ$ꢁ
ꢂ
ꢆ
ꢇ
ꢄ
ꢅ
ꢈ
ꢋꢁꢌ
ꢁꢉ
ꢁꢁ
*1'
ꢀꢀꢁDDPꢀꢂꢆ
7UDQVSDUHQWꢊWRSꢊYLHZ
(1) This is not a supply pin. The substrate is attached to this pad using conductive die attach material. There is no electrical or
mechanical requirement to solder this pad. However, if it is soldered, the solder land should remain floating or be connected to
GND.
Fig 5. Pin configuration for DHVQFN24 (SOT815-1)
74CBTLV3384
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 3 — 11 November 2016
3 of 19
74CBTLV3384
Nexperia
10-bit bus switch with 5-bit output enables
5.2 Pin description
Table 2.
Symbol
1OE, 2OE
1A1 to 1A5
2A1 to 2A5
1B1 to 1B5
2B1 to 2B5
GND
Pin description
Pin
Description
1, 13
output enable input (active LOW)
data input/output (A port)
data input/output (A port)
data input/output (B port)
data input/output (B port)
ground (0 V)
3, 4, 7, 8, 11
14, 17, 18, 21, 22
2, 5, 6, 9, 10
15, 16, 19, 20, 23
12
VCC
24
positive supply voltage
6. Functional description
Table 3.
Function selection[1]
Input
Input/output
1OE
L
2OE
1An, 1Bn
2An, 2Bn
L
1An = 1Bn
2An = 2Bn
L
H
L
1An = 1Bn
Z
H
Z
Z
2An = 2Bn
Z
H
H
[1] H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state.
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
VCC
VI
Parameter
Conditions
Min
0.5
0.5
0.5
50
50
-
Max
+4.6
+4.6
VCC + 0.5
-
Unit
V
supply voltage
[1]
[1]
input voltage
V
VSW
IIK
switch voltage
enable and disable mode
VI < 0.5 V
V
input clamping current
switch clamping current
switch current
mA
mA
mA
mA
mA
C
ISK
VI < 0.5 V
-
ISW
VSW = 0 V to VCC
128
+100
-
ICC
supply current
-
IGND
Tstg
Ptot
ground current
100
65
-
storage temperature
total power dissipation
+150
500
[2]
Tamb = 40 C to +125 C
mW
[1] The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SSOP24 and TSSOP24 packages: Ptot derates linearly with 5.5 mW/K above 60 C.
For DHVQFN24 package: Ptot derates linearly at 4.5 mW/K above 60 C.
74CBTLV3384
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 3 — 11 November 2016
4 of 19
74CBTLV3384
Nexperia
10-bit bus switch with 5-bit output enables
8. Recommended operating conditions
Table 5.
Symbol
VCC
Recommended operating conditions
Parameter
Conditions
Min
2.3
0
Max Unit
supply voltage
input voltage
3.6
3.6
V
V
V
VI
VSW
switch voltage
ambient temperature
enable and disable mode
0
VCC
Tamb
40
-
+125 C
200 ns/V
[1]
t/V
input transition rise and fall rate VCC = 2.3 V to 3.6 V
[1] Applies to control signal levels.
9. Static characteristics
Table 6.
Static characteristics
At recommended operating conditions voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Tamb = 40 C to +85 C Tamb = 40 C to +125 C Unit
Min
1.7
2.0
-
Typ[1]
Max
-
Min
1.7
2.0
-
Max
-
VIH
VIL
HIGH-level
input voltage
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
-
-
-
-
-
V
-
-
V
LOW-levelinput VCC = 2.3 V to 2.7 V
voltage
0.7
0.9
1
0.7
0.9
20
V
VCC = 3.0 V to 3.6 V
-
-
V
II
input leakage
current
pin nOE; VI = GND to VCC
VCC = 3.6 V
;
-
-
A
IS(OFF)
IS(ON)
IOFF
ICC
OFF-state
leakage current
VCC = 3.6 V; see Figure 6
VCC = 3.6 V; see Figure 7
VI or VO = 0 V to 3.6 V;
-
-
-
-
-
-
-
-
1
1
-
-
-
-
20
20
50
50
A
A
A
A
ON-state
leakage current
power-off
leakage current VCC = 0 V
10
10
supply current VI = GND or VCC; IO = 0 A;
VSW = GND or VCC
VCC = 3.6 V
;
[2]
ICC
additional
supply current
pin nOE; VI = VCC 0.6 V;
SW = GND or VCC
VCC = 3.6 V
-
-
300
-
2000
A
V
;
CI
input
capacitance
pin nOE; VCC = 3.3 V;
VI = 0 V to 3.3 V
-
-
-
0.9
5.2
-
-
-
-
-
-
-
-
-
pF
pF
pF
CS(OFF) OFF-state
capacitance
VCC = 3.3 V; VI = 0 V to 3.3 V
CS(ON)
ON-state
VCC = 3.3 V; VI = 0 V to 3.3 V
14.3
capacitance
[1] All typical values are measured at Tamb = 25 C.
[2] One input at 3 V, other inputs at VCC or GND.
74CBTLV3384
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 3 — 11 November 2016
5 of 19
74CBTLV3384
Nexperia
10-bit bus switch with 5-bit output enables
9.1 Test circuits
9
9
&&
&&
Q2(
Q%Q
Q2(
Q$Q
9
9
,/
,+
,
,
,
V
V
V
Q$Q
Q%Q
$
$
$
*1'
*1'
9
O
9
2
9
O
9
2
ꢀꢀꢁDDPꢀꢇꢈ
ꢀꢀꢁDDPꢀꢇꢇ
VI = VCC or GND and VO = GND or VCC
.
VI = VCC or GND and VO = open circuit.
Fig 6. Test circuit for measuring OFF-state leakage
current (one switch)
Fig 7. Test circuit for measuring ON-state leakage
current (one switch)
9.2 ON resistance
Table 7.
Resistance RON
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8.
Symbol Parameter Conditions Tamb = 40 C to +85 C Tamb = 40 C to +125 C Unit
Min
Typ[1]
Max
Min
Max
[2]
RON
ON resistance VCC = 2.3 V to 2.7 V;
see Figure 9 to Figure 11
ISW = 64 mA; VI = 0 V
ISW = 24 mA; VI = 0 V
ISW = 15 mA; VI = 1.7 V
-
-
-
4.2
4.2
8.4
8.0
8.0
40
-
-
-
15.0
15.0
60.0
VCC = 3.0 V to 3.6 V;
see Figure 12 to Figure 14
ISW = 64 mA; VI = 0 V
ISW = 24 mA; VI = 0 V
ISW = 15 mA; VI = 2.4 V
-
-
-
4.0
4.0
6.2
7.0
7.0
15
-
-
-
11.0
11.0
25.5
[1] Typical values are measured at Tamb = 25 C and nominal VCC
.
[2] Measured by the voltage drop between the A and B terminals at the indicated current through the switch. ON-state resistance is
determined by the lower of the voltages of the two (A or B) terminals.
74CBTLV3384
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 3 — 11 November 2016
6 of 19
74CBTLV3384
Nexperia
10-bit bus switch with 5-bit output enables
9.3 ON resistance test circuit and graphs
ꢀꢀꢁDDLꢁꢀꢂ
ꢁꢁ
5
ꢊ
21
ꢋȍꢌ
ꢈ
9
6:
9
ꢄ
ꢆ
ꢃ
9
&&
ꢋꢁꢌ
ꢋꢀꢌ
Q2(
Q$Q
9
,/
Q%Q
ꢋꢃꢌ
ꢋꢂꢌ
*1'
9
O
,
6:
ꢉ
ꢉꢍꢆ
ꢁꢍꢉ
ꢁꢍꢆ
ꢀꢍꢉ
ꢀꢍꢆ
9 ꢊꢋ9ꢌ
,
ꢀꢀꢁDDPꢀꢇꢉ
RON = VSW / ISW
.
(1) Tamb = 125 C.
(2) Tamb = 85 C.
(3)
Tamb = 25 C.
(4) Tamb = 40 C.
Fig 8. Test circuit for measuring ON resistance
(one switch)
Fig 9. ON resistance as a function of input voltage;
VCC = 2.5 V; ISW = 15 mA
ꢀꢀꢁDDLꢁꢁꢀ
ꢀꢀꢁDDLꢁꢁꢁ
ꢁꢁ
ꢁꢁ
5
ꢊ
5
ꢊ
21
21
ꢋȍꢌ
ꢋȍꢌ
ꢈ
ꢈ
ꢄ
ꢆ
ꢃ
ꢄ
ꢆ
ꢃ
ꢋꢁꢌ
ꢋꢀꢌ
ꢋꢁꢌ
ꢋꢀꢌ
ꢋꢃꢌ
ꢋꢂꢌ
ꢋꢃꢌ
ꢋꢂꢌ
ꢉ
ꢉꢍꢆ
ꢁꢍꢉ
ꢁꢍꢆ
ꢀꢍꢉ
ꢀꢍꢆ
ꢉ
ꢉꢍꢆ
ꢁꢍꢉ
ꢁꢍꢆ
ꢀꢍꢉ
ꢀꢍꢆ
9 ꢊꢋ9ꢌ
,
9 ꢊꢋ9ꢌ
,
(1) Tamb = 125 C.
(2) Tamb = 85 C.
(1) Tamb = 125 C.
(2) Tamb = 85 C.
(3)
Tamb = 25 C.
(3)
Tamb = 25 C.
(4) Tamb = 40 C.
(4) Tamb = 40 C.
Fig 10. ON resistance as a function of input voltage;
VCC = 2.5 V; ISW = 24 mA
Fig 11. ON resistance as a function of input voltage;
VCC = 2.5 V; ISW = 64 mA
74CBTLV3384
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 3 — 11 November 2016
7 of 19
74CBTLV3384
Nexperia
10-bit bus switch with 5-bit output enables
ꢀꢀꢁDDLꢁꢀꢃ
ꢀꢀꢁDDLꢁꢀꢄ
ꢅ
ꢅ
5
ꢊ
5
ꢊ
21
21
ꢋȍꢌ
ꢋȍꢌ
ꢇ
ꢇ
ꢂ
ꢀ
ꢋꢁꢌ
ꢋꢀꢌ
ꢋꢁꢌ
ꢋꢀꢌ
ꢋꢃꢌ
ꢋꢂꢌ
ꢋꢃꢌ
ꢋꢂꢌ
ꢂ
ꢀ
ꢉ
ꢁ
ꢀ
ꢃ
ꢂ
ꢉ
ꢁ
ꢀ
ꢃ
ꢂ
9 ꢊꢋ9ꢌ
,
9 ꢊꢋ9ꢌ
,
(1) Tamb = 125 C.
(2) amb = 85 C.
(1) Tamb = 125 C.
(2) amb = 85 C.
T
T
(3) Tamb = 25 C.
(4) Tamb = 40 C.
(3) Tamb = 25 C.
(4) Tamb = 40 C.
Fig 12. ON resistance as a function of input voltage;
VCC = 3.3 V; ISW = 15 mA
Fig 13. ON resistance as a function of input voltage;
VCC = 3.3 V; ISW = 24 mA
ꢀꢀꢁDDLꢁꢀꢅ
ꢄꢍꢆ
5
ꢊ
21
ꢋȍꢌ
ꢇꢍꢆ
ꢆꢍꢆ
ꢂꢍꢆ
ꢃꢍꢆ
ꢀꢍꢆ
ꢋꢁꢌ
ꢋꢀꢌ
ꢋꢃꢌ
ꢋꢂꢌ
ꢉ
ꢁ
ꢀ
ꢃ
ꢂ
9 ꢊꢋ9ꢌ
,
(1) Tamb = 125 C.
(2) Tamb = 85 C.
(3)
Tamb = 25 C.
(4) Tamb = 40 C.
Fig 14. ON resistance as a function of input voltage; VCC = 3.3 V; ISW = 64 mA
74CBTLV3384
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 3 — 11 November 2016
8 of 19
74CBTLV3384
Nexperia
10-bit bus switch with 5-bit output enables
10. Dynamic characteristics
Table 8.
Dynamic characteristics
GND = 0 V; for test circuit see Figure 17
Symbol Parameter Conditions
Tamb = 40 C to +85 C Tamb = 40 C to +125 C Unit
Min
Typ[1]
Max
Min
Max
[2][3]
tpd
ten
tdis
propagation delay nAn to nBn or nBn to
nAn; see Figure 15
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
-
-
-
-
0.13
0.20
-
-
0.20
0.31
ns
ns
[4]
enable time
disable time
nOE to nAn or nBn;
see Figure 16
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
1.0
1.0
3.0
2.6
5.0
4.3
1.0
1.0
7.0
6.0
ns
ns
[5]
nOE to nAn or nBn;
see Figure 16
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
1.0
1.0
2.6
3.2
5.5
5.5
1.0
1.0
7.5
7.5
ns
ns
[1] All typical values are measured at Tamb = 25 C and at nominal VCC
.
[2] The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the load capacitance, when
driven by an ideal voltage source (zero output impedance).
[3]
t
pd is the same as tPLH and tPHL
.
[4] ten is the same as tPZH and tPZL
.
[5] tdis is the same as tPHZ and tPLZ
.
11. Waveforms
9
,
9
9
0
LQSXW
ꢉꢊ9
0
W
W
3/+
3+/
9
2+
9
9
0
RXWSXW
0
9
2/
ꢀꢀꢁDDLꢇꢄꢅ
Measurement points are given in Table 9.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig 15. The data input (nAn, nBn) to output (nBn, nAn) propagation delay times
Table 9.
Measurement points
Supply voltage
VCC
Input
VM
Output
VM
VI
tr = tf
VX
VY
2.3 V to 2.7 V
3.0 V to 3.6 V
0.5VCC
0.5VCC
VCC
VCC
2.0 ns
2.0 ns
0.5VCC
0.5VCC
VOL + 0.15 V
VOL + 0.3 V
VOH 0.15 V
VOH 0.3 V
74CBTLV3384
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 3 — 11 November 2016
9 of 19
74CBTLV3384
Nexperia
10-bit bus switch with 5-bit output enables
9
,
9
9
0
Q2(ꢊLQSXW
0
*1'
W
W
3=/
3/=
9
&&
RXWSXWꢊ
9
/2:ꢊWRꢊ2))ꢊ
2))ꢊWRꢊ/2:
0
9
;
9
2/
W
W
3=+
3+=
9
2+
9
<
RXWSXWꢊ
9
+,*+ꢊWRꢊ2))ꢊ
2))ꢊWRꢊ+,*+
0
*1'
RXWSXWVꢊ
HQDEOHG
RXWSXWVꢊ
GLVDEOHG
RXWSXWVꢊ
HQDEOHG
ꢀꢀꢁDDQꢇꢀꢅ
Measurement points are given in Table 9.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig 16. Enable and disable times
74CBTLV3384
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 3 — 11 November 2016
10 of 19
74CBTLV3384
Nexperia
10-bit bus switch with 5-bit output enables
W
:
9
,
ꢈꢉꢊꢎ
QHJDWLYHꢊ
SXOVH
9
9
9
0
0
0
ꢁꢉꢊꢎ
ꢉꢊ9
W
W
U
I
W
W
I
U
9
,
ꢈꢉꢊꢎ
SRVLWLYHꢊ
SXOVH
9
0
ꢁꢉꢊꢎ
ꢉꢊ9
W
:
9
(;7
5
9
&&
/
9
9
2
,
*
'87
5
7
&
/
5
/
ꢀꢀꢁDDHꢇꢇꢁ
Test data is given in Table 10.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig 17. Test circuit for measuring switching times
Table 10. Test data
Supply voltage
VCC
Load
CL
VEXT
RL
tPLH, tPHL
open
tPZH, tPHZ
GND
tPZL, tPLZ
2VCC
2.3 V to 2.7 V
3.0 V to 3.6 V
30 pF
50 pF
500
500
open
GND
2VCC
74CBTLV3384
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 3 — 11 November 2016
11 of 19
74CBTLV3384
Nexperia
10-bit bus switch with 5-bit output enables
11.1 Additional dynamic characteristics
Table 11. Additional dynamic characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); VI = GND or VCC (unless otherwise
specified); tr = tf 2.5 ns.
Symbol Parameter
Conditions
Tamb = 25 C
Typ
Unit
Min
Max
[1]
f(3dB)
3 dB frequency response VCC = 3.3 V; RL = 50 ; see Figure 18
-
406
-
MHz
[1] fi is biased at 0.5VCC
.
11.2 Test circuits
9
ꢉꢍꢆꢊ9
&&
&&
Q2(
Q%Q
9
,/
5
/
Q$Q
*1'
I
G%
L
DDDꢏꢉꢉꢉꢉꢀꢅ
nOE connected to GND; Adjust fi voltage to obtain 0 dBm level at output. Increase fi frequency until dB meter reads 3 dB.
Fig 18. Test circuit for measuring the frequency response when channel is in ON-state
74CBTLV3384
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 3 — 11 November 2016
12 of 19
74CBTLV3384
Nexperia
10-bit bus switch with 5-bit output enables
12. Package outline
6623ꢆꢁꢉꢄSODVWLFꢄVKULQNꢄVPDOOꢄRXWOLQHꢄSDFNDJHꢊꢄꢆꢁꢄOHDGVꢊꢄERG\ꢄZLGWKꢄꢂꢋꢌꢄPPꢊꢄOHDGꢄSLWFKꢄꢍꢋꢎꢂꢏꢄPPꢄ
627ꢏꢏꢎꢐꢅꢄ
'ꢊ
(ꢊ
$ꢊ
;ꢊ
Fꢊ
\ꢊ
+ꢊ
(ꢊ
Yꢊ 0ꢊ
$ꢊ
=ꢊ
ꢀꢂꢊ
ꢁꢃꢊ
$ꢊ
ꢀꢊ
$ꢊ
ꢋ$ꢊꢊꢌꢊ
ꢃꢊ
$ꢊ
ꢁꢊ
șꢊ
/ꢊ
Sꢊ
/ꢊ
ꢁꢀꢊ
ꢁꢊ
GHWDLOꢊ;ꢊ
Zꢊ 0ꢊ
Hꢊ
Eꢊ
Sꢊ
ꢉꢊ
ꢀꢍꢆꢊ
ꢆꢊPPꢊ
VFDOHꢊ
',0(16,216ꢄꢇPLOOLPHWUHꢄGLPHQVLRQVꢄDUHꢄGHULYHGꢄIURPꢄWKHꢄRULJLQDOꢄLQFKꢄGLPHQVLRQVꢈꢄ
$ꢄ
ꢇꢅꢈꢄ
ꢇꢅꢈꢄ
ꢇꢅꢈꢄ
81,7ꢄ
$
$
$
E
Fꢄ
'
(
Hꢄ
+
/ꢄ
ꢁꢊ
/
Yꢄ
Zꢄ
\ꢄ
ꢉꢍꢁꢊ
=
șꢊ
ꢅꢄ
ꢆꢄ
ꢂꢄ
Sꢄ
(ꢄ
Sꢄ
PD[ꢋꢄ
Rꢊ
ꢅꢊ
ꢉꢍꢀꢆꢊ ꢁꢍꢆꢆꢊ
ꢉꢍꢁꢉꢊ ꢁꢍꢂꢉꢊ
ꢉꢍꢃꢁꢊ ꢉꢍꢀꢆꢊ
ꢉꢍꢀꢉꢊ ꢉꢍꢁꢅꢊ
ꢅꢍꢅꢊ
ꢅꢍꢇꢊ
ꢂꢍꢉꢊ
ꢃꢍꢅꢊ
ꢇꢍꢀꢊ
ꢆꢍꢅꢊ
ꢉꢍꢅꢊ ꢈꢊ
ꢉꢍꢂꢁꢊ
ꢁꢍꢉꢆꢊ
ꢉꢍꢇꢇꢊ
PPꢊ
ꢁꢍꢄꢃꢊ
ꢉꢍꢀꢆꢊ ꢉꢍꢁꢅꢊ
ꢉꢍꢀꢆꢊ
ꢉꢍꢉꢁꢊ
ꢉꢍꢇꢃꢆꢊ
ꢉꢍꢉꢀꢆꢊ
Rꢊ
ꢉꢊ
Rꢊ
ꢉꢍꢉꢉꢈꢅꢊ ꢉꢍꢉꢇꢁꢊ
ꢉꢍꢉꢉꢂꢉꢊ ꢉꢍꢉꢆꢆꢊ
ꢉꢍꢉꢁꢀꢊ ꢉꢍꢉꢉꢈꢅꢊ ꢉꢍꢃꢂꢂꢊ ꢉꢍꢁꢆꢄꢊ
ꢉꢍꢉꢉꢅꢊ ꢉꢍꢉꢉꢄꢆꢊ ꢉꢍꢃꢃꢄꢊ ꢉꢍꢁꢆꢉꢊ
ꢉꢍꢀꢂꢂꢊ
ꢉꢍꢀꢀꢅꢊ
ꢉꢍꢉꢃꢆꢊ
ꢉꢍꢉꢁꢇꢊ
ꢉꢍꢉꢂꢉꢊ ꢅꢊ
Rꢊ
LQFKHVꢊ
ꢉꢍꢉꢇꢅꢊ
ꢉꢍꢉꢁꢊ ꢉꢍꢉꢉꢄꢊ ꢉꢍꢉꢉꢂꢊ
ꢉꢍꢉꢂꢁꢊ
ꢉꢍꢉꢀꢇꢊ ꢉꢊ
1RWHꢄ
ꢁꢍꢊ3ODVWLFꢊRUꢊPHWDOꢊSURWUXVLRQVꢊRIꢊꢉꢍꢀꢊPPꢊꢋꢉꢍꢉꢉꢅꢊLQFKꢌꢊPD[LPXPꢊSHUꢊVLGHꢊDUHꢊQRWꢊLQFOXGHGꢍꢊꢊ
ꢄ5()(5(1&(6ꢄ
ꢄ-('(&ꢄ ꢄ-(,7$ꢄ
02ꢏꢁꢃꢄꢊ
287/,1(ꢄ
9(56,21ꢄ
(8523($1ꢄ
352-(&7,21ꢄ
,668(ꢄ'$7(ꢄ
ꢄ,(&ꢄ
ꢈꢈꢏꢁꢀꢏꢀꢄꢊ
ꢉꢃꢏꢉꢀꢏꢁꢅꢊ
ꢊ627ꢆꢆꢇꢏꢁꢊ
Fig 19. Package outline SOT556-1 (SSOP24)
74CBTLV3384
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 3 — 11 November 2016
13 of 19
74CBTLV3384
Nexperia
10-bit bus switch with 5-bit output enables
76623ꢆꢁꢉꢄSODVWLFꢄWKLQꢄVKULQNꢄVPDOOꢄRXWOLQHꢄSDFNDJHꢊꢄꢆꢁꢄOHDGVꢊꢄERG\ꢄZLGWKꢄꢁꢋꢁꢄPPꢄ
627ꢂꢏꢏꢐꢅꢄ
'ꢊ
(ꢊ
$ꢊ
;ꢊ
Fꢊ
+ꢊ
(ꢊ
Yꢊ 0ꢊ
$ꢊ
\ꢊ
=ꢊ
ꢀꢂꢊ
ꢁꢃꢊ
4ꢊ
$ꢊ
ꢀꢊ
ꢋ$ꢊꢊꢌꢊ
ꢃꢊ
$ꢊ
$ꢊ
ꢁꢊ
SLQꢊꢁꢊLQGH[ꢊ
șꢊ
/ꢊ
Sꢊ
/ꢊ
ꢁꢊ
ꢁꢀꢊ
GHWDLOꢊ;ꢊ
Zꢊ 0ꢊ
Eꢊ
Sꢊ
Hꢊ
ꢉꢊ
ꢀꢍꢆꢊ
ꢆꢊPPꢊ
VFDOHꢊ
',0(16,216ꢄꢇPPꢄDUHꢄWKHꢄRULJLQDOꢄGLPHQVLRQVꢈꢄꢄ
$ꢄ
ꢇꢅꢈꢄ
ꢇꢆꢈꢄ
ꢇꢅꢈꢄ
81,7ꢄ
PPꢊ
$ꢄ
ꢅꢄ
$ꢄ
ꢆꢄ
$ꢄ
ꢂꢄ
Eꢄ
Sꢄ
Fꢄ
'ꢄ
(ꢄ
Hꢄ
+ꢄ
/ꢄ
/ꢄ
Sꢄ
4ꢄ
Yꢄ
Zꢄ
\ꢄ
=ꢄ
șꢊ
(ꢄ
PD[ꢋꢄ
Rꢊ
ꢉꢍꢁꢆꢊ ꢉꢍꢈꢆꢊ
ꢉꢍꢉꢆꢊ ꢉꢍꢅꢉꢊ
ꢉꢍꢃꢉꢊ
ꢉꢍꢁꢈꢊ
ꢉꢍꢀꢊ
ꢉꢍꢁꢊ
ꢄꢍꢈꢊ
ꢄꢍꢄꢊ
ꢂꢍꢆꢊ
ꢂꢍꢃꢊ
ꢇꢍꢇꢊ
ꢇꢍꢀꢊ
ꢉꢍꢄꢆꢊ
ꢉꢍꢆꢉꢊ
ꢉꢍꢂꢊ
ꢉꢍꢃꢊ
ꢉꢍꢆꢊ
ꢉꢍꢀꢊ
ꢅꢊ
ꢁꢍꢁꢊ
ꢉꢍꢇꢆꢊ
ꢁꢊ
ꢉꢍꢀꢊ ꢉꢍꢁꢃꢊ
ꢉꢍꢁꢊ
ꢉꢍꢀꢆꢊ
Rꢊ
ꢉꢊ
1RWHVꢄ
ꢁꢍꢊ3ODVWLFꢊRUꢊPHWDOꢊSURWUXVLRQVꢊRIꢊꢉꢍꢁꢆꢊPPꢊPD[LPXPꢊSHUꢊVLGHꢊDUHꢊQRWꢊLQFOXGHGꢍꢊ
ꢀꢍꢊ3ODVWLFꢊLQWHUOHDGꢊSURWUXVLRQVꢊRIꢊꢉꢍꢀꢆꢊPPꢊPD[LPXPꢊSHUꢊVLGHꢊDUHꢊQRWꢊLQFOXGHGꢍꢊ
ꢄ5()(5(1&(6ꢄ
ꢄ-('(&ꢄ ꢄ-(,7$ꢄ
ꢊ02ꢏꢁꢆꢃꢊ
287/,1(ꢄ
9(56,21ꢄ
(8523($1ꢄ
352-(&7,21ꢄ
,668(ꢄ'$7(ꢄ
ꢄ,(&ꢄ
ꢈꢈꢏꢁꢀꢏꢀꢄꢊ
ꢉꢃꢏꢉꢀꢏꢁꢈꢊ
ꢊ627ꢃꢆꢆꢏꢁꢊ
Fig 20. Package outline SOT355-1 (TSSOP24)
74CBTLV3384
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 3 — 11 November 2016
14 of 19
74CBTLV3384
Nexperia
10-bit bus switch with 5-bit output enables
'+94)1ꢆꢁꢉꢄSODVWLFꢄGXDOꢄLQꢐOLQHꢄFRPSDWLEOHꢄWKHUPDOꢄHQKDQFHGꢄYHU\ꢄWKLQꢄTXDGꢄIODWꢄSDFNDJHꢊꢄ
QRꢄOHDGVꢊꢄꢆꢁꢄWHUPLQDOVꢊꢄERG\ꢄꢂꢋꢏꢄ[ꢄꢏꢋꢏꢄ[ꢄꢍꢋꢃꢏꢄPPꢄ
627ꢃꢅꢏꢐꢅꢄ
'ꢊ
%ꢊ
$ꢊ
$ꢊ
$
(ꢊ
ꢁꢊ
Fꢊ
GHWDLOꢊ;ꢊ
WHUPLQDOꢊꢁꢊ
LQGH[ꢊDUHDꢊ
&ꢊ
H
ꢁꢊ
WHUPLQDOꢊꢁꢊ
LQGH[ꢊDUHDꢊ
\
\ꢊ
Yꢊ 0ꢊ
Zꢊ 0ꢊ
&ꢊ $ꢊ %ꢊ
&ꢊ
&ꢊ
ꢁꢊ
Hꢊ
Eꢊ
ꢆꢄ
ꢅꢅꢄ
/ꢊ
ꢅꢆꢄ
ꢅꢂꢄ
ꢅꢄ
H
(
ꢀꢊ
Kꢊ
ꢆꢁꢄ
ꢆꢂꢄ
ꢅꢁꢄ
;ꢊ
'
Kꢊ
ꢉꢊ
ꢀꢍꢆꢊ
ꢆꢊPPꢊ
VFDOHꢊ
',0(16,216ꢄꢇPPꢄDUHꢄWKHꢄRULJLQDOꢄGLPHQVLRQVꢈꢄ
ꢇꢅꢈ
$
ꢄ
ꢇꢅꢈꢄ
ꢇꢅꢈꢄ
81,7ꢄ
$
Eꢄ
Fꢄ
'
'
(
(
Kꢄ
Hꢄ
ꢉꢍꢆꢊ
H
H
/ꢄ
Yꢄ
Zꢄ
\ꢄ
\
ꢅꢄ
ꢅꢄ
ꢆꢄ
ꢅꢄ
Kꢄ
PD[ꢋꢄ
ꢉꢍꢉꢆꢊ ꢉꢍꢃꢉꢊ
ꢉꢍꢉꢉꢊ ꢉꢍꢁꢅꢊ
ꢆꢍꢇꢊ ꢂꢍꢀꢆꢊ ꢃꢍꢇꢊ ꢀꢍꢀꢆꢊ
ꢆꢍꢂꢊ ꢃꢍꢈꢆꢊ ꢃꢍꢂꢊ ꢁꢍꢈꢆꢊ
ꢉꢍꢆꢊ
ꢉꢍꢃꢊ
PPꢊ
ꢁꢊ
ꢉꢍꢀꢊ
ꢂꢍꢆꢊ
ꢁꢍꢆꢊ
ꢉꢍꢁꢊ ꢉꢍꢉꢆꢊ ꢉꢍꢉꢆꢊ ꢉꢍꢁꢊ
1RWHꢄ
ꢁꢍꢊ3ODVWLFꢊRUꢊPHWDOꢊSURWUXVLRQVꢊRIꢊꢉꢍꢉꢄꢆꢊPPꢊPD[LPXPꢊSHUꢊVLGHꢊDUHꢊQRWꢊLQFOXGHGꢍꢊꢊ
ꢄ5()(5(1&(6ꢄ
287/,1(ꢄ
9(56,21ꢄ
(8523($1ꢄ
352-(&7,21ꢄ
,668(ꢄ'$7(ꢄ
ꢄ,(&ꢄ
ꢄ-('(&ꢄ
ꢏꢊꢏꢊꢏꢊ
ꢄ-(,7$ꢄ
ꢉꢃꢏꢉꢂꢏꢀꢈꢊ
ꢊ627ꢅꢁꢆꢏꢁꢊ
ꢏꢊꢏꢊꢏꢊ
ꢏꢊꢏꢊꢏꢊ
Fig 21. Package outline SOT815-1 (DHVQFN24)
74CBTLV3384
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 3 — 11 November 2016
15 of 19
74CBTLV3384
Nexperia
10-bit bus switch with 5-bit output enables
13. Abbreviations
Table 12. Abbreviations
Acronym
CDM
CMOS
DUT
Description
Charged Device Model
Complementary Metal-Oxide Semiconductor
Device Under Test
ESD
ElectroStatic Discharge
Human Body Model
HBM
MM
Machine Model
TTL
Transistor-Transistor Logic
14. Revision history
Table 13. Revision history
Document ID
Release date
20161111
Data sheet status
Change notice
Supersedes
74CBTLV3384 v.3
Modifications:
Product data sheet
-
74CBTLV3384 v.2
• Section 11.1 and Section 11.2 added.
20111216 Product data sheet
• Legal pages updated.
20101230 Product data sheet
74CBTLV3384 v.2
Modifications:
-
-
74CBTLV3384 v.1
-
74CBTLV3384 v.1
74CBTLV3384
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 3 — 11 November 2016
16 of 19
74CBTLV3384
Nexperia
10-bit bus switch with 5-bit output enables
15. Legal information
15.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nexperia.com.
Suitability for use — Nexperia products are not designed,
15.2 Definitions
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of a Nexperia product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. Nexperia and its suppliers accept no liability for
inclusion and/or use of Nexperia products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the Nexperia
product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the Nexperia product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
Nexperia does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using Nexperia
products in order to avoid a default of the applications and
15.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no
responsibility for the content in this document if provided by an information
source outside of Nexperia.
the products or of the application or use by customer’s third party
customer(s). Nexperia does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
In no event shall Nexperia be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Terms and conditions of commercial sale — Nexperia
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nexperia.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. Nexperia hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of Nexperia products by customer.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of Nexperia.
Right to make changes — Nexperia reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
74CBTLV3384
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 3 — 11 November 2016
17 of 19
74CBTLV3384
Nexperia
10-bit bus switch with 5-bit output enables
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Nexperia’s specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies Nexperia for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond Nexperia’s
standard warranty and Nexperia’s product specifications.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Nexperia product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. Nexperia
accepts no liability for inclusion and/or use of
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without Nexperia’s warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
15.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
16. Contact information
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
74CBTLV3384
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 3 — 11 November 2016
18 of 19
74CBTLV3384
Nexperia
10-bit bus switch with 5-bit output enables
17. Contents
1
2
3
4
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
5
5.1
5.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
6
7
8
Functional description . . . . . . . . . . . . . . . . . . . 4
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
Recommended operating conditions. . . . . . . . 5
9
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
Test circuits. . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
ON resistance. . . . . . . . . . . . . . . . . . . . . . . . . . 6
ON resistance test circuit and graphs. . . . . . . . 7
9.1
9.2
9.3
10
Dynamic characteristics . . . . . . . . . . . . . . . . . . 9
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Additional dynamic characteristics . . . . . . . . 12
Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 16
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 16
11
11.1
11.2
12
13
14
15
Legal information. . . . . . . . . . . . . . . . . . . . . . . 17
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 17
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 18
15.1
15.2
15.3
15.4
16
17
Contact information. . . . . . . . . . . . . . . . . . . . . 18
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
© Nexperia B.V. 2017. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 11 November 2016
相关型号：
74CBTLV3384PW
CBTLV/3B SERIES, 10-BIT DRIVER, TRUE OUTPUT, PDSO24, 4.40 MM, PLASTIC, MO-153, SOT355-1, TSSOP-24
NXP
74CBTLV3861BQ
CBTLV/3B SERIES, 10-BIT DRIVER, TRUE OUTPUT, PQCC24, 5.50 X 3.50 MM, 0.85 MM HEIGHT, PLASTIC, SOT815-1, DHVQFN-24
NXP
©2020 ICPDF网 联系我们和版权申明