74AVCH20T245DGG [NEXPERIA]
20-bit dual supply translating transceiver with configurable voltage translation; 3-stateProduction;型号: | 74AVCH20T245DGG |
厂家: | Nexperia |
描述: | 20-bit dual supply translating transceiver with configurable voltage translation; 3-stateProduction 光电二极管 逻辑集成电路 |
文件: | 总23页 (文件大小:309K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
74AVCH20T245
20-bit dual supply translating transceiver with configurable
voltage translation; 3-state
Rev. 6 — 14 January 2019
Product data sheet
1. General description
The 74AVCH20T245 is a 20-bit, dual supply transceiver that enables bi-directional voltage level
translation. The device can be used as two 10-bit transceivers or as a single 20-bit transceiver.
It features four 10-bit input-output ports (1An, 1Bn and 2An, 2Bn), two output enable inputs
(nOE), two direction inputs (nDIR) and dual supplies (VCC(A) and VCC(B)). VCC(A) and VCC(B) can
be independently supplied at any voltage between 0.8 V and 3.6 V making the device suitable for
bi-directional voltage level translation between any of the low voltage nodes: 0.8 V, 1.2 V, 1.5 V,
1.8 V, 2.5 V and 3.3 V. The 1An and 2An ports, nOE and nDIR are referenced to VCC(A), the 1Bn
and 2Bn ports are referenced to VCC(B). A HIGH on a 1DIR allows transmission from 1An to 1Bn
and a LOW on 1DIR allows transmission from 1Bn to 1An. A HIGH on nOE causes the outputs to
assume a HIGH impedance OFF-state.
The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry
disables the output, preventing any damaging backflow current through the device when it is
powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, all output ports will
assume a high impedance OFF-state. The bus hold circuitry on the powered-up side always stays
active.
The 74AVCH20T245 has active bus hold circuitry which is provided to hold unused or floating
data inputs at a valid logic level. This feature eliminates the need for external pull-up or pull-down
resistors.
2. Features and benefits
•
Wide supply voltage range:
•
•
VCC(A): 0.8 V to 3.6 V
VCC(B): 0.8 V to 3.6 V
•
Complies with JEDEC standards:
•
•
•
•
•
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
•
ESD protection:
•
•
•
HBM JESD22-A114E Class 3B exceeds 8000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101C exceeds 1000 V
Nexperia
74AVCH20T245
20-bit dual supply translating transceiver with configurable voltage translation; 3-state
•
Maximum data rates:
•
•
•
•
•
•
380 Mbit/s (≥ 1.8 V to 3.3 V translation)
260 Mbit/s (≥ 1.1 V to 3.3 V translation)
260 Mbit/s (≥ 1.1 V to 2.5 V translation)
210 Mbit/s (≥ 1.1 V to 1.8 V translation)
120 Mbit/s (≥ 1.1 V to 1.5 V translation)
100 Mbit/s (≥ 1.1 V to 1.2 V translation)
•
•
•
•
•
•
•
Suspend mode
Bus hold on data inputs
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
IOFF circuitry provides partial Power-down mode operation
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
Version
74AVCH20T245DGG
-40 °C to +125 °C
TSSOP56 plastic thin shrink small outline package;
56 leads; body width 6.1 mm
SOT364-1
4. Functional diagram
1DIR
2DIR
1OE
1B1
2OE
1A1
2A1
2B1
V
V
V
V
CC(B)
CC(A)
CC(B)
CC(A)
to other nine channels
to other nine channels
001aal240
Fig. 1. Logic diagram
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74AVCH20T245
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 6 — 14 January 2019
2 / 23
Nexperia
74AVCH20T245
20-bit dual supply translating transceiver with configurable voltage translation; 3-state
2
3
5
6
8
9
10
1B7
12
1B8
13
1B9
14
1B10
1B1
1B2
1B3
1B4
1B5
1B6
V
V
CC(B)
CC(A)
1OE
56
1DIR
1
1A1
55
1A2
54
1A3
52
1A4
51
1A5
49
1A6
48
1A7
47
1A8
45
1A9
44
1A10
43
15
2B1
16
2B2
17
2B3
19
2B4
20
2B5
21
2B6
23
2B7
24
2B8
26
2B9
27
2B10
V
V
CC(B)
CC(A)
2OE
29
2DIR
28
2A1
42
2A2
41
2A3
40
2A4
38
2A5
37
2A6
36
2A7
34
2A8
33
2A9
31
2A10
30
001aal239
Fig. 2. Logic symbol
©
74AVCH20T245
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 6 — 14 January 2019
3 / 23
Nexperia
74AVCH20T245
20-bit dual supply translating transceiver with configurable voltage translation; 3-state
5. Pinning information
5.1. Pinning
74AVCH20T245
1
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1DIR
1B1
1B2
GND
1B3
1B4
1OE
1A1
1A2
GND
1A3
1A4
2
3
4
5
6
7
V
V
CC(A)
CC(B)
1B5
8
1A5
1A6
1A7
GND
1A8
1A9
1A10
2A1
2A2
2A3
GND
2A4
2A5
2A6
9
1B6
1B7
GND
1B8
1B9
1B10
2B1
2B2
2B3
GND
2B4
2B5
2B6
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
V
V
CC(A)
CC(B)
2B7
2A7
2B8
GND
2B9
2A8
GND
2A9
2B10
2DIR
2A10
2OE
001aal242
Fig. 3. Pin configuration SOT364-1 (TSSOP56)
©
74AVCH20T245
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 6 — 14 January 2019
4 / 23
Nexperia
74AVCH20T245
20-bit dual supply translating transceiver with configurable voltage translation; 3-state
5.2. Pin description
Table 2. Pin description
Symbol Pin
Description
1DIR, 2DIR 1, 28
direction control
1B1 to 1B10 2, 3, 5, 6, 8, 9, 10, 12, 13, 14
2B1 to 2B10 15, 16, 17, 19, 20, 21, 23, 24,26, 27
data input or output
data input or output
GND[1]
VCC(B)
4, 11, 18, 25, 32, 39, 46, 53
ground (0 V)
7, 22
supply voltage B (nBn inputs are referenced to VCC(B)
output enable input (active LOW)
data input or output
)
1OE, 2OE
56, 29
1A1 to 1A10 55, 54, 52, 51, 49, 48, 47, 45,44, 43
2A1 to 2A10 42, 41, 40, 38, 37, 36, 34, 33,31, 30
data input or output
VCC(A)
35, 50
supply voltage A (nAn, nOE and nDIR inputs are referenced to VCC(A))
[1] All GND pins must be connected to ground (0 V).
6. Functional description
Table 3. Function table
[1]
Supply voltage
VCC(A), VCC(B)
0.8 V to 3.6 V
0.8 V to 3.6 V
0.8 V to 3.6 V
GND [2]
Input
Input/output [2]
nOE [3]
nDIR [3]
nAn [3]
nBn [3]
L
L
nAn = nBn
input
L
H
X
X
input
Z
nBn = nAn
H
X
Z
Z
Z
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
[2] If at least one of VCC(A) or VCC(B) is at GND level, the device goes into suspend mode.
[3] The nAn, nDIR and nOE input circuit is referenced to VCC(A); The nBn input circuit is referenced to VCC(B)
.
©
74AVCH20T245
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 6 — 14 January 2019
5 / 23
Nexperia
74AVCH20T245
20-bit dual supply translating transceiver with configurable voltage translation; 3-state
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
VCC(A)
VCC(B)
IIK
Parameter
Conditions
Min
-0.5
-0.5
-50
-0.5
-50
-0.5
-0.5
-
Max
+4.6
+4.6
-
Unit
V
supply voltage A
supply voltage B
input clamping current
input voltage
V
VI < 0 V
mA
V
VI
[1]
+4.6
-
IOK
output clamping current
output voltage
VO < 0 V
mA
VO
Active mode
[1][2][3]
[1]
VCCO + 0.5 V
Suspend or 3-state mode
VO = 0 V to VCCO
ICC(A) or ICC(B)
+4.6
±50
100
-
V
IO
output current
[2]
mA
mA
mA
°C
ICC
IGND
Tstg
Ptot
supply current
-
ground current
-100
-65
-
storage temperature
total power dissipation
+150
600
Tamb = -40 °C to +125 °C
[4]
mW
[1] The minimum input and minimum output voltage ratings may be exceeded if the input and output clamping current ratings are
observed.
[2] VCCO is the supply voltage associated with the output port.
[3] VCCO + 0.5 V should not exceed 4.6 V.
[4] Above 55 °C the value of Ptot derates linearly with 8.0 mW/K.
8. Recommended operating conditions
Table 5. Recommended operating conditions
Symbol
VCC(A)
VCC(B)
VI
Parameter
Conditions
Min
0.8
0.8
0
Max
3.6
Unit
V
supply voltage A
supply voltage B
input voltage
3.6
V
3.6
V
VO
output voltage
Active mode
[1]
[2]
0
VCCO
3.6
V
Suspend or 3-state mode
0
V
Tamb
ambient temperature
-40
-
+125
5
°C
ns/V
Δt/ΔV
input transition rise and fall rate
VCCI = 0.8 V to 3.6 V
[1] VCCO is the supply voltage associated with the output port.
[2] VCCI is the supply voltage associated with the input port.
©
74AVCH20T245
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 6 — 14 January 2019
6 / 23
Nexperia
74AVCH20T245
20-bit dual supply translating transceiver with configurable voltage translation; 3-state
9. Static characteristics
Table 6. Typical static characteristics at Tamb = 25 °C
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).[1] [2]
Symbol Parameter
Conditions
HIGH-level output voltage VI = VIH or VIL
IO = -1.5 mA; VCC(A) = VCC(B) = 0.8 V
LOW-level output voltage VI = VIH or VIL
IO = 1.5 mA; VCC(A) = VCC(B) = 0.8 V
Min
Typ
0.69
0.07
Max Unit
VOH
VOL
II
-
-
-
V
V
-
-
input leakage current
nDIR, nOE input; VI = 0 V or 3.6 V;
VCC(A) = VCC(B) = 0.8 V to 3.6 V
±0.025 ±0.25 μA
IBHL
bus hold LOW current
bus hold HIGH current
A or B port; VI = 0.42 V; VCC(A) = VCC(B) = 1.2 V
A or B port; VI = 0.78 V; VCC(A) = VCC(B) = 1.2 V
A or B port; VCC(A) = VCC(B) = 1.2 V
[3]
[4]
[5]
-
-
-
26
-24
27
-
-
-
μA
μA
μA
IBHH
IBHLO
bus hold LOW overdrive
current
IBHHO
IOZ
bus hold HIGH overdrive
current
A or B port; VCC(A) = VCC(B) = 1.2 V
[6]
[7]
[7]
[7]
-
-
-
-
-
-
-
-
-26
±0.5
±0.5
±0.5
±0.1
±0.1
2.0
-
μA
OFF-state output current
A or B port; VO = 0 V or VCCO
;
±2.5 μA
±2.5 μA
±2.5 μA
±1 μA
±1 μA
VCC(A) = VCC(B) = 3.6 V
suspend mode A port; VO = 0 V or VCCO
VCC(A) = 3.6 V; VCC(B) = 0 V
;
;
suspend mode B port; VO = 0 V or VCCO
VCC(A) = 0 V; VCC(B) = 3.6 V
IOFF
power-off leakage current A port; VI or VO = 0 V to 3.6 V; VCC(A) = 0 V;
VCC(B) = 0.8 V to 3.6 V
B port; VI or VO = 0 V to 3.6 V; VCC(B) = 0 V;
VCC(A) = 0.8 V to 3.6 V
CI
input capacitance
nDIR, nOE input; VI = 0 V or 3.3 V;
VCC(A) = VCC(B) = 3.3 V
-
-
pF
pF
CI/O
input/output capacitance
A and B port; VO = 3.3 V or 0 V;
VCC(A) = VCC(B) = 3.3 V
4.0
[1] VCCO is the supply voltage associated with the output port.
[2] VCCI is the supply voltage associated with the data input port.
[3] The bus hold circuit can sink at least the minimum low sustaining current at VIL max. IBHL should be measured after lowering VI to GND
and then raising it to VIL max.
[4] The bus hold circuit can source at least the minimum high sustaining current at VIH min. IBHH should be measured after raising VI to
VCC and then lowering it to VIH min.
[5] An external driver must source at least IBHLO to switch this node from LOW to HIGH.
[6] An external driver must sink at least IBHHO to switch this node from HIGH to LOW.
[7] For I/O ports, the parameter IOZ includes the input leakage current.
©
74AVCH20T245
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 6 — 14 January 2019
7 / 23
Nexperia
74AVCH20T245
20-bit dual supply translating transceiver with configurable voltage translation; 3-state
Table 7. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).[1] [2]
Symbol Parameter
Conditions
-40 °C to +85 °C
-40 °C to +125 °C
Unit
Min
Max
Min
Max
VIH
HIGH-level
data input
input voltage
VCCI = 0.8 V
0.70VCCI
0.65VCCI
1.6
-
-
-
-
0.70VCCI
0.65VCCI
1.6
-
-
-
-
V
VCCI = 1.1 V to 1.95 V
VCCI = 2.3 V to 2.7 V
VCCI = 3.0 V to 3.6 V
nDIR, nOE input
V
V
V
2
2
VCC(A) = 0.8 V
0.70VCC(A)
-
-
-
-
0.70VCC(A)
-
-
-
-
V
V
V
V
VCC(A) = 1.1 V to 1.95 V
VCC(A) = 2.3 V to 2.7 V
VCC(A) = 3.0 V to 3.6 V
data input
0.65VCC(A)
0.65VCC(A)
1.6
2
1.6
2
VIL
LOW-level
input voltage
VCCI = 0.8 V
-
-
-
-
0.30VCCI
0.35VCCI
0.7
-
-
-
-
0.30VCCI
0.35VCCI
0.7
V
V
V
V
VCCI = 1.1 V to 1.95 V
VCCI = 2.3 V to 2.7 V
VCCI = 3.0 V to 3.6 V
nDIR, nOE input
0.8
0.8
VCC(A) = 0.8 V
-
-
-
-
0.30VCC(A)
0.35VCC(A)
0.7
-
-
-
-
0.30VCC(A)
0.35VCC(A)
0.7
V
V
V
V
VCC(A) = 1.1 V to 1.95 V
VCC(A) = 2.3 V to 2.7 V
VCC(A) = 3.0 V to 3.6 V
VI = VIH or VIL
0.8
0.8
VOH
HIGH-level
output voltage
IO = -100 μA;
VCCO - 0.1
-
VCCO - 0.1
-
V
VCC(A) = VCC(B) = 0.8 V to 3.6 V
IO = -3 mA; VCC(A) = VCC(B) = 1.1 V
IO = -6 mA; VCC(A) = VCC(B) = 1.4 V
0.85
1.05
1.2
-
-
-
0.85
1.05
1.2
-
-
-
V
V
V
IO = -8 mA;
VCC(A) = VCC(B) = 1.65 V
IO = -9 mA; VCC(A) = VCC(B) = 2.3 V
1.75
2.3
-
-
1.75
2.3
-
-
V
V
IO = -12 mA;
VCC(A) = VCC(B) = 3.0 V
VOL
LOW-level
VI = VIH or VIL
output voltage
IO = 100 μA;
-
0.1
-
0.1
V
VCC(A) = VCC(B) = 0.8 V to 3.6 V
IO = 3 mA; VCC(A) = VCC(B) = 1.1 V
IO = 6 mA; VCC(A) = VCC(B) = 1.4 V
IO = 8 mA; VCC(A) = VCC(B) = 1.65 V
IO = 9 mA; VCC(A) = VCC(B) = 2.3 V
IO = 12 mA; VCC(A) = VCC(B) = 3.0 V
-
-
-
-
-
-
0.25
0.35
0.45
0.55
0.7
-
-
-
-
-
-
0.25
0.35
0.45
0.55
0.7
V
V
V
V
V
II
input leakage nDIR, nOE input; VI = 0 V or 3.6 V;
current VCC(A) = VCC(B) = 0.8 V to 3.6 V
±1
±5
μA
©
74AVCH20T245
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 6 — 14 January 2019
8 / 23
Nexperia
74AVCH20T245
20-bit dual supply translating transceiver with configurable voltage translation; 3-state
Symbol Parameter
Conditions
-40 °C to +85 °C
-40 °C to +125 °C
Unit
Min
Max
Min
Max
IBHL
bus hold LOW A or B port
current
[3]
[4]
VI = 0.49 V; VCC(A) = VCC(B) = 1.4 V
15
25
-
-
15
25
-
-
μA
μA
VI = 0.58 V;
VCC(A) = VCC(B) = 1.65 V
VI = 0.70 V; VCC(A) = VCC(B) = 2.3 V
VI = 0.80 V; VCC(A) = VCC(B) = 3.0 V
45
-
-
45
90
-
-
μA
μA
100
IBHH
bus hold
A or B port
HIGH current
VI = 0.91 V; VCC(A) = VCC(B) = 1.4 V
-15
-25
-
-
-15
-25
-
-
μA
μA
VI = 1.07 V;
VCC(A) = VCC(B) = 1.65 V
VI = 1.60 V; VCC(A) = VCC(B) = 2.3 V
VI = 2.00 V; VCC(A) = VCC(B) = 3.0 V
-45
-
-
-45
-
-
μA
μA
-100
-100
IBHLO
IBHHO
IOZ
bus hold LOW A or B port
overdrive
[5]
[6]
VCC(A) = VCC(B) = 1.6 V
125
200
300
500
-
-
-
-
125
200
300
500
-
-
-
-
μA
μA
μA
μA
current
VCC(A) = VCC(B) = 1.95 V
VCC(A) = VCC(B) = 2.7 V
VCC(A) = VCC(B) = 3.6 V
bus hold
HIGH
overdrive
current
A or B port
VCC(A) = VCC(B) = 1.6 V
VCC(A) = VCC(B) = 1.95 V
VCC(A) = VCC(B) = 2.7 V
VCC(A) = VCC(B) = 3.6 V
A or B port; VO = 0 V or VCCO
-125
-200
-300
-500
-
-
-
-125
-200
-300
-500
-
-
μA
μA
μA
μA
μA
-
-
-
-
-
OFF-state
;
[7]
[7]
±5
±30
output current VCC(A) = VCC(B) = 3.6 V
suspend mode A port;
VO = 0 V or VCCO; VCC(A) = 3.6 V;
VCC(B) = 0 V
-
-
±5
±5
-
-
±30
±30
μA
μA
suspend mode B port;
VO = 0 V or VCCO; VCC(A) = 0 V;
VCC(B) = 3.6 V
[7]
IOFF
power-off
leakage
current
A port; VI or VO = 0 V to 3.6 V;
VCC(A) = 0 V; VCC(B) = 0.8 V to 3.6 V
-
-
±5
±5
-
-
±30
±30
μA
μA
B port; VI or VO = 0 V to 3.6 V;
VCC(B) = 0 V; VCC(A) = 0.8 V to 3.6 V
©
74AVCH20T245
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 6 — 14 January 2019
9 / 23
Nexperia
74AVCH20T245
20-bit dual supply translating transceiver with configurable voltage translation; 3-state
Symbol Parameter
Conditions
-40 °C to +85 °C
-40 °C to +125 °C
Unit
Min
Max
Min
Max
ICC
supply current A port; VI = 0 V or VCCI; IO = 0 A
VCC(A) = 0.8 V to 3.6 V;
VCC(B) = 0.8 V to 3.6 V
-
-
45
35
-
-
190
140
μA
μA
VCC(A) = 1.1 V to 3.6 V;
VCC(B) = 1.1 V to 3.6 V
VCC(A) = 3.6 V; VCC(B) = 0 V
VCC(A) = 0 V; VCC(B) = 3.6 V
B port; VI = 0 V or VCCI; IO = 0 A
-
35
-
-
140
-
μA
μA
-5
-20
VCC(A) = 0.8 V to 3.6 V;
VCC(B) = 0.8 V to 3.6 V
-
-
45
35
-
-
190
140
μA
μA
VCC(A) = 1.1 V to 3.6 V;
VCC(B) = 1.1 V to 3.6 V
VCC(A) = 3.6 V; VCC(B) = 0 V
VCC(A) = 0 V; VCC(B) = 3.6 V
A plus B port (ICC(A) + ICC(B));
-5
-
-
-20
-
μA
μA
μA
35
80
-
-
140
270
-
IO = 0 A; VI = 0 V or VCCI
VCC(A) = 0.8 V to 3.6 V;
VCC(B) = 0.8 V to 3.6 V
;
A plus B port (ICC(A) + ICC(B));
-
65
-
220
μA
IO = 0 A; VI = 0 V or VCCI
VCC(A) = 1.1 V to 3.6 V;
VCC(B) = 1.1 V to 3.6 V
;
[1] VCCO is the supply voltage associated with the output port.
[2] VCCI is the supply voltage associated with the data input port.
[3] The bus hold circuit can sink at least the minimum low sustaining current at VIL max. IBHL should be measured after lowering VI to GND
and then raising it to VIL max.
[4] The bus hold circuit can source at least the minimum high sustaining current at VIH min. IBHH should be measured after raising VI to
VCC and then lowering it to VIH min.
[5] An external driver must source at least IBHLO to switch this node from LOW to HIGH.
[6] An external driver must sink at least IBHHO to switch this node from HIGH to LOW.
[7] For I/O ports, the parameter IOZ includes the input leakage current.
Table 8. Typicaltotal supply current (ICC(A) + ICC(B)
)
VCC(A)
VCC(B)
1.5 V
0.1
Unit
0 V
0
0.8 V
0.1
0.1
0.1
0.1
0.1
0.3
1.6
1.2 V
0.1
0.1
0.1
0.1
0.1
0.1
0.8
1.8 V
0.1
0.1
0.1
0.1
0.1
0.1
0.2
2.5 V
0.1
0.3
0.1
0.1
0.1
0.1
0.1
3.3 V
0.1
1.6
0.8
0.4
0.2
0.1
0.1
0 V
μA
μA
μA
μA
μA
μA
μA
0.8 V
1.2 V
1.5 V
1.8 V
2.5 V
3.3 V
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.4
©
74AVCH20T245
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 6 — 14 January 2019
10 / 23
Nexperia
74AVCH20T245
20-bit dual supply translating transceiver with configurable voltage translation; 3-state
10. Dynamic characteristics
Table 9. Typical power dissipation capacitance at VCC(A) = VCC(B) and Tamb = 25 °C
Voltages are referenced to GND (ground = 0 V).[1][2]
Symbol Parameter
Conditions
VCC(A) = VCC(B)
Unit
0.8 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V
CPD
power dissipation A port: (direction A to B); output enabled
0.2
0.2
9.5
0.6
9.5
0.6
0.2
0.2
0.2
0.2
9.7
0.6
9.7
0.6
0.2
0.2
0.2
0.2
9.8
0.6
9.8
0.6
0.2
0.2
0.2
0.2
9.9
0.6
9.9
0.6
0.2
0.2
0.3
0.3
0.4 pF
0.4 pF
capacitance
A port: (direction A to B); output disabled
A port: (direction B to A); output enabled
A port: (direction B to A); output disabled
B port: (direction A to B); output enabled
B port: (direction A to B); output disabled
B port: (direction B to A); output enabled
B port: (direction B to A); output disabled
10.7 11.9 pF
0.7 0.7 pF
10.7 11.9 pF
0.7
0.3
0.3
0.7 pF
0.4 pF
0.4 pF
[1] CPD is used to determine the dynamic power dissipation (PD in μW).
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ(CL × VCC2 × fo) = sum of the outputs.
[2] fi = 10 MHz; VI = GND to VCC; tr = tf = 1 ns; CL = 0 pF; RL = ∞ Ω.
Table 10. Typical dynamic characteristics at VCC(A) = 0.8 V and Tamb = 25 °C
Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 6; for wave forms see Fig. 4 and Fig. 5.[1]
Symbol Parameter Conditions VCC(B)
1.5 V
Unit
0.8 V
14.4
14.4
16.2
17.6
21.9
22.2
1.2 V
7.0
1.8 V
6.0
2.5 V
5.9
3.3 V
tpd
tdis
ten
propagation delay nAn to nBn
nBn to nAn
6.2
12.1
16.2
9.0
6.0
11.8
16.2
9.3
ns
ns
ns
ns
ns
ns
12.4
16.2
10.0
21.9
11.1
11.9
16.2
9.1
11.8
16.2
8.7
disable time
nOE to nAn
nOE to nBn
nOE to nAn
nOE to nBn
enable time
21.9
9.8
21.9
9.4
21.9
9.4
21.9
9.6
[1] tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH
.
Table 11. Typical dynamic characteristics at VCC(B) = 0.8 V and Tamb = 25 °C
Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 6; for wave forms see Fig. 4 and Fig. 5. [1]
Symbol Parameter Conditions VCC(A)
1.5 V
Unit
0.8 V
14.4
14.4
16.2
17.6
21.9
22.2
1.2 V
12.4
7.0
1.8 V
11.9
6.0
2.5 V
11.8
5.9
3.3 V
11.8
6.0
tpd
tdis
ten
propagation delay nAn to nBn
nBn to nAn
12.1
6.2
ns
ns
ns
ns
ns
ns
disable time
nOE to nAn
nOE to nBn
nOE to nAn
nOE to nBn
5.9
4.4
4.2
3.1
3.5
14.2
6.4
13.7
4.4
13.6
3.5
13.3
2.6
13.1
2.3
enable time
17.7
17.2
17.0
16.8
16.7
[1] tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH
.
©
74AVCH20T245
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 6 — 14 January 2019
11 / 23
Nexperia
74AVCH20T245
20-bit dual supply translating transceiver with configurable voltage translation; 3-state
Table 12. Dynamic characteristics for temperature range -40 °C to +85 °C
Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 6; for wave forms see Fig. 4 and Fig. 5. [1]
Symbol Parameter
Conditions
VCC(B)
Unit
1.2 V ± 0.1 V 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
VCC(A) = 1.1 V to 1.3 V
tpd
tdis
ten
propagation nAn to nBn
0.5
0.5
2.0
1.5
1.5
1.0
9.4
9.4
0.5
0.5
2.0
1.5
1.5
1.0
7.1
8.9
0.5
0.5
2.0
1.5
1.5
1.0
6.2
8.7
0.5
0.5
2.0
1.0
1.5
0.5
5.2
8.4
0.5
0.5
2.0
1.0
1.5
0.5
5.1 ns
8.2 ns
11.9 ns
9.0 ns
15.3 ns
8.0 ns
delay
nBn to nAn
disable time nOE to nAn
nOE to nBn
11.9
12.7
15.3
15.6
11.9
9.8
11.9
9.6
11.9
8.1
enable time nOE to nAn
nOE to nBn
15.3
11.5
15.3
10.0
15.3
8.4
VCC(A) = 1.4 V to 1.6 V
tpd
tdis
ten
propagation nAn to nBn
delay
0.5
0.5
2.0
1.5
1.5
1.0
8.9
7.1
0.5
0.5
2.0
1.5
1.5
1.0
6.4
6.4
0.5
0.5
2.0
1.5
1.5
1.0
5.4
6.1
0.5
0.5
2.0
1.0
1.5
0.5
4.3
5.8
0.5
0.5
2.0
1.0
1.5
0.5
3.9 ns
5.7 ns
9.0 ns
6.0 ns
10.2 ns
5.3 ns
nBn to nAn
disable time nOE to nAn
nOE to nBn
9.0
9.0
9.0
9.0
11.7
10.3
14.3
9.0
7.8
6.4
enable time nOE to nAn
nOE to nBn
10.3
10.3
10.3
8.4
10.2
6.1
VCC(A) = 1.65 V to 1.95 V
tpd
tdis
ten
propagation nAn to nBn
delay
0.5
0.5
2.0
1.5
1.0
0.5
8.7
6.2
0.5
0.5
2.0
1.5
1.0
0.5
6.1
5.4
0.5
0.5
2.0
1.5
1.0
0.5
5.0
5.0
7.4
7.4
7.9
7.9
0.5
0.5
2.0
1.0
1.0
0.5
3.9
4.7
7.4
5.8
7.9
5.7
0.5
0.5
2.0
1.0
1.0
0.5
3.5 ns
4.6 ns
7.4 ns
5.6 ns
7.9 ns
4.8 ns
nBn to nAn
disable time nOE to nAn
nOE to nBn
7.4
7.4
11.3
8.1
8.7
enable time nOE to nAn
nOE to nBn
8.1
13.8
10.0
VCC(A) = 2.3 V to 2.7 V
tpd
tdis
ten
propagation nAn to nBn
delay
0.5
0.5
1.1
1.2
0.5
0.5
8.4
5.2
0.5
0.5
1.1
1.2
0.5
0.5
5.8
4.3
5.2
8.2
5.4
9.6
0.5
0.5
1.1
1.2
0.5
0.5
4.7
3.9
5.2
6.9
5.3
7.6
0.5
0.5
1.1
1.0
0.5
0.5
3.5
3.5
5.2
5.3
5.2
5.3
0.5
0.5
1.1
1.0
0.5
0.5
3.0 ns
3.4 ns
5.2 ns
5.2 ns
5.2 ns
4.3 ns
nBn to nAn
disable time nOE to nAn
nOE to nBn
5.2
10.8
5.4
enable time nOE to nAn
nOE to nBn
13.3
VCC(A) = 3.0 V to 3.6 V
tpd
tdis
ten
propagation nAn to nBn
delay
0.5
0.5
0.8
1.2
0.5
1.0
8.2
5.1
0.5
0.5
0.8
1.2
0.5
1.0
5.7
3.9
5.0
8.1
4.4
9.6
0.5
0.5
0.8
1.2
0.5
0.5
4.6
3.5
5.0
6.7
4.3
7.5
0.5
0.5
0.8
1.0
0.5
0.5
3.4
3.0
5.0
5.1
4.2
5.1
0.5
0.5
0.8
0.8
0.5
0.5
2.9 ns
2.9 ns
5.0 ns
5.0 ns
4.1 ns
4.1 ns
nBn to nAn
disable time nOE to nAn
nOE to nBn
5.0
10.5
4.4
enable time nOE to nAn
nOE to nBn
13.1
[1] tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH
.
©
74AVCH20T245
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 6 — 14 January 2019
12 / 23
Nexperia
74AVCH20T245
20-bit dual supply translating transceiver with configurable voltage translation; 3-state
Table 13. Dynamic characteristics for temperature range -40 °C to +125 °C
Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 6; for wave forms see Fig. 4 and Fig. 5. [1]
Symbol Parameter
Conditions
VCC(B)
Unit
1.2 V ± 0.1 V 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
VCC(A) = 1.1 V to 1.3 V
tpd
tdis
ten
propagation nAn to nBn
0.5
0.5
2.0
1.5
1.5
1.0
10.4
10.4
13.1
14.0
16.9
17.2
0.5
0.5
2.0
1.5
1.5
1.0
7.9
9.8
0.5
0.5
2.0
1.5
1.5
1.0
6.9
9.6
0.5
0.5
2.0
1.0
1.5
0.5
5.8
9.3
0.5
0.5
2.0
1.0
1.5
0.5
5.7 ns
9.1 ns
13.1 ns
9.9 ns
16.9 ns
8.8 ns
delay
nBn to nAn
disable time nOE to nAn
nOE to nBn
13.1
10.8
16.9
12.7
13.1
10.6
16.9
11.0
13.1
9.0
enable time nOE to nAn
nOE to nBn
16.9
9.3
VCC(A) = 1.4 V to 1.6 V
tpd
tdis
ten
propagation nAn to nBn
delay
0.5
0.5
2.0
1.5
1.5
1.0
9.8
7.9
0.5
0.5
2.0
1.5
1.5
1.0
7.1
7.1
0.5
0.5
2.0
1.5
1.5
1.0
6.0
6.8
0.5
0.5
2.0
1.0
1.5
0.5
4.8
6.4
0.5
0.5
2.0
1.0
1.5
0.5
4.3 ns
6.3 ns
9.9 ns
6.6 ns
11.3 ns
5.9 ns
nBn to nAn
disable time nOE to nAn
nOE to nBn
9.9
9.9
9.9
9.9
12.9
11.4
15.8
9.9
8.6
7.1
enable time nOE to nAn
nOE to nBn
11.4
11.4
11.4
9.3
11.3
6.8
VCC(A) = 1.65 V to 1.95 V
tpd
tdis
ten
propagation nAn to nBn
delay
0.5
0.5
2.0
1.5
1.0
0.5
9.6
6.9
0.5
0.5
2.0
1.5
1.0
0.5
6.8
6.0
0.5
0.5
2.0
1.5
1.0
0.5
5.5
5.5
8.2
8.2
8.7
8.7
0.5
0.5
2.0
1.0
1.0
0.5
4.3
5.2
8.2
6.4
8.7
6.3
0.5
0.5
2.0
1.0
1.0
0.5
3.9 ns
5.1 ns
8.2 ns
6.2 ns
8.7 ns
5.3 ns
nBn to nAn
disable time nOE to nAn
nOE to nBn
8.2
8.2
12.5
9.0
9.6
enable time nOE to nAn
nOE to nBn
9.0
15.2
11.0
VCC(A) = 2.3 V to 2.7 V
tpd
tdis
ten
propagation nAn to nBn
delay
0.5
0.5
1.1
1.2
0.5
0.5
9.3
5.8
0.5
0.5
1.1
1.2
0.5
0.5
6.4
4.8
0.5
0.5
1.1
1.2
0.5
0.5
5.2
4.3
5.8
7.6
5.9
8.4
0.5
0.5
1.1
1.0
0.5
0.5
3.9
3.9
5.8
5.9
5.8
5.9
0.5
0.5
1.1
1.0
0.5
0.5
3.3 ns
3.8 ns
5.8 ns
5.8 ns
5.8 ns
4.8 ns
nBn to nAn
disable time nOE to nAn
nOE to nBn
5.8
5.8
11.9
6.0
9.1
enable time nOE to nAn
nOE to nBn
6.0
14.7
10.6
VCC(A) = 3.0 V to 3.6 V
tpd
tdis
ten
propagation nAn to nBn
delay
0.5
0.5
0.8
1.2
0.5
1.0
9.1
5.7
0.5
0.5
0.8
1.2
0.5
1.0
6.3
4.3
0.5
0.5
0.8
1.2
0.5
0.5
5.1
3.9
5.5
7.4
4.8
8.3
0.5
0.5
0.8
1.0
0.5
0.5
3.8
3.3
5.5
5.7
4.7
5.7
0.5
0.5
0.8
0.8
0.5
0.5
3.2 ns
3.2 ns
5.5 ns
5.5 ns
4.6 ns
4.6 ns
nBn to nAn
disable time nOE to nAn
nOE to nBn
5.5
5.5
11.6
4.9
9.0
enable time nOE to nAn
nOE to nBn
4.9
14.5
10.6
[1] tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH
.
©
74AVCH20T245
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 6 — 14 January 2019
13 / 23
Nexperia
74AVCH20T245
20-bit dual supply translating transceiver with configurable voltage translation; 3-state
10.1. Waveforms and test circuit
V
I
nAn, nBn input
GND
V
M
t
t
PLH
PHL
V
OH
nBn, nAn output
V
M
V
OL
001aak285
Measurement points are given in Table 14.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 4. The data input (nAn, nBn) to output (nBn, nAn) propagation delay times
V
I
V
nOE input
M
GND
t
t
PZL
PLZ
V
CCO
output
LOW-to-OFF
OFF-to-LOW
V
M
V
X
V
OL
t
t
PZH
PHZ
V
OH
V
Y
output
HIGH-to-OFF
OFF-to-HIGH
V
M
GND
outputs
enabled
outputs
disabled
outputs
enabled
001aak286
Measurement points are given in Table 14.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 5. Enable and disable times
Table 14. Measurement points
Supply voltage
VCC(A), VCC(B)
0.8 V to 1.6 V
1.65 V to 2.7 V
3.0 V to 3.6 V
Input [1]
Output [2]
VM
VM
VX
VOL + 0.1 V
VY
0.5VCCI
0.5VCCI
0.5VCCI
0.5VCCO
0.5VCCO
0.5VCCO
VOH - 0.1 V
VOH - 0.15 V
VOH - 0.3 V
VOL + 0.15 V
VOL + 0.3 V
[1] VCCI is the supply voltage associated with the data input port.
[2] VCCO is the supply voltage associated with the output port.
©
74AVCH20T245
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 6 — 14 January 2019
14 / 23
Nexperia
74AVCH20T245
20-bit dual supply translating transceiver with configurable voltage translation; 3-state
t
W
V
I
90 %
negative
pulse
V
V
V
M
M
10 %
0 V
t
t
r
f
t
t
f
r
V
I
90 %
positive
pulse
V
M
M
10 %
0 V
t
W
V
EXT
R
V
CC
L
V
V
O
I
G
DUT
R
T
C
L
R
L
001aae331
Test data is given in Table 15.
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance.
VEXT = External voltage for measuring switching times.
Fig. 6. Test circuit for measuring switching times
Table 15. Test data
Supply voltage
VCC(A), VCC(B)
0.8 V to 1.6 V
1.65 V to 2.7 V
3.0 V to 3.6 V
Input
VI [1]
VCCI
VCCI
VCCI
Load
CL
VEXT
Δt/ΔV [2]
≤ 1.0 ns/V
≤ 1.0 ns/V
≤ 1.0 ns/V
RL
tPLH, tPHL
open
tPZH, tPHZ
GND
tPZL, tPLZ [3]
2VCCO
15 pF
15 pF
15 pF
2 kΩ
2 kΩ
2 kΩ
open
GND
2VCCO
open
GND
2VCCO
[1] VCCI is the supply voltage associated with the data input port.
[2] dV/dt ≥ 1.0 V/ns
[3] VCCO is the supply voltage associated with the output port.
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74AVCH20T245
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Product data sheet
Rev. 6 — 14 January 2019
15 / 23
Nexperia
74AVCH20T245
20-bit dual supply translating transceiver with configurable voltage translation; 3-state
11. Typical propagation delay characteristics
001aai476
001aai477
24
21
(1)
(2)
(3)
(4)
(5)
(6)
t
pd
(ns)
t
pd
(ns)
(1)
20
17
16
12
8
13
(2)
(3)
(4)
(5)
(6)
4
9
0
20
40
60
0
20
40
60
C
L
(pF)
C (pF)
L
a. Propagation delay (nAn to nBn); VCC(A) = 0.8 V
b. Propagation delay (nAn to nBn); VCC(B) = 0.8 V
(1) VCC(B) = 0.8 V
(2) VCC(B) = 1.2 V
(3) VCC(B) = 1.5 V
(4) VCC(B) = 1.8 V
(5) VCC(B) = 2.5 V
(6) VCC(B) = 3.3 V
(1) VCC(A) = 0.8 V
(2) VCC(A) = 1.2 V
(3) VCC(A) = 1.5 V
(4) VCC(A) = 1.8 V
(5) VCC(A) = 2.5 V
(6) VCC(A) = 3.3 V
Fig. 7. Typical propagation delay versus load capacitance; Tamb = 25 °C
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74AVCH20T245
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Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 6 — 14 January 2019
16 / 23
Nexperia
74AVCH20T245
20-bit dual supply translating transceiver with configurable voltage translation; 3-state
001aai478
001aai491
7
7
5
3
1
(1)
t
t
PLH
(ns)
PHL
(ns)
(1)
(2)
(3)
5
3
1
(2)
(3)
(4)
(5)
(4)
(5)
0
20
40
60
0
20
40
60
C
L
(pF)
C (pF)
L
a. LOW to HIGH propagation delay (nAn to nBn);
VCC(A) = 1.2 V
b. HIGH to LOW propagation delay (nAn to nBn);
VCC(A) = 1.2 V
001aai479
001aai480
7
7
(1)
t
t
PLH
(ns)
PHL
(ns)
(1)
5
3
1
5
3
1
(2)
(3)
(2)
(3)
(4)
(5)
(4)
(5)
0
20
40
60
0
20
40
60
C
L
(pF)
C
L
(pF)
c. LOW to HIGH propagation delay (nAn to nBn);
VCC(A) = 1.5 V
d. HIGH to LOW propagation delay (nAn to nBn);
VCC(A) = 1.5 V
(1) VCC(B) = 1.2 V
(2) VCC(B) = 1.5 V
(3) VCC(B) = 1.8 V
(4) VCC(B) = 2.5 V
(5) VCC(B) = 3.3 V
Fig. 8. Typical propagation delay versus load capacitance; Tamb = 25 °C
©
74AVCH20T245
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 6 — 14 January 2019
17 / 23
Nexperia
74AVCH20T245
20-bit dual supply translating transceiver with configurable voltage translation; 3-state
001aai481
001aai482
7
7
5
3
1
(1)
t
t
PLH
(ns)
PHL
(ns)
(1)
5
3
1
(2)
(3)
(2)
(3)
(4)
(5)
(4)
(5)
0
20
40
60
0
20
40
60
C
L
(pF)
C (pF)
L
a. LOW to HIGH propagation delay (nAn to nBn);
VCC(A) = 1.8 V
b. HIGH to LOW propagation delay (nAn to nBn);
VCC(A) = 1.8 V
001aai483
001aai486
7
7
t
t
PLH
(ns)
PHL
(ns)
(1)
(1)
5
3
1
5
3
1
(2)
(3)
(2)
(3)
(4)
(5)
(4)
(5)
0
20
40
60
0
20
40
60
C
L
(pF)
C
L
(pF)
c. LOW to HIGH propagation delay (nAn to nBn);
VCC(A) = 2.5 V
d. HIGH to LOW propagation delay (nAn to nBn);
VCC(A) = 2.5 V
(1) VCC(B) = 1.2 V
(2) VCC(B) = 1.5 V
(3) VCC(B) = 1.8 V
(4) VCC(B) = 2.5 V
(5) VCC(B) = 3.3 V
Fig. 9. Typical propagation delay versus load capacitance; Tamb = 25 °C
©
74AVCH20T245
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 6 — 14 January 2019
18 / 23
Nexperia
74AVCH20T245
20-bit dual supply translating transceiver with configurable voltage translation; 3-state
001aai485
001aai484
7
7
5
3
1
t
t
PLH
(ns)
PHL
(ns)
(1)
(1)
5
3
1
(2)
(3)
(2)
(3)
(4)
(5)
(4)
(5)
0
20
40
60
0
20
40
60
C
L
(pF)
C (pF)
L
a. LOW to HIGH propagation delay (nAn to nBn);
VCC(A) = 3.3 V
b. HIGH to LOW propagation delay (nAn to nBn);
VCC(A) = 3.3 V
(1) VCC(B) = 1.2 V
(2) VCC(B) = 1.5 V
(3) VCC(B) = 1.8 V
(4) VCC(B) = 2.5 V
(5) VCC(B) = 3.3 V
Fig. 10. Typical propagation delay versus load capacitance; Tamb = 25 °C
©
74AVCH20T245
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 6 — 14 January 2019
19 / 23
Nexperia
74AVCH20T245
20-bit dual supply translating transceiver with configurable voltage translation; 3-state
12. Package outline
TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1 mm
SOT364-1
E
D
A
X
c
H
v
M
A
y
E
Z
56
29
Q
A
2
(A )
3
A
A
1
pin 1 index
θ
L
p
L
detail X
1
28
w
M
b
e
p
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions).
A
(1)
(2)
UNIT
A
A
A
b
c
D
E
e
H
E
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
max.
8o
0o
0.15
0.05
1.05
0.85
0.28
0.17
0.2
0.1
14.1
13.9
6.2
6.0
8.3
7.9
0.8
0.4
0.50
0.35
0.5
0.1
mm
1.2
0.5
1
0.25
0.08
0.1
0.25
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT364-1
MO-153
Fig. 11. Package outline SOT364-1 (TSSOP56)
©
74AVCH20T245
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 6 — 14 January 2019
20 / 23
Nexperia
74AVCH20T245
20-bit dual supply translating transceiver with configurable voltage translation; 3-state
13. Abbreviations
Table 16. Abbreviations
Acronym
CDM
Description
Charged Device Model
Complementary Metal Oxide Semiconductor
Device Under Test
CMOS
DUT
ESD
ElectroStatic Discharge
Human Body Model
HBM
MM
Machine Model
14. Revision history
Table 17. Revision history
Document ID
Release date
20190114
Data sheet status
Change notice
Supersedes
74AVCH20T245 v.6
Modifications:
Product data sheet
-
74AVCH20T245 v.5
•
The format of this data sheet has been redesigned to comply with the identity guidelines of
Nexperia.
•
•
Legal texts have been adapted to the new company name where appropriate.
Type numbers 74AVCH20T245DGV and 74AVCH20T245BX removed.
74AVCH20T245 v.5
Modifications:
20160223
Product data sheet
-
74AVCH20T245 v.4
•
General description updated.
74AVCH20T245 v.4
Modifications:
20111214
Product data sheet
-
74AVCH20T245 v.3
•
Legal pages updated.
74AVCH20T245 v.3
74AVCH20T245 v.2
74AVCH20T245 v.1
20110623
20100315
20100113
Product data sheet
Product data sheet
Product data sheet
-
-
-
74AVCH20T245 v.2
74AVCH20T245 v.1
-
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Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 6 — 14 January 2019
21 / 23
Nexperia
74AVCH20T245
20-bit dual supply translating transceiver with configurable voltage translation; 3-state
injury, death or severe property or environmental damage. Nexperia and its
suppliers accept no liability for inclusion and/or use of Nexperia products in
such equipment or applications and therefore such inclusion and/or use is at
the customer’s own risk.
15. Legal information
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Data sheet status
Document status Product
Definition
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
[1][2]
status [3]
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability for
any assistance with applications or customer product design. It is customer’s
sole responsibility to determine whether the Nexperia product is suitable
and fit for the customer’s applications and products planned, as well as
for the planned application and use of customer’s third party customer(s).
Customers should provide appropriate design and operating safeguards to
minimize the risks associated with their applications and products.
Preliminary [short]
data sheet
Qualification
Production
This document contains data from
the preliminary specification.
Product [short]
data sheet
This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for the
customer’s applications and products using Nexperia products in order to
avoid a default of the applications and the products or of the application or
use by customer’s third party customer(s). Nexperia does not accept any
liability in this respect.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.
Definitions
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the relevant
full data sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of commercial sale — Nexperia products are
sold subject to the general terms and conditions of commercial sale, as
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in a valid written individual agreement. In case an individual agreement is
concluded only the terms and conditions of the respective agreement shall
apply. Nexperia hereby expressly objects to applying the customer’s general
terms and conditions with regard to the purchase of Nexperia products by
customer.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
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or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
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Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no responsibility
for the content in this document if provided by an information source outside
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Non-automotive qualified products — Unless this data sheet expressly
states that this specific Nexperia product is automotive qualified, the
product is not suitable for automotive use. It is neither qualified nor tested in
accordance with automotive testing or application requirements. Nexperia
accepts no liability for inclusion and/or use of non-automotive qualified
products in automotive equipment or applications.
In no event shall Nexperia be liable for any indirect, incidental, punitive,
special or consequential damages (including - without limitation - lost
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or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
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In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards,
customer (a) shall use the product without Nexperia’s warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
Nexperia’s specifications such use shall be solely at customer’s own risk,
and (c) customer fully indemnifies Nexperia for any liability, damages or failed
product claims resulting from customer design and use of the product for
automotive applications beyond Nexperia’s standard warranty and Nexperia’s
product specifications.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards customer
for the products described herein shall be limited in accordance with the
Terms and conditions of commercial sale of Nexperia.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Right to make changes — Nexperia reserves the right to make changes
to information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Trademarks
Suitability for use — Nexperia products are not designed, authorized or
warranted to be suitable for use in life support, life-critical or safety-critical
systems or equipment, nor in applications where failure or malfunction
of an Nexperia product can reasonably be expected to result in personal
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
©
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Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 6 — 14 January 2019
22 / 23
Nexperia
74AVCH20T245
20-bit dual supply translating transceiver with configurable voltage translation; 3-state
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Ordering information....................................................2
4. Functional diagram.......................................................2
5. Pinning information......................................................4
5.1. Pinning.........................................................................4
5.2. Pin description.............................................................5
6. Functional description................................................. 5
7. Limiting values............................................................. 6
8. Recommended operating conditions..........................6
9. Static characteristics....................................................7
10. Dynamic characteristics.......................................... 11
10.1. Waveforms and test circuit...................................... 14
11. Typical propagation delay characteristics..............16
12. Package outline........................................................ 20
13. Abbreviations............................................................21
14. Revision history........................................................21
15. Legal information......................................................22
© Nexperia B.V. 2019. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 14 January 2019
©
74AVCH20T245
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 6 — 14 January 2019
23 / 23
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