74AVC4T245-Q100 [NEXPERIA]
4-bit dual supply translating transceiver with configurable voltage translation 3-state;型号: | 74AVC4T245-Q100 |
厂家: | Nexperia |
描述: | 4-bit dual supply translating transceiver with configurable voltage translation 3-state |
文件: | 总25页 (文件大小:350K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
74AVC4T245-Q100
4-bit dual supply translating transceiver with configurable
voltage translation; 3-state
Rev. 4 — 13 June 2019
Product data sheet
1. General description
The 74AVC4T245-Q100 is an 4-bit, dual supply transceiver that enables bidirectional level
translation. The device can be used as two 2-bit transceivers or as a 4-bit transceiver. It features
four 2-bit input-output ports (nAn and nBn), a direction control input (nDIR), a output enable
input (nOE) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied
at any voltage between 0.8 V and 3.6 V making the device suitable for translating between
any of the low voltage nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V). Pins nAn, nOE and
nDIR are referenced to VCC(A) and pins nBn are referenced to VCC(B). A HIGH on nDIR allows
transmission from nAn to nBn and a LOW on nDIR allows transmission from nBn to nAn. The
output enable input (nOE) can be used to disable the outputs so the buses are effectively isolated.
The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry
disables the output, preventing any damaging backflow current through the device when it is
powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both nAn and nBn
are in the high-impedance OFF-state.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100
(Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
•
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Wide supply voltage range:
•
•
•
•
•
VCC(A): 0.8 V to 3.6 V
VCC(B): 0.8 V to 3.6 V
Complies with JEDEC standards:
•
•
•
•
•
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
•
•
ESD protection:
•
•
•
MIL-STD-883, method 3015 Class 3B exceeds 8000 V
HBM JESD22-A114E Class 3B exceeds 8000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF; R = 0 Ω)
Maximum data rates:
•
•
•
•
•
•
380 Mbit/s (≥ 1.8 V to 3.3 V translation)
200 Mbit/s (≥ 1.1 V to 3.3 V translation)
200 Mbit/s (≥ 1.1 V to 2.5 V translation)
200 Mbit/s (≥ 1.1 V to 1.8 V translation)
150 Mbit/s (≥ 1.1 V to 1.5 V translation)
100 Mbit/s (≥ 1.1 V to 1.2 V translation)
•
•
•
•
•
Suspend mode
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
IOFF circuitry provides partial Power-down mode operation
Multiple package options
Nexperia
74AVC4T245-Q100
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
Version
74AVC4T245D-Q100 -40 °C to +125 °C
74AVC4T245PW-Q100 -40 °C to +125 °C
74AVC4T245BQ-Q100 -40 °C to +125 °C
SO16
plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
TSSOP16
plastic thin shrink small outline package; 16 leads; SOT403-1
body width 4.4 mm
DHVQFN16 plastic dual in-line compatible thermal
enhanced very thin quad flat package; no leads;
16 terminals; body 2.5 x 3.5 x 0.85 mm
SOT763-1
74AVC4T245GU-Q100 -40 °C to +125 °C
XQFN16
plastic, extremely thin quad flat
package; no leads; 16 terminals;
body 1.80 x 2.60 x 0.50 mm
SOT1161-1
4. Marking
Table 2. Marking codes
Type number
Marking code
74AVC4T245D
VC4T245
C4T245
74AVC4T245D-Q100
74AVC4T245PW-Q100
74AVC4T245BQ-Q100
74AVC4T245GU-Q100
BT5
5. Functional diagram
13
1B1
12
1B2
11
2B1
10
2B2
V
V
CC(B)
CC(A)
1OE
2OE
15
2
14
3
1DIR
2DIR
1A1
4
1A2
2A1
2A2
001aak280
5
6
7
Pin numbers are shown for SO16, TSSOP16 and DHVQFN16 packages only.
Fig. 1. Logic symbol
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74AVC4T245_Q100
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Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 4 — 13 June 2019
2 / 25
Nexperia
74AVC4T245-Q100
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
DIR
OE
A1
B1
A2
B2
V
V
CC(B)
CC(A)
001aak281
Fig. 2. Logic diagram (one 2-bit transceiver)
6. Pinning information
6.1. Pinning
74AVC4T245
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
V
CC(B)
CC(A)
1DIR
1OE
2OE
1B1
1B2
2B1
2B2
GND
74AVC4T245
2DIR
1A1
1A2
2A1
2A2
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
V
CC(B)
CC(A)
1DIR
1OE
2OE
1B1
1B2
2B1
2B2
GND
2DIR
1A1
1A2
2A1
2A2
GND
001aak283
001aak282
Fig. 3. Pin configuration SOT109-1 (SO16)
Fig. 4. Pin configuration SOT403-1 (TSSOP16)
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74AVC4T245_Q100
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Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 4 — 13 June 2019
3 / 25
Nexperia
74AVC4T245-Q100
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
74AVC4T245
terminal 1
index area
74AVC4T245
terminal 1
index area
2
3
4
5
6
7
15
14
13
12
11
10
1DIR
2DIR
1A1
1A2
2A1
2A2
1OE
2OE
1B1
1B2
2B1
2B2
1OE
1
2
3
4
12 2B2
11 GND
10 GND
V
V
CC(B)
(1)
GND
CC(A)
1DIR
9
2A2
001aak284
Transparent top view
(1) This is not a ground pin. There is no electrical or
mechanical requirement to solder the pad. In case
soldered, the solder land should remain floating or
connected to GND
001aan188
Transparent top view
Fig. 5. Pin configuration SOT763-1 (DHVQFN16)
Fig. 6. Pin configuration SOT1161-1 (XQFN16)
6.2. Pin description
Table 3. Pin description
Symbol
Pin
Description
SOT109-1, SOT403-1
and SOT763-1
SOT1161-1
VCC(A)
1
3
supply voltage A (nAn, nOE and nDIR inputs are
referenced to VCC(A)
)
1DIR, 2DIR
1A1, 1A2
2A1, 2A2
GND[1]
2, 3
4, 5
direction control
4, 5
6, 7
data input or output
data input or output
ground (0 V)
6, 7
8, 9
8, 9
10, 11
12, 13
14, 15
16, 1
2
2B2, 2B1
1B2, 1B1
2OE, 1OE
VCC(B)
10, 11
12, 13
14, 15
16
data input or output
data input or output
output enable input (active LOW)
supply voltage B (nBn inputs are referenced to VCC(B)
)
[1] All GND pins must be connected to ground (0 V).
©
74AVC4T245_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 4 — 13 June 2019
4 / 25
Nexperia
74AVC4T245-Q100
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
7. Functional description
Table 4. Function table
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
Supply voltage
VCC(A), VCC(B)
0.8 V to 3.6 V
0.8 V to 3.6 V
0.8 V to 3.6 V
GND[1]
Input
Input/output[1]
nOE[2]
nDIR[2]
nAn[2]
nBn[2]
L
L
nAn = nBn
input
L
H
X
X
input
Z
nBn = nAn
H
X
Z
Z
Z
[1] If at least one of VCC(A) or VCC(B) is at GND level, the device goes into suspend mode.
[2] The nAn, nDIR and nOE input circuit is referenced to VCC(A); The nBn input circuit is referenced to VCC(B)
.
8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
VCC(A)
VCC(B)
IIK
Parameter
Conditions
Min
-0.5
-0.5
-50
-0.5
-50
-0.5
-0.5
-
Max
Unit
V
supply voltage A
supply voltage B
input clamping current
input voltage
+4.6
+4.6
V
VI < 0 V
-
+4.6
-
mA
V
VI
[1]
IOK
output clamping current
output voltage
VO < 0 V
mA
V
VO
Active mode
[1][2][3]
[1]
VCCO + 0.5
+4.6
±50
Suspend or 3-state mode
VO = 0 V to VCCO
per VCC(A) or VCC(B) pin
per GND pin
V
IO
output current
[2]
mA
mA
mA
°C
ICC
IGND
Tstg
Ptot
supply current
-
100
ground current
-100
-65
-
storage temperature
total power dissipation
+150
Tamb = -40 °C to +125 °C
SO16, TSSOP16 and
DHVQFN16
[4]
-
-
500
250
mW
mW
XQFN16
[1] The minimum input voltage ratings and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] VCCO is the supply voltage associated with the output port.
[3] VCCO + 0.5 V should not exceed 4.6 V.
[4] For SOT109-1 package: above 110 °C derates linearly with 12.4 mW/K.
For SOT403-1 package: above 91 °C the value of Ptot derates linearly at 8.5 mW/K.
For SOT763-1 package: above 106 °C the value of Ptot derates linearly at 11.2 mW/K.
©
74AVC4T245_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 4 — 13 June 2019
5 / 25
Nexperia
74AVC4T245-Q100
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
9. Recommended operating conditions
Table 6. Recommended operating conditions
Symbol
VCC(A)
VCC(B)
VI
Parameter
Conditions
Min
0.8
0.8
0
Max
3.6
Unit
V
supply voltage A
supply voltage B
input voltage
3.6
V
3.6
V
VO
output voltage
Active mode
[1]
[2]
0
VCCO
3.6
V
Suspend or 3-state mode
0
V
Tamb
ambient temperature
-40
-
+125
5
°C
ns/V
Δt/ΔV
input transition rise and fall rate
VCCI =0.8 V to 3.6 V
[1] VCCO is the supply voltage associated with the output port.
[2] VCCI is the supply voltage associated with the input port.
10. Static characteristics
Table 7. Typical static characteristics at Tamb = 25 °C
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).[1][2]
Symbol Parameter Conditions
VOH HIGH-level output voltage VI = VIH or VIL
IO = -1.5 mA; VCC(A) = VCC(B) = 0.8 V
LOW-level output voltage VI = VIH or VIL
IO = 1.5 mA; VCC(A) = VCC(B) = 0.8 V
Min
Typ
Max Unit
-
0.69
0.07
-
-
V
V
VOL
-
-
II
input leakage current
nDIR, nOE input; VI = 0 V or 3.6 V;
VCC(A) = VCC(B) = 0.8 V to 3.6 V
±0.025 ±0.25 μA
IOZ
OFF-state output current
A or B port; VO = 0 V or VCCO
VCC(A) = VCC(B) = 3.6 V
;
[3]
[3]
[3]
-
-
-
-
-
-
-
±0.5
±0.5
±0.5
±0.1
±0.1
1.0
±2.5 μA
±2.5 μA
±2.5 μA
±1 μA
±1 μA
suspend mode A port; VO = 0 V or VCCO
VCC(A) = 3.6 V; VCC(B) = 0 V
;
;
suspend mode B port; VO = 0 V or VCCO
VCC(A) = 0 V; VCC(B) = 3.6 V
IOFF
power-off leakage current A port; VI or VO = 0 V to 3.6 V; VCC(A) = 0 V;
VCC(B) = 0.8 V to 3.6 V
B port; VI or VO = 0 V to 3.6 V; VCC(B) = 0 V;
VCC(A) = 0.8 V to 3.6 V
CI
input capacitance
nDIR, nOE input; VI = 0 V or 3.3 V;
VCC(A) = VCC(B) = 3.3 V
-
-
pF
pF
CI/O
input/output capacitance
A and B port; VO = 3.3 V or 0 V;
VCC(A) = VCC(B) = 3.3 V
4.0
[1] VCCO is the supply voltage associated with the output port.
[2] VCCI is the supply voltage associated with the data input port.
[3] For I/O ports, the parameter IOZ includes the input leakage current.
©
74AVC4T245_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 4 — 13 June 2019
6 / 25
Nexperia
74AVC4T245-Q100
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
Table 8. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).[1][2]
Symbol Parameter
Conditions
-40 °C to +85 °C
-40 °C to +125 °C
Unit
Min
Max
Min
Max
VIH
HIGH-level
data input
input voltage
VCCI = 0.8 V
0.70VCCI
0.65VCCI
1.6
-
-
-
-
0.70VCCI
0.65VCCI
1.6
-
-
-
-
V
VCCI = 1.1 V to 1.95 V
VCCI = 2.3 V to 2.7 V
VCCI = 3.0 V to 3.6 V
nDIR, nOE input
V
V
V
2
2
VCC(A) = 0.8 V
0.70VCC(A)
-
-
-
-
0.70VCC(A)
-
-
-
-
V
V
V
V
VCC(A) = 1.1 V to 1.95 V
VCC(A) = 2.3 V to 2.7 V
VCC(A) = 3.0 V to 3.6 V
data input
0.65VCC(A)
0.65VCC(A)
1.6
2
1.6
2
VIL
LOW-level
input voltage
VCCI = 0.8 V
-
-
-
-
0.30VCCI
0.35VCCI
0.7
-
-
-
-
0.30VCCI
0.35VCCI
0.7
V
V
V
V
VCCI = 1.1 V to 1.95 V
VCCI = 2.3 V to 2.7 V
VCCI = 3.0 V to 3.6 V
nDIR, nOE input
0.8
0.8
VCC(A) = 0.8 V
-
-
-
-
0.30VCC(A)
0.35VCC(A)
0.7
-
-
-
-
0.30VCC(A)
0.35VCC(A)
0.7
V
V
V
V
VCC(A) = 1.1 V to 1.95 V
VCC(A) = 2.3 V to 2.7 V
VCC(A) = 3.0 V to 3.6 V
VI = VIH or VIL
0.8
0.8
VOH
VOL
II
HIGH-level
output voltage
IO = -100 μA;
VCC(A) = VCC(B) = 0.8 V to 3.6 V
VCCO - 0.1
-
VCCO - 0.1
-
V
IO = -3 mA; VCC(A) = VCC(B) = 1.1 V
IO = -6 mA; VCC(A) = VCC(B) = 1.4 V
IO = -8 mA; VCC(A) = VCC(B) = 1.65 V
IO = -9 mA; VCC(A) = VCC(B) = 2.3 V
IO = -12 mA; VCC(A) = VCC(B) = 3.0 V
VI = VIH or VIL
0.85
1.05
1.2
-
-
-
-
-
0.85
1.05
1.2
-
-
-
-
-
V
V
V
V
V
1.75
2.3
1.75
2.3
LOW-level
output voltage
IO = 100 μA;
VCC(A) = VCC(B) = 0.8 V to 3.6 V
-
0.1
-
0.1
V
IO = 3 mA; VCC(A) = VCC(B) = 1.1 V
IO = 6 mA; VCC(A) = VCC(B) = 1.4 V
IO = 8 mA; VCC(A) = VCC(B) = 1.65 V
IO = 9 mA; VCC(A) = VCC(B) = 2.3 V
IO = 12 mA; VCC(A) = VCC(B) = 3.0 V
-
-
-
-
-
-
0.25
0.35
0.45
0.55
0.7
-
-
-
-
-
-
0.25
0.35
0.45
0.55
0.7
V
V
V
V
V
input leakage nDIR, nOE input; VI = 0 V or 3.6 V;
current VCC(A) = VCC(B) = 0.8 V to 3.6 V
±1
±5
μA
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74AVC4T245_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 4 — 13 June 2019
7 / 25
Nexperia
74AVC4T245-Q100
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
Symbol Parameter
Conditions
-40 °C to +85 °C
-40 °C to +125 °C
Unit
Min
Max
Min
Max
IOZ
OFF-state
output current VCC(A) = VCC(B) = 3.6 V
A or B port; VO = 0 V or VCCO
;
[3]
[3]
-
±5
-
±30
μA
μA
suspend mode A port;
VO = 0 V or VCCO; VCC(A) = 3.6 V;
VCC(B) = 0 V
-
-
±5
±5
-
-
±30
±30
suspend mode B port;
VO = 0 V or VCCO; VCC(A) = 0 V;
VCC(B) = 3.6 V
[3]
μA
IOFF
power-off
leakage
current
A port; VI or VO = 0 V to 3.6 V;
VCC(A) = 0 V; VCC(B) = 0.8 V to 3.6 V
-
-
±5
±5
-
-
±30
±30
μA
μA
B port; VI or VO = 0 V to 3.6 V;
VCC(B) = 0 V; VCC(A) = 0.8 V to 3.6 V
ICC
supply current A port; VI = 0 V or VCCI; IO = 0 A
VCC(A) = 0.8 V to 3.6 V;
VCC(B) = 0.8 V to 3.6 V
-
-
10
8
-
-
55
50
μA
μA
VCC(A) = 1.1 V to 3.6 V;
VCC(B) = 1.1 V to 3.6 V
VCC(A) = 3.6 V; VCC(B) = 0 V
VCC(A) = 0 V; VCC(B) = 3.6 V
B port; VI = 0 V or VCCI; IO = 0 A
-
8
-
-
50
-
μA
μA
-2
-12
VCC(A) = 0.8 V to 3.6 V;
VCC(B) = 0.8 V to 3.6 V
-
-
10
8
-
-
55
50
μA
μA
VCC(A) = 1.1 V to 3.6 V;
VCC(B) = 1.1 V to 3.6 V
VCC(A) = 3.6 V; VCC(B) = 0 V
VCC(A) = 0 V; VCC(B) = 3.6 V
-2
-
-
-12
-
μA
μA
μA
8
-
-
50
70
A plus B port (ICC(A) + ICC(B)); IO = 0 A;
VI = 0 V or VCCI; VCC(A) = 0.8 V to 3.6 V;
VCC(B) = 0.8 V to 3.6 V
-
20
A plus B port (ICC(A) + ICC(B)); IO = 0 A;
VI = 0 V or VCCI; VCC(A) = 1.1 V to 3.6 V;
VCC(B) = 1.1 V to 3.6 V
-
16
-
65
μA
[1] VCCO is the supply voltage associated with the output port.
[2] VCCI is the supply voltage associated with the data input port.
[3] For I/O ports, the parameter IOZ includes the input leakage current.
Table 9. Typical total supply current (ICC(A) + ICC(B)
)
VCC(A)
VCC(B)
0 V
0
Unit
0.8 V
0.1
0.1
0.1
0.1
0.1
0.3
1.6
1.2 V
0.1
0.1
0.1
0.1
0.1
0.1
0.8
1.5 V
0.1
0.1
0.1
0.1
0.1
0.1
0.4
1.8 V
2.5 V
3.3 V
0.1
1.6
0.8
0.4
0.2
0.1
0.1
0 V
0.1
0.1
0.1
0.1
0.1
0.1
0.2
0.1
0.3
0.1
0.1
0.1
0.1
0.1
μA
μA
μA
μA
μA
μA
μA
0.8 V
1.2 V
1.5 V
1.8 V
2.5 V
3.3 V
0.1
0.1
0.1
0.1
0.1
0.1
©
74AVC4T245_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 4 — 13 June 2019
8 / 25
Nexperia
74AVC4T245-Q100
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
11. Dynamic characteristics
Table 10. Typical power dissipation capacitance at VCC(A) = VCC(B) and Tamb = 25 °C
Voltages are referenced to GND (ground = 0 V).[1][2]
Symbol Parameter Conditions
VCC(A) = VCC(B)
Unit
0.8 V
1.2 V
1.5 V
1.8 V
2.5 V
3.3 V
CPD
power
A port: (direction nAn to nBn);
0.2
0.2
0.2
0.2
0.3
0.4
pF
pF
dissipation output enabled
capacitance
A port: (direction nAn to nBn);
output disabled
0.2
9.5
0.6
9.5
0.6
0.2
0.2
0.2
9.7
0.6
9.7
0.6
0.2
0.2
0.2
9.8
0.6
9.8
0.6
0.2
0.2
0.2
9.9
0.6
9.9
0.6
0.2
0.2
0.3
10.7
0.7
0.4
A port: (direction nBn to nAn);
output enabled
11.9 pF
0.7 pF
11.9 pF
A port: (direction nBn to nAn);
output disabled
B port: (direction nAn to nBn);
output enabled
10.7
0.7
B port: (direction nAn to nBn);
output disabled
0.7
0.4
0.4
pF
pF
pF
B port: (direction nBn to nAn);
output enabled
0.3
B port: (direction nBn to nAn);
output disabled
0.3
[1] CPD is used to determine the dynamic power dissipation (PD in μW).
PD = CPD x VCC2 x fi x N + Σ(CL × VCC2 x fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ(CL x VCC2 x fo) = sum of the outputs.
[2] fi = 10 MHz; VI = GND to VCC; tr = tf = 1 ns; CL = 0 pF; RL = ∞ Ω.
©
74AVC4T245_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 4 — 13 June 2019
9 / 25
Nexperia
74AVC4T245-Q100
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
Table 11. Typical dynamic characteristics at VCC(A) = 0.8 V and Tamb = 25 °C
Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 9; for waveforms see Fig. 7 and Fig. 8.[1]
Symbol Parameter
Conditions
VCC(B)
1.5 V
Unit
0.8 V
14.5
14.5
14.3
17.0
18.2
19.2
1.2 V
7.3
1.8 V
6.2
2.5 V
5.9
3.3 V
6.0
tpd
tdis
ten
propagation delay nAn to nBn
nBn to nAn
6.5
12.4
14.3
9.0
ns
ns
ns
ns
ns
ns
12.7
14.3
9.9
12.3
14.3
9.4
12.1
14.3
9.0
12.0
14.3
9.7
disable time
nOE to nAn
nOE to nBn
nOE to nAn
nOE to nBn
enable time
18.2
10.7
18.2
9.8
18.2
9.6
18.2
9.7
18.2
10.2
[1] tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH
.
Table 12. Typical dynamic characteristics at VCC(B) = 0.8 V and Tamb = 25 °C
Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 9; for waveforms see Fig. 7 and Fig. 8.[1]
Symbol Parameter Conditions VCC(A)
1.5 V
Unit
0.8 V
14.5
14.5
14.3
17.0
18.2
19.2
1.2 V
12.7
7.3
1.8 V
12.3
6.2
2.5 V
12.1
5.9
3.3 V
12.0
6.0
tpd
tdis
ten
propagation delay nAn to nBn
nBn to nAn
12.4
6.5
ns
ns
ns
ns
ns
ns
disable time
nOE to nAn
nOE to nBn
nOE to nAn
nOE to nBn
5.5
4.1
4.0
3.0
3.5
13.8
5.6
13.4
4.0
13.1
3.2
12.9
2.4
12.7
2.2
enable time
14.6
14.1
13.9
13.7
13.6
[1] tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH
.
©
74AVC4T245_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 4 — 13 June 2019
10 / 25
Nexperia
74AVC4T245-Q100
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
Table 13. Dynamic characteristics for temperature range -40 °C to +85 °C
Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 9; for waveforms see Fig. 7 and Fig. 8.[1]
Symbol Parameter
Conditions
VCC(B)
Unit
1.2 V ± 0.1 V 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
VCC(A) = 1.1 V to 1.3 V
tpd
tdis
ten
propagation nAn to nBn
0.5
0.5
1.8
1.9
1.4
1.1
9.4
9.4
0.5
0.5
1.8
1.9
1.4
1.1
7.1
8.9
0.5
0.5
1.8
1.9
1.4
1.1
6.2
8.7
0.5
0.5
1.8
1.4
1.4
1.0
5.2
8.4
0.5
0.5
1.8
1.2
1.4
1.0
5.1 ns
8.2 ns
10.9 ns
9.1 ns
12.8 ns
7.7 ns
delay
nBn to nAn
disable time nOE to nAn
nOE to nBn
10.9
12.4
12.8
13.3
10.9
9.6
10.9
9.5
10.9
8.1
enable time nOE to nAn
nOE to nBn
12.8
10.0
12.8
8.9
12.8
7.9
VCC(A) = 1.4 V to 1.6 V
tpd
tdis
ten
propagation nAn to nBn
delay
0.3
0.7
1.8
1.9
1.1
1.4
8.9
7.1
0.3
0.7
1.8
1.9
1.4
1.4
6.3
6.3
0.3
0.5
1.5
1.9
1.1
1.1
5.2
6.0
0.3
0.4
1.3
1.4
0.7
0.9
4.2
5.7
0.3
0.3
1.6
1.2
0.4
0.9
4.2 ns
5.6 ns
10.2 ns
7.6 ns
9.4 ns
5.6 ns
nBn to nAn
disable time nOE to nAn
nOE to nBn
10.2
11.3
9.4
10.2
10.3
9.4
10.2
9.1
10.2
7.4
enable time nOE to nAn
nOE to nBn
9.4
9.4
12.1
9.6
7.7
5.8
VCC(A) = 1.65 V to 1.95 V
tpd
tdis
ten
propagation nAn to nBn
delay
0.1
0.6
1.8
1.7
1.0
1.2
8.7
6.2
0.1
0.6
1.6
1.7
1.0
1.2
6.0
5.3
8.6
9.9
7.2
9.2
0.1
0.5
1.8
1.6
1.0
1.0
4.9
4.9
8.6
8.7
7.2
7.4
0.1
0.3
1.3
1.2
0.6
0.8
3.9
4.6
8.6
6.9
7.2
5.3
0.3
0.3
1.6
1.0
0.4
0.8
3.9 ns
4.5 ns
8.6 ns
6.9 ns
7.2 ns
4.6 ns
nBn to nAn
disable time nOE to nAn
nOE to nBn
8.6
10.9
7.2
enable time nOE to nAn
nOE to nBn
11.7
VCC(A) = 2.3 V to 2.7 V
tpd
tdis
ten
propagation nAn to nBn
delay
0.1
0.6
1.0
1.5
0.7
0.9
8.4
5.2
0.1
0.6
1.0
1.5
0.7
0.9
5.7
4.2
6.2
8.8
4.8
8.8
0.1
0.4
1.0
1.3
0.7
0.8
4.6
3.9
6.2
8.2
4.8
7.0
0.2
0.2
1.0
1.1
0.6
0.6
3.5
3.4
6.2
6.2
4.8
4.8
0.1
0.2
1.0
0.9
0.4
0.6
3.6 ns
3.3 ns
6.2 ns
5.2 ns
4.8 ns
4.0 ns
nBn to nAn
disable time nOE to nAn
nOE to nBn
6.2
10.4
4.8
enable time nOE to nAn
nOE to nBn
11.3
VCC(A) = 3.0 V to 3.6 V
tpd
tdis
ten
propagation nAn to nBn
delay
0.1
0.6
0.7
1.4
0.6
0.8
8.2
5.1
0.1
0.6
0.7
1.4
0.6
0.8
5.6
4.2
5.6
9.3
3.8
8.7
0.1
0.4
0.7
1.2
0.6
0.6
4.5
3.4
5.6
8.1
3.8
6.8
0.1
0.2
0.7
1.0
0.6
0.5
3.3
3.0
5.6
6.4
3.8
4.7
0.1
0.1
0.7
0.8
0.4
0.5
2.9 ns
2.8 ns
5.6 ns
6.2 ns
3.8 ns
3.8 ns
nBn to nAn
disable time nOE to nAn
nOE to nBn
5.6
10.2
3.8
enable time nOE to nAn
nOE to nBn
11.3
[1] tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH
.
©
74AVC4T245_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 4 — 13 June 2019
11 / 25
Nexperia
74AVC4T245-Q100
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
Table 14. Dynamic characteristics for temperature range -40 °C to +125 °C
Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 9; for waveforms see Fig. 7 and Fig. 8.[1]
Symbol Parameter
Conditions
VCC(B)
Unit
1.2 V ± 0.1 V 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
VCC(A) = 1.1 V to 1.3 V
tpd
tdis
ten
propagation nAn to nBn
0.5
0.5
1.8
1.9
1.4
1.1
10.4
10.4
12.0
13.7
14.1
14.7
0.5
0.5
1.8
1.9
1.4
1.1
7.9
9.8
0.5
0.5
1.8
1.9
1.4
1.1
6.9
9.6
0.5
0.5
1.8
1.4
1.4
1.0
5.8
9.3
0.5
0.5
1.8
1.2
1.4
1.0
5.7 ns
9.1 ns
12.0 ns
10.1 ns
14.1 ns
8.5 ns
delay
nBn to nAn
disable time nOE to nAn
nOE to nBn
12.0
10.6
14.1
11.0
12.0
10.5
14.1
9.8
12.0
9.0
enable time nOE to nAn
nOE to nBn
14.1
8.7
VCC(A) = 1.4 V to 1.6 V
tpd
tdis
ten
propagation nAn to nBn
delay
0.3
0.7
1.8
1.9
1.1
1.4
9.8
7.9
0.3
0.7
1.8
1.9
1.4
1.4
7.0
7.0
0.3
0.5
1.5
1.9
1.1
1.1
5.8
6.6
0.3
0.4
1.3
1.4
0.7
0.9
4.7
6.3
0.3
0.3
1.6
1.2
0.4
0.9
4.7 ns
6.2 ns
11.3 ns
8.4 ns
10.4 ns
6.2 ns
nBn to nAn
disable time nOE to nAn
nOE to nBn
11.3
12.5
10.4
13.3
11.3
11.4
10.4
10.6
11.3
10.1
10.4
8.5
11.3
8.2
enable time nOE to nAn
nOE to nBn
10.4
6.4
VCC(A) = 1.65 V to 1.95 V
tpd
tdis
ten
propagation nAn to nBn
delay
0.1
0.6
1.8
1.7
1.0
1.2
9.6
6.9
0.1
0.6
1.6
1.7
1.0
1.2
6.6
5.9
0.1
0.5
1.8
1.6
1.0
1.0
5.4
5.4
9.5
9.6
8.0
8.2
0.1
0.3
1.3
1.2
0.6
0.8
4.3
5.1
9.5
7.6
8.0
5.9
0.3
0.3
1.6
1.0
0.4
0.8
4.3 ns
5.0 ns
9.5 ns
7.6 ns
8.0 ns
5.1 ns
nBn to nAn
disable time nOE to nAn
nOE to nBn
9.5
9.5
12.0
8.0
10.9
8.0
enable time nOE to nAn
nOE to nBn
12.9
10.2
VCC(A) = 2.3 V to 2.7 V
tpd
tdis
ten
propagation nAn to nBn
delay
0.1
0.6
1.0
1.5
0.7
0.9
9.3
5.8
0.1
0.6
1.0
1.5
0.7
0.9
6.3
4.7
0.1
0.4
1.0
1.3
0.7
0.8
5.1
4.3
6.9
9.1
5.3
7.7
0.2
0.2
1.0
1.1
0.6
0.6
4.0
3.9
6.9
6.9
5.3
5.3
0.1
0.2
1.0
0.9
0.4
0.6
4.0 ns
3.8 ns
6.9 ns
5.8 ns
5.3 ns
4.4 ns
nBn to nAn
disable time nOE to nAn
nOE to nBn
6.9
6.9
11.5
5.3
10.4
5.3
enable time nOE to nAn
nOE to nBn
12.4
9.7
VCC(A) = 3.0 V to 3.6 V
tpd
tdis
ten
propagation nAn to nBn
delay
0.1
0.6
0.7
1.4
0.6
0.8
9.1
5.7
0.1
0.6
0.7
1.4
0.6
0.8
6.2
4.7
0.1
0.4
0.7
1.2
0.6
0.6
5.0
3.9
6.2
9.0
4.2
7.5
0.1
0.2
0.7
1.0
0.6
0.5
3.8
3.4
6.2
7.1
4.2
5.2
0.1
0.1
0.7
0.8
0.4
0.5
3.3 ns
3.3 ns
6.2 ns
6.9 ns
4.2 ns
4.2 ns
nBn to nAn
disable time nOE to nAn
nOE to nBn
6.2
6.2
11.3
4.2
10.3
4.2
enable time nOE to nAn
nOE to nBn
12.4
9.6
[1] tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH
.
©
74AVC4T245_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 4 — 13 June 2019
12 / 25
Nexperia
74AVC4T245-Q100
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
11.1. Waveforms and test circuit
V
I
nAn, nBn input
GND
V
M
t
t
PLH
PHL
V
OH
nBn, nAn output
V
M
V
OL
001aak285
Measurement points are given in Table 15.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 7. The data input (nAn, nBn) to output (nBn, nAn) propagation delay times
V
I
V
nOE input
M
GND
t
t
PZL
PLZ
V
CCO
output
LOW-to-OFF
OFF-to-LOW
V
M
V
X
V
OL
t
t
PZH
PHZ
V
OH
V
Y
output
HIGH-to-OFF
OFF-to-HIGH
V
M
GND
outputs
enabled
outputs
disabled
outputs
enabled
001aak286
Measurement points are given in Table 15.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 8. Enable and disable times
Table 15. Measurement points
Supply voltage
VCC(A), VCC(B)
0.8 V to 1.6 V
1.65 V to 2.7 V
3.0 V to 3.6 V
Input[1]
Output[2]
VM
VM
VX
VY
0.5VCCI
0.5VCCI
0.5VCCI
0.5VCCO
0.5VCCO
0.5VCCO
VOL + 0.1 V
VOL + 0.15 V
VOL + 0.3 V
VOH - 0.1 V
VOH - 0.15 V
VOH - 0.3 V
[1] VCCI is the supply voltage associated with the data input port.
[2] VCCO is the supply voltage associated with the output port.
©
74AVC4T245_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 4 — 13 June 2019
13 / 25
Nexperia
74AVC4T245-Q100
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
t
W
V
I
90 %
negative
pulse
V
V
V
M
M
10 %
0 V
t
t
r
f
t
t
f
r
V
I
90 %
positive
pulse
V
M
M
10 %
0 V
t
W
V
EXT
R
V
CC
L
V
V
O
I
G
DUT
R
T
C
L
R
L
001aae331
Test data is given in Table 16.
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance.
VEXT = External voltage for measuring switching times.
Fig. 9. Test circuit for measuring switching times
Table 16. Test data
Supply voltage
VCC(A), VCC(B)
0.8 V to 1.6 V
1.65 V to 2.7 V
3.0 V to 3.6 V
Input
VI[1]
VCCI
VCCI
VCCI
Load
CL
VEXT
Δt/ΔV [2]
≤ 1.0 ns/V
≤ 1.0 ns/V
≤ 1.0 ns/V
RL
tPLH, tPHL
open
tPZH, tPHZ
GND
tPZL, tPLZ[3]
2VCCO
15 pF
15 pF
15 pF
2 kΩ
2 kΩ
2 kΩ
open
GND
2VCCO
open
GND
2VCCO
[1] VCCI is the supply voltage associated with the data input port.
[2] dV/dt ≥ 1.0 V/ns
[3] VCCO is the supply voltage associated with the output port.
©
74AVC4T245_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 4 — 13 June 2019
14 / 25
Nexperia
74AVC4T245-Q100
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
12. Typical propagation delay characteristics
001aai476
001aai477
24
21
(1)
(2)
(3)
(4)
(5)
(6)
t
pd
(ns)
t
pd
(ns)
(1)
20
17
16
12
8
13
(2)
(3)
(4)
(5)
(6)
4
9
0
20
40
60
0
20
40
60
C
L
(pF)
C (pF)
L
a. Propagation delay (A to B); VCC(A) = 0.8 V
b. Propagation delay (A to B); VCC(B) = 0.8 V
(1) VCC(B) = 0.8 V
(2) VCC(B) = 1.2 V
(3) VCC(B) = 1.5 V
(4) VCC(B) = 1.8 V
(5) VCC(B) = 2.5 V
(6) VCC(B) = 3.3 V
(1) VCC(A) = 0.8 V
(2) VCC(A) = 1.2 V
(3) VCC(A) = 1.5 V
(4) VCC(A) = 1.8 V
(5) VCC(A) = 2.5 V
(6) VCC(A) = 3.3 V
Fig. 10. Typical propagation delay versus load capacitance; Tamb = 25 °C
©
74AVC4T245_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 4 — 13 June 2019
15 / 25
Nexperia
74AVC4T245-Q100
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
001aai478
001aai491
7
7
5
3
1
(1)
t
t
PLH
(ns)
PHL
(ns)
(1)
(2)
(3)
5
3
1
(2)
(3)
(4)
(5)
(4)
(5)
0
20
40
60
0
20
40
60
C
L
(pF)
C (pF)
L
a. LOW to HIGH propagation delay (A to B);
VCC(A) = 1.2 V
b. HIGH to LOW propagation delay (A to B);
VCC(A) = 1.2 V
001aai479
001aai480
7
7
(1)
t
t
PLH
(ns)
PHL
(ns)
(1)
5
3
1
5
3
1
(2)
(3)
(2)
(3)
(4)
(5)
(4)
(5)
0
20
40
60
0
20
40
60
C
L
(pF)
C
L
(pF)
c. LOW to HIGH propagation delay (A to B);
VCC(A) = 1.5 V
d. HIGH to LOW propagation delay (A to B);
VCC(A) = 1.5 V
(1) VCC(B) = 1.2 V
(2) VCC(B) = 1.5 V
(3) VCC(B) = 1.8 V
(4) VCC(B) = 2.5 V
(5) VCC(B) = 3.3 V
Fig. 11. Typical propagation delay versus load capacitance; Tamb = 25 °C
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74AVC4T245_Q100
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Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 4 — 13 June 2019
16 / 25
Nexperia
74AVC4T245-Q100
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
001aai481
001aai482
7
7
5
3
1
(1)
t
t
PLH
(ns)
PHL
(ns)
(1)
5
3
1
(2)
(3)
(2)
(3)
(4)
(5)
(4)
(5)
0
20
40
60
0
20
40
60
C
L
(pF)
C (pF)
L
a. LOW to HIGH propagation delay (A to B);
VCC(A) = 1.8 V
b. HIGH to LOW propagation delay (A to B);
VCC(A) = 1.8 V
001aai483
001aai486
7
7
t
t
PLH
(ns)
PHL
(ns)
(1)
(1)
5
3
1
5
3
1
(2)
(3)
(2)
(3)
(4)
(5)
(4)
(5)
0
20
40
60
0
20
40
60
C
L
(pF)
C
L
(pF)
c. LOW to HIGH propagation delay (A to B);
VCC(A) = 2.5 V
d. HIGH to LOW propagation delay (A to B);
VCC(A) = 2.5 V
(1) VCC(B) = 1.2 V
(2) VCC(B) = 1.5 V
(3) VCC(B) = 1.8 V
(4) VCC(B) = 2.5 V
(5) VCC(B) = 3.3 V
Fig. 12. Typical propagation delay versus load capacitance; Tamb = 25 °C
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Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 4 — 13 June 2019
17 / 25
Nexperia
74AVC4T245-Q100
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
001aai485
001aai484
7
7
5
3
1
t
t
PLH
(ns)
PHL
(ns)
(1)
(1)
5
3
1
(2)
(3)
(2)
(3)
(4)
(5)
(4)
(5)
0
20
40
60
0
20
40
60
C
L
(pF)
C (pF)
L
a. LOW to HIGH propagation delay (A to B);
VCC(A) = 3.3 V
b. HIGH to LOW propagation delay (A to B);
VCC(A) = 3.3 V
(1) VCC(B) = 1.2 V
(2) VCC(B) = 1.5 V
(3) VCC(B) = 1.8 V
(4) VCC(B) = 2.5 V
(5) VCC(B) = 3.3 V
Fig. 13. Typical propagation delay versus load capacitance; Tamb = 25 °C
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Product data sheet
Rev. 4 — 13 June 2019
18 / 25
Nexperia
74AVC4T245-Q100
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
13. Package outline
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
D
E
A
X
v
c
y
H
M
A
E
Z
16
9
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
8
e
w
M
detail X
b
p
0
2.5
scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
E
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
max.
0.25
0.10
1.45
1.25
0.49
0.36
0.25
0.19
10.0
9.8
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.6
0.7
0.3
mm
1.27
0.05
1.05
0.041
1.75
0.25
0.01
0.25
0.1
0.25
0.01
8o
0o
0.0100
0.0075
0.010 0.057
0.004 0.049
0.019
0.014
0.39
0.38
0.16
0.15
0.244
0.228
0.039 0.028
0.016 0.020
0.028
0.012
inches
0.069
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT109-1
076E07
MS-012
Fig. 14. Package outline SOT109-1 (SO16)
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Product data sheet
Rev. 4 — 13 June 2019
19 / 25
Nexperia
74AVC4T245-Q100
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
SOT403-1
D
E
A
X
c
y
H
v
M
A
E
Z
9
16
Q
(A )
3
A
2
A
A
1
pin 1 index
θ
L
p
L
1
8
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(2)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.
8o
0o
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
6.6
6.2
0.75
0.50
0.4
0.3
0.40
0.06
mm
1.1
0.65
1
0.2
0.13
0.1
0.25
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-18
SOT403-1
MO-153
Fig. 15. Package outline SOT403-1 (TSSOP16)
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74AVC4T245_Q100
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Product data sheet
Rev. 4 — 13 June 2019
20 / 25
Nexperia
74AVC4T245-Q100
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
16 terminals; body 2.5 x 3.5 x 0.85 mm
SOT763-1
B
A
D
A
A
1
E
c
detail X
terminal 1
index area
C
terminal 1
index area
e
1
y
y
e
b
v
M
C
C
A
B
C
1
w
M
2
7
L
1
8
9
E
h
e
16
15
10
D
h
X
0
2.5
scale
5 mm
DIMENSIONS (mm are the original dimensions)
(1)
A
(1)
(1)
UNIT
A
1
b
c
E
h
e
e
y
D
D
E
L
v
w
y
1
1
h
max.
0.05 0.30
0.00 0.18
3.6
3.4
2.15
1.85
2.6
2.4
1.15
0.85
0.5
0.3
mm
0.05
0.1
1
0.2
0.5
2.5
0.1
0.05
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
02-10-17
03-01-27
SOT763-1
- - -
MO-241
- - -
Fig. 16. Package outline SOT763-1 (DHVQFN16)
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74AVC4T245_Q100
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Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 4 — 13 June 2019
21 / 25
Nexperia
74AVC4T245-Q100
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
XQFN16: plastic, extremely thin quad flat package; no leads;
16 terminals; body 1.80 x 2.60 x 0.50 mm
SOT1161-1
X
B
A
E
D
terminal 1
index area
A
A
1
A
3
detail X
e
1
C
v
C
C
A B
e
b
y
1
y
w
C
5
8
L
4
1
9
e
e
2
12
terminal 1
index area
16
13
L
1
0
1
2 mm
scale
Dimensions
(1)
Unit
A
A
A
b
D
E
e
e
1
e
2
L
L
1
v
w
y
y
1
1
3
max 0.5 0.05
mm nom
min
0.25 1.9 2.7
0.127 0.20 1.8 2.6
0.15 1.7 2.5
0.45 0.55
1.2 0.40 0.50 0.1 0.05 0.05 0.05
0.35 0.45
0.4
1.2
0.00
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
sot1161-1_po
References
Outline
version
European
projection
Issue date
IEC
- - -
JEDEC
- - -
JEITA
- - -
09-12-28
09-12-29
SOT1161-1
Fig. 17. Package outline SOT1161-1 (XQFN16)
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74AVC4T245_Q100
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Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 4 — 13 June 2019
22 / 25
Nexperia
74AVC4T245-Q100
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
14. Abbreviations
Table 17. Abbreviations
Acronym
DUT
Description
Device Under Test
ElectroStatic Discharge
Human Body Model
Military
ESD
HBM
MIL
MM
Machine Model
15. Revision history
Table 18. Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
74AVC4T245_Q100 v.4 20190613
Product data sheet
-
74AVC4T245_Q100 v.3
Modifications:
•
•
Type number 74AVC4T245GU-Q100 (SOT1161-1/XQFN16) added.
Table 5: Derating values for total power dissipation (Ptot) have changed.
74AVC4T245_Q100 v.3 20190320
Product data sheet 74AVC4T245_Q100 v.2
-
Modifications:
•
•
The format of this data sheet has been redesigned to comply with the identity guidelines of
Nexperia.
Legal texts have been adapted to the new company name where appropriate.
74AVC4T245_Q100 v.2 20151207
Product data sheet
-
74AVC4T245_Q100 v.1
-
Modifications:
•
Table 5: conditions ICC and IGND changed (errata).
74AVC4T245_Q100 v.1 20130402
Product data sheet
-
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74AVC4T245_Q100
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Product data sheet
Rev. 4 — 13 June 2019
23 / 25
Nexperia
74AVC4T245-Q100
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
equipment, nor in applications where failure or malfunction of an Nexperia
product can reasonably be expected to result in personal injury, death or
severe property or environmental damage. Nexperia and its suppliers accept
no liability for inclusion and/or use of Nexperia products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
16. Legal information
Data sheet status
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Document status Product
Definition
[1][2]
status [3]
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
Preliminary [short]
data sheet
Qualification
Production
This document contains data from
the preliminary specification.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability for
any assistance with applications or customer product design. It is customer’s
sole responsibility to determine whether the Nexperia product is suitable
and fit for the customer’s applications and products planned, as well as
for the planned application and use of customer’s third party customer(s).
Customers should provide appropriate design and operating safeguards to
minimize the risks associated with their applications and products.
Product [short]
data sheet
This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.
Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for the
customer’s applications and products using Nexperia products in order to
avoid a default of the applications and the products or of the application or
use by customer’s third party customer(s). Nexperia does not accept any
liability in this respect.
Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the relevant
full data sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of commercial sale — Nexperia products are
sold subject to the general terms and conditions of commercial sale, as
published at http://www.nexperia.com/profile/terms, unless otherwise agreed
in a valid written individual agreement. In case an individual agreement is
concluded only the terms and conditions of the respective agreement shall
apply. Nexperia hereby expressly objects to applying the customer’s general
terms and conditions with regard to the purchase of Nexperia products by
customer.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Disclaimers
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no responsibility
for the content in this document if provided by an information source outside
of Nexperia.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
In no event shall Nexperia be liable for any indirect, incidental, punitive,
special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards customer
for the products described herein shall be limited in accordance with the
Terms and conditions of commercial sale of Nexperia.
Right to make changes — Nexperia reserves the right to make changes
to information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Suitability for use in automotive applications — This Nexperia product
has been qualified for use in automotive applications. Unless otherwise
agreed in writing, the product is not designed, authorized or warranted to
be suitable for use in life support, life-critical or safety-critical systems or
©
74AVC4T245_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 4 — 13 June 2019
24 / 25
Nexperia
74AVC4T245-Q100
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Ordering information....................................................2
4. Marking..........................................................................2
5. Functional diagram.......................................................2
6. Pinning information......................................................3
6.1. Pinning.........................................................................3
6.2. Pin description.............................................................4
7. Functional description................................................. 5
8. Limiting values............................................................. 5
9. Recommended operating conditions..........................6
10. Static characteristics..................................................6
11. Dynamic characteristics.............................................9
11.1. Waveforms and test circuit.......................................13
12. Typical propagation delay characteristics..............15
13. Package outline........................................................ 19
14. Abbreviations............................................................23
15. Revision history........................................................23
16. Legal information......................................................24
© Nexperia B.V. 2019. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 13 June 2019
©
74AVC4T245_Q100
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Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 4 — 13 June 2019
25 / 25
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