74ALVC574BQ [NEXPERIA]
Octal D-type flip-flop; positive edge-trigger; 3-stateProduction;型号: | 74ALVC574BQ |
厂家: | Nexperia |
描述: | Octal D-type flip-flop; positive edge-trigger; 3-stateProduction 驱动 逻辑集成电路 |
文件: | 总15页 (文件大小:271K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
74ALVC574
Octal D-type flip-flop; positive edge-trigger; 3-state
Rev. 4 — 11 July 2023
Product data sheet
1. General description
The 74ALVC574 is an 8-bit positive-edge triggered D-type flip-flop with 3-state outputs. The
device features a clock (CP) and output enable (OE) inputs. The flip-flops will store the state of
their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH
clock (CP) transition. A HIGH on OE causes the outputs to assume a high-impedance OFF-state.
Operation of the OE input does not affect the state of the flip-flops.
Schmitt trigger action on all inputs makes the device tolerant of slow rise and fall times.
This device is fully specified for partial power down applications using IOFF. The IOFF circuitry
disables the output, preventing the potentially damaging backflow current through the device when
it is powered down.
2. Features and benefits
•
Wide supply voltage range from 1.65 V to 3.6 V
•
•
•
•
•
•
CMOS low power dissipation
Overvoltage tolerant inputs to 3.6 V
Direct interface with TTL levels
IOFF circuitry provides partial Power-down mode operation
Latch-up performance exceeds 250 mA per JESD78 Class II.A
Complies with JEDEC standards:
•
•
•
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8C/JESD36 (2.7 V to 3.6 V)
•
ESD protection:
•
•
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
•
•
Multiple package options
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
Version
74ALVC574D
-40 °C to +125 °C
SO20
plastic small outline package; 20 leads;
body width 7.5 mm
SOT163-1
74ALVC574PW -40 °C to +125 °C
74ALVC574BQ -40 °C to +125 °C
TSSOP20
plastic thin shrink small outline package; 20 leads;
body width 4.4 mm
SOT360-1
SOT764-1
DHVQFN20 plastic dual in-line compatible thermal enhanced
very thin quad flat package; no leads; 20 terminals;
body 2.5 × 4.5 × 0.85 mm
Nexperia
74ALVC574
Octal D-type flip-flop; positive edge-trigger; 3-state
4. Functional diagram
11
C1
1
EN
11
2
19
1D
CP
2
19
18
17
16
15
14
13
12
D0
D1
D2
D3
D4
D5
D6
D7
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
3
4
5
6
7
18
17
16
15
14
3
4
5
6
7
8
9
8
9
13
12
OE
1
mna798
mna446
Fig. 1. Logic symbol
Fig. 2. IEC logic symbol
D0
D1
D2
D3
D4
D5
D6
D7
Q0
2
3
4
5
6
7
8
9
19
Q1 18
17
16
15
14
13
Q2
Q3
Q4
Q5
Q6
FF1
to
FF8
3-STATE
OUTPUTS
Q7 12
CP
OE
11
1
mna800
Fig. 3. Functional diagram
D0
D1
D2
D3
D4
D5
D6
D7
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
CP
FF7
Q
D
Q
CP
CP
FF2
CP
FF3
CP
CP
CP
CP
FF1
FF4
FF5
FF6
FF8
CP
OE
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q
7
mna801
Fig. 4. Logic diagram
©
74ALVC574
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
Rev. 4 — 11 July 2023
2 / 15
Nexperia
74ALVC574
Octal D-type flip-flop; positive edge-trigger; 3-state
5. Pinning information
5.1. Pinning
D package
PW package
SOT163-1 (SO20)
SOT360-1 (TSSOP20)
1
2
20
19
18
17
16
15
14
13
12
11
1
2
20
19
18
17
16
15
14
13
12
11
OE
D0
V
OE
D0
V
CC
CC
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
CP
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
CP
3
3
D1
D1
4
4
D2
D2
5
5
D3
D3
6
6
D4
D4
7
7
D5
D5
8
8
D6
D6
9
9
D7
D7
10
10
GND
GND
aaa-035109
aaa-035110
BQ package
SOT764-1 (DHVQFN20)
terminal 1
index area
2
3
4
5
6
7
8
9
19
18
17
16
15
14
13
12
D0
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
D1
D2
D3
D4
D5
D6
D7
(1)
GND
aaa-035111
Transparent top view
(1) This is not a ground pin. There is no electrical or mechanical requirement to solder
the pad. In case soldered, the solder land should remain floating or connected to GND.
5.2. Pin description
Table 2. Pin description
Symbol
Pin
Description
D0, D1, D2, D3, D4, D5, D6, D7
2, 3, 4, 5, 6, 7, 8, 9
data input
CP
11
clock input (LOW to HIGH, edge-triggered)
output enable input (active LOW)
3-state flip-flop output
supply voltage
OE
1
Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7
19, 18, 17, 16, 15, 14, 13, 12
VCC
20
10
GND
ground (0 V)
©
74ALVC574
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
Rev. 4 — 11 July 2023
3 / 15
Nexperia
74ALVC574
Octal D-type flip-flop; positive edge-trigger; 3-state
6. Functional description
Table 3. Function table
H = HIGH voltage level; h = HIGH voltage level one set-up time prior to the LOW to HIGH CP transition;
L = LOW voltage level; l = LOW voltage level one set-up time prior to the LOW to HIGH CP transition;
Z = high-impedance OFF-state; ↑ = LOW to HIGH clock transition.
Operating mode
Input
OE
L
Internal flip-flop Output
Qn
CP
↑
Dn
Load and read register
l
L
L
L
↑
h
l
H
L
H
Z
Z
Load register and disable
outputs
H
↑
H
↑
h
H
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
VCC
VI
Parameter
Conditions
Min
-0.5
-0.5
-0.5
-0.5
-0.5
-50
-
Max
+4.6
+4.6
VCC + 0.5
+4.6
+4.6
-
Unit
V
supply voltage
input voltage
output voltage
[1]
[1]
V
VO
output HIGH or LOW state
output 3-state
V
V
power-down mode; VCC = 0 V
VI < 0 V
V
IIK
input clamping current
output clamping current
output current
mA
mA
mA
mA
mA
°C
mW
IOK
IO
VO > VCC or VO < 0 V
VO = 0 V to VCC
±50
-
±50
ICC
IGND
Tstg
Ptot
supply current
-
100
ground current
-100
-65
-
-
storage temperature
total power dissipation
+150
500
Tamb = -40 °C to +125 °C
[2]
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SOT163-1 (SO20) package: Ptot derates linearly with 12.3 mW/K above 109 °C.
For SOT360-1 (TSSOP20) package: Ptot derates linearly with 10.0 mW/K above 100 °C.
For SOT764-1 (DHVQFN20) package: Ptot derates linearly with 12.9 mW/K above 111 °C.
©
74ALVC574
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
Rev. 4 — 11 July 2023
4 / 15
Nexperia
74ALVC574
Octal D-type flip-flop; positive edge-trigger; 3-state
8. Recommended operating conditions
Table 5. Recommended operating conditions
Symbol
VCC
VI
Parameter
Conditions
Min
1.65
0
Max
3.6
Unit
V
supply voltage
input voltage
output voltage
3.6
V
VO
output HIGH or LOW state
output 3-state
0
VCC
3.6
V
0
V
power-down mode; VCC = 0 V
in free air
0
3.6
V
Tamb
ambient temperature
-40
0
+125
20
°C
ns/V
ns/V
Δt/ΔV
input transition rise and fall rate
VCC = 1.65 V to 2.7 V
VCC = 2.7 V to 3.6 V
0
10
9. Static characteristics
Table 6. Static characteristics
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
-40 °C to +85 °C
Typ[1]
-40 °C to +125 °C
Unit
Min
Max
Min
Max
VIH
HIGH-level
input voltage
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VI = VIH or VIL
0.65 × VCC
-
-
-
-
-
-
-
0.65 × VCC
-
V
V
V
V
V
V
1.7
-
1.7
-
2.0
-
0.35 × VCC
0.7
2.0
-
0.35 × VCC
0.7
VIL
LOW-level
input voltage
-
-
-
-
-
-
0.8
0.8
VOH
HIGH-level
output voltage
IO = -100 μA;
VCC - 0.2
-
-
VCC - 0.2
-
V
VCC = 1.65 V to 3.6 V
IO = -6 mA; VCC = 1.65 V
IO = -12 mA; VCC = 2.3 V
IO = -18 mA; VCC = 2.3 V
IO = -12 mA; VCC = 2.7 V
IO = -18 mA; VCC = 3.0 V
IO = -24 mA; VCC = 3.0 V
VI = VIH or VIL
1.25
1.8
1.7
2.2
2.4
2.2
1.51
2.10
2.01
2.53
2.76
2.68
-
-
-
-
-
-
1.25
1.8
1.7
2.2
2.4
2.2
-
-
-
-
-
-
V
V
V
V
V
V
VOL
LOW-level
output voltage
IO = 100 μA;
-
-
0.2
-
0.2
V
VCC = 1.65 V to 3.6 V
IO = 6 mA; VCC = 1.65 V
IO = 12 mA; VCC = 2.3 V
IO = 18 mA; VCC = 2.3 V
IO = 12 mA; VCC = 2.7 V
IO = 18 mA; VCC = 3.0 V
IO = 24 mA; VCC = 3.0 V
-
-
-
-
-
-
-
0.11
0.17
0.25
0.16
0.23
0.30
±0.1
0.3
0.4
0.6
0.4
0.4
0.55
±5
-
-
-
-
-
-
-
0.3
0.4
V
V
0.6
V
0.4
V
0.45
0.55
±20
V
V
II
input leakage VCC = 3.6 V;
current VI = 3.6 V or GND
μA
©
74ALVC574
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
Rev. 4 — 11 July 2023
5 / 15
Nexperia
74ALVC574
Octal D-type flip-flop; positive edge-trigger; 3-state
Symbol Parameter
Conditions
-40 °C to +85 °C
Typ[1]
-40 °C to +125 °C
Unit
Min
Max
Min
Max
IOZ
OFF-state
VI = VIH or VIL;
-
±0.1
±10
-
±80
μA
output current VCC = 1.65 V to 3.6 V;
VO = 3.6 V or GND
IOFF
power-off
leakage
current
VCC = 0 V;
VI or VO = 0 V to 3.6 V
-
±0.1
±10
-
±80
μA
ICC
supply current VCC = 3.6 V;
VI = VCC or GND; IO = 0 A
-
-
0.2
5
10
-
-
80
μA
μA
ΔICC
additional
per input pin;
750
750
supply current VCC = 3.0 V to 3.6 V;
VI = VCC - 0.6 V; IO = 0 A
CI
input
-
3.5
-
-
-
pF
capacitance
[1] All typical values are measured at VCC = 3.3 V (unless stated otherwise) and Tamb = 25 °C.
10. Dynamic characteristics
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Fig. 8.
Symbol Parameter
Conditions
-40 °C to +85 °C
Typ[1]
-40 °C to +125 °C Unit
Min
Max
Min
Max
tpd
ten
tdis
tW
propagation
delay
CP to Qn; see Fig. 5
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
[2]
[2]
[2]
1.0
1.0
1.0
1.0
3.1
2.3
2.5
2.5
6.4
3.9
3.6
3.6
1.0
1.0
1.0
1.0
7.4
4.5
4.1
4.1
ns
ns
ns
ns
VCC = 3.0 V to 3.6 V
OE to Qn; see Fig. 6
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
enable time
disable time
pulse width
1.0
1.0
1.0
1.0
3.2
2.6
3.2
2.4
6.4
4.5
4.6
4.0
1.0
1.0
1.0
1.0
7.4
5.2
5.3
4.6
ns
ns
ns
ns
VCC = 3.0 V to 3.6 V
OE to Qn; see Fig. 6
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
1.5
1.0
1.5
1.0
3.6
2.3
2.9
2.8
7.0
4.4
4.4
4.4
1.5
1.0
1.5
1.0
8.1
5.1
5.1
5.1
ns
ns
ns
ns
VCC = 3.0 V to 3.6 V
clock HIGH or LOW; see Fig. 5
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
3.8
3.3
3.3
3.3
1.1
0.9
0.8
1.2
-
-
-
-
3.8
3.3
3.3
3.3
-
-
-
-
ns
ns
ns
ns
VCC = 3.0 V to 3.6 V
©
74ALVC574
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
Rev. 4 — 11 July 2023
6 / 15
Nexperia
74ALVC574
Octal D-type flip-flop; positive edge-trigger; 3-state
Symbol Parameter
Conditions
-40 °C to +85 °C
Typ[1]
-40 °C to +125 °C Unit
Min
Max
Min
Max
tsu
set-up time
Dn to CP; see Fig. 7
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
0.8
0.8
0.8
0.8
-0.1
0.1
0.3
0.0
-
-
-
-
0.8
0.8
0.8
0.8
-
-
-
-
ns
ns
ns
ns
VCC = 3.0 V to 3.6 V
Dn to CP; see Fig. 7
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
th
hold time
0.8
0.8
0.8
0.7
-0.1
0.1
-
-
-
-
0.8
0.8
0.8
0.7
-
-
-
-
ns
ns
ns
ns
0.4
VCC = 3.0 V to 3.6 V
see Fig. 5
-0.1
fmax
maximum
frequency
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
50
100
200
200
300
-
-
-
-
50
-
-
-
-
MHz
MHz
MHz
MHz
100
100
150
100
100
150
VCC = 3.0 V to 3.6 V
CPD
power
per flip-flop; VI = GND to VCC
;
[3]
dissipation
capacitance
VCC = 3.3 V
outputs HIGH or LOW state
outputs 3-state
-
-
21
13
-
-
-
-
-
-
pF
pF
[1] Typical values are measured at Tamb = 25 °C
[2] tpd is the same as tPHL and tPLH
ten is the same as tPZH and tPZL
tdis is the same as tPHZ and tPLZ
.
.
.
[3] CPD is used to determine the dynamic power dissipation (PD in μW).
PD = CPD × VCC 2 × fi × N + Σ(CL × VCC 2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ(CL × VCC 2 × fo) = sum of the outputs.
10.1. Waveforms and test circuit
1/f
max
V
I
CP input
V
M
GND
t
W
t
t
PLH
PHL
V
OH
V
Qn output
M
V
OL
mna894
Measurement points are given in Table 8.
VOL and VOH are the typical output voltage levels that occur with the output load.
Fig. 5. Clock (CP) to output (Qn) propagation delays, the clock pulse width, and the maximum frequency
©
74ALVC574
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
Rev. 4 — 11 July 2023
7 / 15
Nexperia
74ALVC574
Octal D-type flip-flop; positive edge-trigger; 3-state
Table 8. Measurement points
Supply voltage
VCC
Input
Output
VM
VM
VX
VY
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
0.5 × VCC
0.5 × VCC
1.5 V
0.5 × VCC
0.5 × VCC
1.5 V
VOL + 0.15 V
VOL + 0.15 V
VOL + 0.3 V
VOL + 0.3 V
VOH - 0.15 V
VOH - 0.15 V
VOH - 0.3 V
VOH - 0.3 V
3.0 V to 3.6 V
1.5 V
1.5 V
V
I
OE input
V
M
GND
t
t
PZL
PLZ
V
CC
output
LOW-to-OFF
OFF-to-LOW
V
M
V
X
V
OL
t
t
PHZ
PZH
V
OH
V
Y
output
HIGH-to-OFF
OFF-to-HIGH
V
M
GND
outputs
enabled
outputs
enabled
outputs
disabled
mna644
Measurement points are given in Table 8.
VOL and VOH are the typical output voltage levels that occur with the output load.
Fig. 6. Enable and disable times
V
I
V
CP input
M
GND
t
t
su
su
t
t
h
h
V
I
V
Dn input
M
GND
V
OH
V
Qn output
M
V
OL
mna202
Measurement points are given in Table 8.
VOL and VOH are the typical output voltage levels that occur with the output load.
The shaded areas indicate when the input is permitted to change for predicable output performance.
Fig. 7. Data set-up and hold times for the Dn input to the CP input
©
74ALVC574
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
Rev. 4 — 11 July 2023
8 / 15
Nexperia
74ALVC574
Octal D-type flip-flop; positive edge-trigger; 3-state
t
W
V
I
90 %
negative
pulse
V
V
V
M
M
10 %
0 V
t
t
r
f
t
t
f
r
V
I
90 %
positive
pulse
V
M
M
10 %
0 V
t
W
V
EXT
R
V
CC
L
V
V
O
I
G
DUT
R
T
C
L
R
L
001aae331
Test data is given in Table 9.
Definitions for test circuit:
RL = Load resistance;
CL = Load capacitance including jig and probe capacitance;
RT = Termination resistance should be equal to output impedance Zo of the pulse generator;
VEXT = External voltage for measuring switching times.
Fig. 8. Test circuit for measuring switching times
Table 9. Test data
Supply voltage
Input
VI
Load
CL
VEXT
tr, tf
RL
tPLH, tPHL
open
tPLZ, tPZL
2 × VCC
2 × VCC
6 V
tPHZ, tPZH
GND
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
VCC
VCC
2.7 V
2.7 V
≤ 2.0 ns
≤ 2.0 ns
≤ 2.5 ns
≤ 2.5 ns
30 pF
30 pF
50 pF
50 pF
1 kΩ
500 Ω
500 Ω
500 Ω
open
GND
open
GND
3.0 V to 3.6 V
open
6 V
GND
©
74ALVC574
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
Rev. 4 — 11 July 2023
9 / 15
Nexperia
74ALVC574
Octal D-type flip-flop; positive edge-trigger; 3-state
11. Package outline
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
D
E
A
X
c
y
H
E
v
M
A
Z
20
11
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
10
w
detail X
e
M
b
p
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
max.
(1)
(1)
(1)
UNIT
mm
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
θ
1
2
3
p
E
p
Z
0.3
0.1
2.45
2.25
0.49
0.36
0.32
0.23
13.0
12.6
7.6
7.4
10.65
10.00
1.1
0.4
1.1
1.0
0.9
0.4
2.65
0.1
0.25
0.01
1.27
0.05
1.4
0.25 0.25
0.1
8o
0o
0.012 0.096
0.004 0.089
0.019 0.013 0.51
0.014 0.009 0.49
0.30
0.29
0.419
0.394
0.043 0.043
0.016 0.039
0.035
0.016
inches
0.055
0.01 0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT163-1
075E04
MS-013
Fig. 9. Package outline SOT163-1 (SO20)
©
74ALVC574
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
Rev. 4 — 11 July 2023
10 / 15
Nexperia
74ALVC574
Octal D-type flip-flop; positive edge-trigger; 3-state
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm
SOT360-1
D
E
A
X
c
H
v
M
A
y
E
Z
11
20
Q
A
2
(A )
3
A
A
1
pin 1 index
θ
L
p
L
1
10
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(2)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.
8o
0o
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
6.6
6.4
4.5
4.3
6.6
6.2
0.75
0.50
0.4
0.3
0.5
0.2
mm
1.1
0.65
1
0.2
0.13
0.1
0.25
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT360-1
MO-153
Fig. 10. Package outline SOT360-1 (TSSOP20)
©
74ALVC574
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
Rev. 4 — 11 July 2023
11 / 15
Nexperia
74ALVC574
Octal D-type flip-flop; positive edge-trigger; 3-state
DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
20 terminals; body 2.5 x 4.5 x 0.85 mm
SOT764-1
B
A
D
A
A
1
E
c
detail X
terminal 1
index area
terminal 1
index area
e
C
1
v
w
C
C
A B
y
y
e
b
C
1
2
9
L
1
10
E
e
h
20
11
19
12
X
D
h
0
2.5
5 mm
scale
Dimensions (mm are the original dimensions)
(1) (1)
(1)
Unit
A
A
b
c
D
D
h
E
E
e
e
1
L
v
w
y
y
1
1
h
max 1.00 0.05 0.30
4.6 3.15 2.6 1.15
0.5
nom
min
mm
0.90 0.02 0.25 0.2 4.5 3.00 2.5 1.00 0.5 3.5 0.4 0.1 0.05 0.05 0.1
0.80 0.00 0.18 4.4 2.85 2.4 0.85 0.3
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
sot764-1_po
Issue date
References
Outline
version
European
projection
IEC
- - -
JEDEC
JEITA
- - -
03-01-27
14-12-12
SOT764-1
MO-241
Fig. 11. Package outline SOT764-1 (DHVQFN20)
©
74ALVC574
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
Rev. 4 — 11 July 2023
12 / 15
Nexperia
74ALVC574
Octal D-type flip-flop; positive edge-trigger; 3-state
12. Abbreviations
Table 10. Abbreviations
Acronym
CDM
Description
Charged Device Model
CMOS
DUT
Complementary Metal-Oxide Semiconductor
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
TTL
Transistor-Transistor Logic
13. Revision history
Table 11. Revision history
Document ID
Release date Data sheet status
20230711 Product data sheet
Change notice Supersedes
- 74ALVC574 v.3
74ALVC574 v.4
Modifications:
•
•
•
Specifications for -40 °C to +125 °C added.
Section 1 updated.
Section 2 updated; ESD specification updated according to the latest JEDEC standard.
74ALVC574 v.3
Modifications:
20210430
Product data sheet 74ALVC574 v.2
-
•
The format of this data sheet has been redesigned to comply with the identity
guidelines of Nexperia.
•
•
•
•
Legal texts have been adapted to the new company name where appropriate.
Section 2: Reference to JESD36 removed.
Section 7: Derating values for Ptot total power dissipation removed (errata).
Package outline drawing of SOT764-1 (Fig. 11) updated.
74ALVC574 v.2
Modifications:
20071108
Product data sheet
-
74ALVC574 v.1
•
The format of this data sheet has been redesigned to comply with the new identity
guidelines
of NXP Semiconductors.
•
•
•
•
Legal texts have been adapted to the new company name where appropriate.
Section 3: DHVQFN20 package added.
Section 7: derating values added for DHVQFN20 package.
Section 11: outline drawing added for DHVQFN20 package.
74ALVC574 v.1
20020304
Product specification
-
-
©
74ALVC574
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
Rev. 4 — 11 July 2023
13 / 15
Nexperia
74ALVC574
Octal D-type flip-flop; positive edge-trigger; 3-state
injury, death or severe property or environmental damage. Nexperia and its
suppliers accept no liability for inclusion and/or use of Nexperia products in
such equipment or applications and therefore such inclusion and/or use is at
the customer’s own risk.
14. Legal information
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Data sheet status
Document status Product
Definition
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
[1][2]
status [3]
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability for
any assistance with applications or customer product design. It is customer’s
sole responsibility to determine whether the Nexperia product is suitable
and fit for the customer’s applications and products planned, as well as
for the planned application and use of customer’s third party customer(s).
Customers should provide appropriate design and operating safeguards to
minimize the risks associated with their applications and products.
Preliminary [short]
data sheet
Qualification
Production
This document contains data from
the preliminary specification.
Product [short]
data sheet
This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for the
customer’s applications and products using Nexperia products in order to
avoid a default of the applications and the products or of the application or
use by customer’s third party customer(s). Nexperia does not accept any
liability in this respect.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.
Definitions
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the relevant
full data sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of commercial sale — Nexperia products are
sold subject to the general terms and conditions of commercial sale, as
published at http://www.nexperia.com/profile/terms, unless otherwise agreed
in a valid written individual agreement. In case an individual agreement is
concluded only the terms and conditions of the respective agreement shall
apply. Nexperia hereby expressly objects to applying the customer’s general
terms and conditions with regard to the purchase of Nexperia products by
customer.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no responsibility
for the content in this document if provided by an information source outside
of Nexperia.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Nexperia product is automotive qualified, the
product is not suitable for automotive use. It is neither qualified nor tested in
accordance with automotive testing or application requirements. Nexperia
accepts no liability for inclusion and/or use of non-automotive qualified
products in automotive equipment or applications.
In no event shall Nexperia be liable for any indirect, incidental, punitive,
special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards,
customer (a) shall use the product without Nexperia’s warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
Nexperia’s specifications such use shall be solely at customer’s own risk,
and (c) customer fully indemnifies Nexperia for any liability, damages or failed
product claims resulting from customer design and use of the product for
automotive applications beyond Nexperia’s standard warranty and Nexperia’s
product specifications.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards customer
for the products described herein shall be limited in accordance with the
Terms and conditions of commercial sale of Nexperia.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Right to make changes — Nexperia reserves the right to make changes
to information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Trademarks
Suitability for use — Nexperia products are not designed, authorized or
warranted to be suitable for use in life support, life-critical or safety-critical
systems or equipment, nor in applications where failure or malfunction
of an Nexperia product can reasonably be expected to result in personal
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
©
74ALVC574
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
Rev. 4 — 11 July 2023
14 / 15
Nexperia
74ALVC574
Octal D-type flip-flop; positive edge-trigger; 3-state
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Ordering information....................................................1
4. Functional diagram.......................................................2
5. Pinning information......................................................3
5.1. Pinning.........................................................................3
5.2. Pin description.............................................................3
6. Functional description................................................. 4
7. Limiting values............................................................. 4
8. Recommended operating conditions..........................5
9. Static characteristics....................................................5
10. Dynamic characteristics............................................ 6
10.1. Waveforms and test circuit........................................ 7
11. Package outline........................................................ 10
12. Abbreviations............................................................13
13. Revision history........................................................13
14. Legal information......................................................14
© Nexperia B.V. 2023. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 11 July 2023
©
74ALVC574
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
Rev. 4 — 11 July 2023
15 / 15
相关型号:
74ALVC574PW,112
74ALVC574 - Octal D-type flip-flop; positive edge trigger; 3-state TSSOP2 20-Pin
NXP
74ALVC574PW,118
74ALVC574 - Octal D-type flip-flop; positive edge trigger; 3-state TSSOP2 20-Pin
NXP
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