74AHC1G4210GW-Q100 [NEXPERIA]
10-stage divider and oscillatorProduction;型号: | 74AHC1G4210GW-Q100 |
厂家: | Nexperia |
描述: | 10-stage divider and oscillatorProduction |
文件: | 总11页 (文件大小:202K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
74AHC1G4210-Q100
10-stage divider and oscillator
Rev. 3 — 11 January 2022
Product data sheet
1. General description
74AHC1G4210-Q100 is a 10-stage divider and oscillator. It consists of a chain of 10 flip-flops.
Each flip-flop divides the frequency of the previous flip-flop by two, consequently the
74AHC1G4210-Q100 counts up to 210 = 1024. The single inverting stage (X1 to X2) functions as
a crystal oscillator or an input buffer for an external oscillator. When used as a buffer the output X2
should be left floating. The frequency of the output (Q) is the frequency applied to X1 divided by
1024. The divider advances on the negative-going transition of X1.
The X1 input is overvoltage tolerant. This feature allows the use of this device as a voltage level
translator in mixed voltage environments.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100
(Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
•
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
•
•
•
•
•
•
Wide supply voltage range from 2.0 V to 5.5 V
Overvoltage tolerant inputs to 5.5 V
High noise immunity
CMOS low power dissipation
ESD protection:
•
•
•
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F: exceeds 2000 V
CDM JESD22-C101E: exceeds 1000 V
•
Latch-up performance exceeds 100 mA per JESD 78 Class II
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
Version
74AHC1G4210GW-Q100
-40 °C to +125 °C
TSSOP5
plastic thin shrink small outline package;
5 leads; body width 1.25 mm
SOT353-1
4. Marking
Table 2. Marking codes
Type number
Marking[1]
74AHC1G4210GW-Q100
C1
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
Nexperia
74AHC1G4210-Q100
10-stage divider and oscillator
5. Functional diagram
X2
X1
X1
X2
Q
FF1
FF2
FF10
1
2
4
D
D
D
10-STAGE
COUNTER
CP
CP
CP
Q1
Q2
Q10
Q
aaa-022698
aaa-022699
Fig. 1. Logic symbol
Fig. 2. Logic diagram
6. Pinning information
6.1. Pinning
74AHC1G4210
1
2
3
5
4
X1
X2
V
CC
GND
Q
aaa-022700
Fig. 3. Pin configuration SOT353-1 (TSSOP5)
6.2. Pin description
Table 3. Pin description
Symbol
X1
Pin
1
Description
clock input/oscillator pin
oscillator pin
X2
2
GND
Q
3
ground (0 V)
4
divider output
VCC
5
supply voltage
7. Functional description
1
2
4
8
16
32
64
128
256
512 1024 2048 3072 4096 5120
X1
Q
aaa-022702
Fig. 4. Timing diagram
©
74AHC1G4210_Q100
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Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 3 — 11 January 2022
2 / 11
Nexperia
74AHC1G4210-Q100
10-stage divider and oscillator
8. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
-0.5
-0.5
-20
-
Max
+7.0
+7.0
-
Unit
V
VCC
VI
supply voltage
input voltage
V
IIK
input clamping current
output clamping current
output current
VI < -0.5 V
mA
mA
mA
mA
mA
°C
IOK
IO
VO < -0.5 V or VO > VCC + 0.5 V
-0.5 V < VO < VCC + 0.5 V
[1]
[2]
±20
±25
75
-
ICC
IGND
Tstg
Ptot
supply current
-
ground current
-75
-65
-
-
storage temperature
total power dissipation
+150
250
Tamb = -40 °C to +125 °C
mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SOT353-1 (TSSOP5) package: Ptot derates linearly with 3.3 mW/K above 74 °C.
9. Recommended operating conditions
Table 5. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
2.0
0
Typ
Max
5.5
Unit
V
VCC
VI
supply voltage
5.0
input voltage
-
5.5
V
VO
output voltage
0
-
VCC
+125
100
20
V
Tamb
Δt/ΔV
ambient temperature
input transition rise and fall rate
-40
-
+25
°C
VCC = 3.3 V ± 0.3 V
VCC = 5.0 V ± 0.5 V
-
-
ns/V
ns/V
-
©
74AHC1G4210_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 3 — 11 January 2022
3 / 11
Nexperia
74AHC1G4210-Q100
10-stage divider and oscillator
10. Static characteristics
Table 6. Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
25 °C
-40 °C to +85 °C -40 °C to +125 °C Unit
Min Typ Max
Min
Max
Min
Max
VIH
HIGH-level
X1
input voltage
VCC = 2.0 V
1.7
2.4
4.4
-
-
-
-
-
-
1.7
2.4
4.4
-
-
-
1.7
2.4
4.4
-
-
-
V
V
V
VCC = 3.0 V
VCC = 5.5 V
VIL
LOW-level
X1
input voltage
VCC = 2.0 V
VCC = 3.0 V
VCC = 5.5 V
-
-
-
-
-
-
0.3
0.6
1.1
-
-
-
0.3
0.6
1.1
-
-
-
0.3
0.6
1.1
V
V
V
VOH
HIGH-level
Q; VI = VIH or VIL
output voltage
IO = -50 μA; VCC = 2.0 V
IO = -50 μA; VCC = 3.0 V
IO = -50 μA; VCC = 4.5 V
1.9
2.9
4.4
2.0
3.0
4.5
-
-
-
-
-
-
1.9
2.9
-
-
-
-
-
1.9
2.9
-
-
-
-
-
V
V
V
V
V
4.4
4.4
IO = -4.0 mA; VCC = 3.0 V 2.58
IO = -8.0 mA; VCC = 4.5 V 3.94
X2; VI = VIH or VIL
2.48
3.8
2.40
3.70
-
IO = -50 μA; VCC = 2.0 V
IO = -50 μA; VCC = 3.0 V
IO = -50 μA; VCC = 4.5 V
1.9
2.9
4.4
2.0
3.0
4.5
-
-
-
-
-
-
1.9
2.9
-
-
-
-
-
1.9
2.9
-
-
-
-
-
V
V
V
V
V
4.4
4.4
IO = -2.0 mA; VCC = 3.0 V 2.58
IO = -3.0 mA; VCC = 4.5 V 3.94
Q; VI = VIH or VIL
2.48
3.8
2.40
3.70
-
VOL
LOW-level
output voltage
IO = 50 μA; VCC = 2.0 V
IO = 50 μA; VCC = 3.0 V
IO = 50 μA; VCC = 4.5 V
IO = 4.0 mA; VCC = 3.0 V
IO = 8.0 mA; VCC = 4.5 V
X2; VI = VIH or VIL
-
-
-
-
-
0
0
0
-
0.1
0.1
-
-
-
-
-
0.1
0.1
-
-
-
-
-
0.1
0.1
V
V
V
V
V
0.1
0.1
0.1
0.36
0.36
0.44
0.44
0.55
0.55
-
IO = 50 μA; VCC = 2.0 V
IO = 50 μA; VCC = 3.0 V
IO = 50 μA; VCC = 4.5 V
IO = 2.0 mA; VCC = 3.0 V
IO = 3.0 mA; VCC = 4.5 V
-
-
-
-
-
-
0
0
0
-
0.1
0.1
-
-
-
-
-
-
0.1
0.1
-
-
-
-
-
-
0.1
0.1
V
V
0.1
0.1
0.1
V
0.36
0.36
0.1
0.44
0.44
1.0
0.55
0.55
2.0
V
-
V
II
input leakage X1; VI = 5.5 V or GND;
current VCC = 0 V to 5.5 V
-
μA
ICC
CI
supply current VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
-
-
-
1.0
8
-
-
10
8
-
-
40
8
μA
pF
input
X1
3
capacitance
©
74AHC1G4210_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 3 — 11 January 2022
4 / 11
Nexperia
74AHC1G4210-Q100
10-stage divider and oscillator
11. Dynamic characteristics
Table 7. Dynamic characteristics
GND = 0 V; tr = tf = ≤ 3.0 ns. For test circuit see Fig. 7. For waveforms see Fig. 5 and Fig. 6.
Symbol Parameter Conditions
25 °C
-40 °C to +85 °C -40 °C to +125 °C Unit
Min Typ Max
Min
Max
Min
Max
tpd
propagation X1 to X2
delay
[1]
[2]
VCC = 3.0 V to 3.6 V
CL = 15 pF
-
-
3
7
7
1
1
11
16
1
1
13
18
ns
ns
CL = 50 pF
13
VCC = 4.5 V to 5.5 V
CL = 15 pF
[3]
-
-
2
6
5
1
1
7
1
1
9
ns
ns
CL = 50 pF
10
11
12
X1 to Q
[1]
[2]
VCC = 3.0 V to 3.6 V
CL = 15 pF
-
-
24
26
41
45
1
1
50
53
1
1
59
63
ns
ns
CL = 50 pF
VCC = 4.5 V to 5.5 V
CL = 15 pF
[3]
-
-
17
19
27
30
1
1
33
38
1
1
39
44
ns
ns
CL = 50 pF
tW
pulse width X1 HIGH or LOW
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
4
3
-
-
-
-
5
4
-
-
7
5
-
-
ns
ns
fmax
maximum
frequency
X1
VCC = 3.3 V
VCC = 5 V
125
165
-
-
-
-
100
125
-
-
70
-
-
MHz
MHz
100
CPD
power
dissipation
capacitance
CL = 50 pF; fi = 1 MHz;
VI = GND to VCC
[4]
VCC = 3.3 V
VCC = 5 V
-
-
4
5
-
-
-
-
-
-
-
-
-
-
pF
pF
[1] tpd is the same as tPLH and tPHL
.
[2] Typical values are measured at VCC = 3.3 V.
[3] Typical values are measured at VCC = 5.0 V.
[4] CPD is used to determine the dynamic power dissipation PD (μW).
PD = CPD x VCC 2 x fi + CL x VCC 2 x fi/1024 where:
fi = input frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volt.
©
74AHC1G4210_Q100
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Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 3 — 11 January 2022
5 / 11
Nexperia
74AHC1G4210-Q100
10-stage divider and oscillator
11.1. Waveforms and test circuit
V
I
1/f max
V
I
V
M
X1 input
X1 input
V
M
GND
t
W
GND
t
t
t
t
PHL
PLH
PHL
PLH
V
V
OH
OH
V
V
M
X2 output
Q output
M
V
OL
V
OL
aaa-022703
aaa-022704
Measurement points are given in Table 8.
Measurement points are given in Table 8.
VOL and VOH are typical output voltage levels that
occur with the output load.
VOL and VOH are typical output voltage levels that
occur with the output load.
Fig. 5. Input X1 to output X2 propagation delay times
Fig. 6. Input X1 to output Q propagation delay times
Table 8. Measurement points
Inputs
Output
VM
VI
VM
GND to VCC
0.5 × VCC
0.5 × VCC
V
CC
V
V
O
I
PULSE
GENERATOR
DUT
C
L
R
T
mna101
Test data is given in Table 7.
Definitions for test circuit:
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
Fig. 7. Test circuit for measuring switching times
©
74AHC1G4210_Q100
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Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 3 — 11 January 2022
6 / 11
Nexperia
74AHC1G4210-Q100
10-stage divider and oscillator
12. Crystal oscillator
12.1. Typical crystal oscillator circuit
A typical crystal oscillator schematic is shown in Fig. 8. R1 is the power limiting resistor, its value
depends on the frequency and required stability against changes in VCC or average ICC. For
starting and maintaining oscillation a minimum transconductance is necessary, so R1 should not be
too large. A practical value for R1 is 2.2 kΩ.
74AHC1G4210
X1
1
R
bias
= 560 kΩ
2
V
X2
CC
Rbias
100 kΩ to 1 MΩ
0.47 µF
100 µF
input
output
R1
2.2 kΩ
V
I
A
I
O
(f = 1 kHz)
GND
mna050
C1
22 pF to 37 pF
C2
100 pF
gfs = ΔIO / ΔVI at VO is constant.
See also Fig. 10.
aaa-022705
Fig. 8. External component connection for a crystal
oscillator
Fig. 9. Test set-up for measuring forward
transconductance
aaa-022706
20
g
fs
(1)
(mA/V)
16
(2)
(3)
12
8
4
0
1
2
3
4
5
6
V
(V)
CC
Tamb = 25 °C.
(1) Maximum.
(2) Typical.
(3) Minimum.
Fig. 10. Typical forward transconductance as function of the supply voltage
©
74AHC1G4210_Q100
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Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 3 — 11 January 2022
7 / 11
Nexperia
74AHC1G4210-Q100
10-stage divider and oscillator
13. Package outline
TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm
SOT353-1
D
B
E
A
X
c
(5x)
y
H
E
v
M
A
e
1
5
4
pin 1 index
A
A
2
A
1
1
2
3
A
3
θ
L
w
M B
p
b
p
(5x)
detail X
e
e
0
3 mm
scale
Dimensions (mm are the original dimensions)
Unit
(1)
(1)
A
A
A
A
b
c
D
E
e
e
1
H
E
L
p
v
w
y
θ
1
2
3
p
max 1.1 0.1 1.0
0.8 0.8
0.30 0.25 2.2 1.35
0.15 0.08 1.8 1.15
2.4 0.46
1.8 0.26
8°
0°
mm
0.15
0.65 1.3
0.3 0.1 0.1
0
min
Note
1. Plastic or metal protrusions of 0.2 mm maximum per side are not included.
sot353-1_po
References
Outline
version
European
projection
Issue date
IEC
JEDEC
JEITA
21-12-15
21-12-16
SOT353-1
SC-88A
MO-203
Fig. 11. Package outline SOT353-1 (TSSOP5)
©
74AHC1G4210_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 3 — 11 January 2022
8 / 11
Nexperia
74AHC1G4210-Q100
10-stage divider and oscillator
14. Abbreviations
Table 9. Abbreviations
Acronym
CDM
Description
Charged Device Model
Complementary Metal-Oxide Semiconductor
Device Under Test
CMOS
DUT
ESD
ElectroStatic Discharge
Human Body Model
HBM
MIL
Military
15. Revision history
Table 10. Revision history
Document ID
Release date Data sheet status
20220111 Product data sheet
Fig. 11: Package outline drawing SOT353-1 (TSSOP5) updated.
Change notice Supersedes
74AHC1G4210_Q100 v.3
Modifications:
- 74AHC1G4210_Q100 v.2
•
74AHC1G4210_Q100 v.2
Modifications:
20190627
Product data sheet
-
74AHC1G4210_Q100 v.1
•
Typo corrected in Fig. 4.
74AHC1G4210_Q100 v.1
20180726
Product data sheet
-
-
©
74AHC1G4210_Q100
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Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 3 — 11 January 2022
9 / 11
Nexperia
74AHC1G4210-Q100
10-stage divider and oscillator
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Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
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Definition
[1][2]
status [3]
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data sheet
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the objective specification for
product development.
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data sheet
Qualification
Production
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the preliminary specification.
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data sheet
This document contains the product
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©
74AHC1G4210_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 3 — 11 January 2022
10 / 11
Nexperia
74AHC1G4210-Q100
10-stage divider and oscillator
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Ordering information....................................................1
4. Marking..........................................................................1
5. Functional diagram.......................................................2
6. Pinning information......................................................2
6.1. Pinning.........................................................................2
6.2. Pin description.............................................................2
7. Functional description................................................. 2
8. Limiting values............................................................. 3
9. Recommended operating conditions..........................3
10. Static characteristics..................................................4
11. Dynamic characteristics.............................................5
11.1. Waveforms and test circuit........................................ 6
12. Crystal oscillator........................................................ 7
12.1. Typical crystal oscillator circuit.................................. 7
13. Package outline.......................................................... 8
14. Abbreviations..............................................................9
15. Revision history..........................................................9
16. Legal information......................................................10
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Date of release: 11 January 2022
©
74AHC1G4210_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 3 — 11 January 2022
11 / 11
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