UPD23C16000ALGY-XXX-MKH [NEC]
MASK ROM, 2MX8, 100ns, MOS, PDSO48, 12 X 18 MM, PLASTIC, REVERSE, TSOP1-48;
| 型号： | UPD23C16000ALGY-XXX-MKH |
| 厂家： | 
NEC |
| 描述： | MASK ROM, 2MX8, 100ns, MOS, PDSO48, 12 X 18 MM, PLASTIC, REVERSE, TSOP1-48 有原始数据的样本ROM 光电二极管 内存集成电路 |
| 文件： | 总16页 (文件大小：112K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
MOS INTEGRATED CIRCUIT
µ
PD23C16000AL
16M-BIT MASK-PROGRAMMABLE ROM
2M-WORD BY 8-BIT(BYTE MODE) / 1M-WORD BY 16-BIT(WORD MODE)
Description
The µPD23C16000AL is a 16,777,216 bits mask-programmable ROM. The word organization is selectable (BYTE
mode: 2,097,152 words by 8 bits, WORD mode: 1,048,576 words by 16 bits).
The active levels of OE (Output Enable Input) can be selected with mask-option.
The µPD23C16000AL are packed in 48-pin plastic TSOP(I).
•
Features
• Word organization
2,097,152 words by 8 bits (BYTE mode)
1,048,576 words by 16 bits (WORD mode)
• Operating supply voltage : 2.7 V to 3.6 V
Operating supply voltage
VCC
Access time
ns (MAX.)
Power supply current (Active mode) Standby current (CMOS level input)
mA(MAX.)
µA(MAX.)
3.3 V ± 0.3 V
3.0 V ± 0.3 V
85
45
40
30
100
30
•
Ordering Information
Part Number
Package
µPD23C16000ALGY-xxx-MJH
µPD23C16000ALGY-xxx-MKH
48-pin Plastic TSOP(I) (12 x 18 mm)(Normal bent)
48-pin Plastic TSOP(I) (12 x 18 mm)(Reverse bent)
(xxx: ROM code suffix No.)
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
The mark • shows major revised points.
Document No. M13740EJ2V0DS00 (2nd edition)
Date Published March 1999 NS CP(K)
Printed in Japan
1998
©
µPD23C16000AL
•
Pin Configuration (Marking Side)
48-pin plastic TSOP(I) (12 x 18 mm) (Normal bent)
[µPD23C16000ALGY-xxx-MJH]
WORD, /BYTE
A16
A15
A14
A13
A12
A11
A10
A9
1
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
GND
GND
O15, A−1
O7
2
3
4
5
O14
O6
6
7
O13
O5
8
9
O12
O4
A8
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
A19
NC
V
CC
CC
V
NC
NC
A18
A17
A7
O11
O3
O10
O2
A6
A5
O9
A4
O1
A3
O8
A2
O0
A1
/OE, OE, DC
GND
GND
A0
/CE
A0 - A19
: Address inputs
O0 - O7, O8 - O14 : Data outputs
O15, A–1
: Data 15 output(WORD mode),
LSB address input(BYTE mode)
: Mode select
WORD, /BYTE
/CE
: Chip Enable
/OE, OE
VCC
: Output Enable
: Supply voltage
: Ground
GND
NC Note
: No Connection
: Don’t Care
DC
Note Some signals can be applied because this pin is not connected to the inside of the chip.
Data Sheet M13740EJ2V0DS00
2
µPD23C16000AL
48-pin plastic TSOP(I) (12 x 18 mm) (Reverse bent)
[µPD23C16000ALGY-xxx-MKH]
GND
GND
O15, A−1
O7
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1
2
WORD, /BYTE
A16
A15
A14
A13
A12
A11
A10
A9
3
4
O14
5
O6
6
O13
7
O5
8
O12
9
O4
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
A8
V
CC
CC
A19
NC
V
NC
NC
O11
A18
A17
A7
O3
O10
O2
A6
O9
A5
O1
O8
A4
A3
O0
A2
/OE, OE, DC
GND
A1
A0
GND
/CE
A0 - A19
: Address inputs
O0 - O7, O8 - O14 : Data outputs
O15, A–1
: Data 15 output(WORD mode),
LSB address input(BYTE mode)
: Mode select
WORD, /BYTE
/CE
: Chip Enable
/OE, OE
VCC
: Output Enable
: Supply voltage
: Ground
GND
NC Note
: No Connection
: Don’t Care
DC
Note Some signals can be applied because this pin is not connected to the inside of the chip.
Data Sheet M13740EJ2V0DS00
3
µPD23C16000AL
Input/Output Pin Functions
Pin name
Input/Output
Input
Function
WORD, /BYTE
The pin for switching BYTE mode and WORD mode.
High level : WORD mode (1M-word by 16-bit)
Low level : BYTE mode (2M-word by 8-bit)
•
•
A0 to A19
Address input pin.
(Address inputs)
A0 to A19 are used differently in the WORD mode and the BYTE mode.
WORD mode (1M-word by 16-bit)
A0 to A19 are used as 20 bits address signals.
BYTE mode (2M-word by 8-bit)
A0 to A19 are used as the upper 20 bits of total 21 bits of address signal.
(The least significant bit (A−1) is combined to O15.)
Data output pin.
O0 to O7,
Output
O8 to O14
(Data output)
O0 to O7, O8 to O14 are used differently in the WORD mode and the BYTE mode.
WORD mode (1M-word by 16-bit)
The lower 15 bits of 16 bits data outputs to O0 to O14.
(The most significant bit (O15) combined to A−1.)
BYTE mode (2M-word by 8-bit)
8 bits data outputs to O0 to O7 and also O8 to O14 are high impedance.
O15, A−1
Output, Input O15, A−1 are used differently in the WORD mode and the BYTE mode.
WORD mode (1M-word by 16-bit)
(Data output 15) ,
(LSB Address input)
The most significant output data bus (O15).
BYTE mode (2M-word by 8-bit)
The least significant address bus (A−1).
/CE
Input
Chip activating signal.
(Chip Enable)
When the OE is active, output states are following.
High level : High impedance
Low level : Data out
/OE, OE, DC
Output enable signal. The active level of OE is mask option. The active level of OE
can be selected from high active, low active and Don’t care at order.
(Output Enable, Don't care)
VCC
−
−
−
Supply voltage
GND
NC
Ground
Not internally connected. (The signal can be connected.)
Data Sheet M13740EJ2V0DS00
4
µPD23C16000AL
Block Diagram
O8
O9
O10 O11 O12 O13 O14 O15, A–1
O2
O3 O4
O5 O6 O7
O0
O1
A0
A1
A2
A3
A4
A5
Output Buffer
Y-Selector
WORD, /BYTE
/OE, OE, DC
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
Memory Cell Matrix
1,048,576 words by 16 bits/2,097,152 words by 8 bits
/CE
A18
A19
Data Sheet M13740EJ2V0DS00
5
µPD23C16000AL
Mask Option
The active levels of output enable pin (/OE, OE, DC) are mask programmable and optional, and can be selected from
among " 0 " " 1 " " x " shown in the table below.
Option
/OE, OE, DC
OE active level
0
1
x
/OE
OE
DC
L
H
Don’t care
Operation modes for each option are shown in the tables below.
Operation mode (Option: 0)
/CE
L
/OE
L
Mode
Active
Output state
Data out
H
High impedance
High impedance
H
H or L
Standby
Operation mode (Option: 1)
/CE
L
OE
L
Mode
Active
Output state
High impedance
Data out
H
H
H or L
Standby
High impedance
Operation mode (Option: x)
/CE
L
DC
Mode
Active
Output state
Data out
H or L
H or L
H
Standby
High impedance
Remark L: Low level input
H: High level input
Data Sheet M13740EJ2V0DS00
6
µPD23C16000AL
Electrical Specifications
Absolute Maximum Ratings
Parameter
Supply voltage
Symbol
VCC
VI
Condition
Rating
Unit
V
–0.3 to +4.6
–0.3 to VCC+0.3
–0.3 to VCC+0.3
–10 to +70
Input voltage
V
Output voltage
VO
V
Operating ambient temperature
Storage temperature
TA
°C
°C
Tstg
–65 to +150
Caution Exposing the device to stress above those listed in Absolute Maximum Ratings could cause permanent
damage. The device is not meant to be operated under conditions outside the limits described in the
operational section of this specification. Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability.
Capacitance (TA = 25 °C)
Parameter
Symbol
CI
Test condition
MIN.
TYP.
MAX.
10
Unit
pF
Input capacitance
Output capacitance
f = 1 MHz
CO
12
pF
DC Characteristics (TA = –10 to +70 °C, VCC = 2.7 to 3.6 V)
Parameter
High level input voltage
Low level input voltage
Symbol
VIH
Test conditions
MIN.
2.0
TYP.
MAX.
VCC + 0.3
+0.5
Unit
V
VIL
VCC = 3.0 V ± 0.3 V
–0.3
–0.3
2.4
V
VCC = 3.3 V ± 0.3 V
+0.8
High level output voltage
Low level output voltage
Input leakage current
Output leakage current
Power supply current
VOH
VOL
ILI
IOH = –100 µA
V
V
IOL = 2.1 mA
0.4
+10
+10
40
VI = 0 V to VCC
–10
–10
µA
µA
mA
ILO
VO = 0 V to VCC, Chip deselected
/CE = VIL(Active mode), VCC = 3.0 V ± 0.3 V
ICC1
IO = 0 mA
VCC = 3.3 V ± 0.3 V
45
Standby current
ICC3
/CE = V
CC – 0.2 V (Standby mode)
30
µA
Data Sheet M13740EJ2V0DS00
7
µPD23C16000AL
• AC Characteristics (TA = –10 to +70 °C, VCC = 2.7 to 3.6 V)
Parameter
Symbol Test condition
VCC = 3.0 V ± 0.3 V
MIN. TYP. MAX.
VCC = 3.3 V ± 0.3 V
Unit
MIN.
TYP.
MAX.
85
Address access time
Chip enable access time
Output enable access time
Output hold time
tACC
tCE
100
100
30
ns
ns
ns
ns
ns
ns
85
tOE
tOH
tDF
25
0
0
0
0
Output disable time
30
25
85
WORD, /BYTE access time
tWB
100
Remark
DF
t
is the time from inactivation of /CE or /OE, OE to high-impedance state output.
AC Test Conditions
Input waveform (Rise Fall time ≤ 5 ns)
/
1.4 V
Test points
1.4 V
Output waveform
1.4 V
Test points
1.4 V
Output load
1TTL + 100 pF
Data Sheet M13740EJ2V0DS00
8
µPD23C16000AL
Read Cycle Timing Chart
A0 to A19,
(Input)
A–1Note 1
t
ACC
/CE (Input)
Note 2
DF
t
CE
t
/OE, OE (Input)
t
OE
t
OH
O0 to O7,Note 3
(Output)
High impedance
Data Out
O8 to O15
Notes 1. During WORD mode, A–1 is O15.
2. tDF is specified when one of /CE, /OE, OE is inactivated.
3. During BYTE mode, O8 to O14 are high impedance and O15 is A–1.
WORD, /BYTE Switch Timing Chart
High impedance
A–1 (Input)
High impedance
(Input)
WORD, /BYTE
tOH
t
ACC
t
OH
t
WB
O0 to O7 (Output)
O8 to O15 (Output)
Data Out
Data Out
Data Out
Data Out
t
DF
High impedance
Data Out
Remark /OE, OE and /CE : Active.
Data Sheet M13740EJ2V0DS00
9
µPD23C16000AL
•
Package Drawings
48 PIN PLASTIC TSOP (I) (12×18)
detail of lead end
1
48
F
G
R
Q
L
24
25
S
E
P
I
A
J
C
S
B
K
N
S
M
M
D
NOTES
ITEM MILLIMETERS
INCHES
+0.005
1. Controlling dimension
Millimeter.
A
12.0±0.1
0.472
–0.004
2. Each lead centerline is located within 0.10 mm (0.004 inch) of
its true position (T.P.) at maximum material condition.
B
C
0.45 MAX.
0.5 (T.P.)
0.018 MAX.
0.020 (T.P.)
3. "A" excludes mold flash. (Includes mold flash : 12.4 mm MAX.
<0.489 inch MAX.>)
+0.002
0.009
D
0.22±0.05
–0.003
E
F
0.1±0.05
1.2 MAX.
0.004±0.002
0.048 MAX.
+0.003
0.039
G
I
1.0±0.05
16.4±0.1
0.8±0.2
–0.002
+0.004
0.646
–0.005
+0.009
0.031
J
–0.008
+0.002
0.006
K
0.145±0.05
–0.003
L
M
N
0.5
0.020
0.004
0.004
0.10
0.10
+0.008
0.709
P
18.0±0.2
–0.009
+5˚
3˚
+5˚
3˚
Q
R
S
–3˚
–3˚
0.25
0.010
+0.006
0.024
0.60±0.15
–0.007
S48GY-50-MJH1
Data Sheet M13740EJ2V0DS00
10
µPD23C16000AL
48 PIN PLASTIC TSOP (I) (12×18)
detail of lead end
1
48
E
S
L
Q
R
G
24
25
S
F
K
M
M
N
S
D
B
C
I
J
A
P
NOTES
ITEM MILLIMETERS
INCHES
+0.005
1. Controlling dimension
Millimeter.
A
12.0±0.1
0.472
–0.004
2. Each lead centerline is located within 0.10 mm (0.004 inch) of
its true position (T.P.) at maximum material condition.
B
C
0.45 MAX.
0.5 (T.P.)
0.018 MAX.
0.020 (T.P.)
3. "A" excludes mold flash. (Includes mold flash : 12.4 mm MAX.
<0.489 inch MAX.>)
+0.002
0.009
D
0.22±0.05
–0.003
E
F
0.1±0.05
1.2 MAX.
0.004±0.002
0.048 MAX.
+0.003
0.039
G
I
1.0±0.05
16.4±0.1
0.8±0.2
–0.002
+0.004
0.646
–0.005
+0.009
0.031
J
–0.008
+0.002
0.006
K
0.145±0.05
–0.003
L
M
N
0.5
0.020
0.004
0.004
0.10
0.10
+0.008
0.709
P
18.0±0.2
–0.009
+5˚
3˚
+5˚
3˚
Q
R
S
–3˚
–3˚
0.25
0.010
+0.006
0.024
0.60±0.15
–0.007
S48GY-50-MKH1
Data Sheet M13740EJ2V0DS00
11
µPD23C16000AL
Recommended Soldering Conditions
Please consult with our sales offices for soldering conditions of the µPD23C16000AL.
•
Types of Surface Mount Device
µPD23C16000ALGY-MJH
µPD23C16000ALGY-MKH
: 48-pin plastic TSOP(I)(12 x 18 mm)(Normal bent)
: 48-pin plastic TSOP(I)(12 x 18 mm)(Reverse bent)
Data Sheet M13740EJ2V0DS00
12
µPD23C16000AL
[MEMO]
Data Sheet M13740EJ2V0DS00
13
µPD23C16000AL
[MEMO]
Data Sheet M13740EJ2V0DS00
14
µPD23C16000AL
NOTES FOR CMOS DEVICES
1
PRECAUTION AGAINST ESD FOR SEMICONDUCTORS
Note:
Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and
ultimately degrade the device operation. Steps must be taken to stop generation of static electricity
as much as possible, and quickly dissipate it once, when it has occurred. Environmental control
must be adequate. When it is dry, humidifier should be used. It is recommended to avoid using
insulators that easily build static electricity. Semiconductor devices must be stored and transported
in an anti-static container, static shielding bag or conductive material. All test and measurement
tools including work bench and floor should be grounded. The operator should be grounded using
wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need
to be taken for PW boards with semiconductor devices on it.
2
HANDLING OF UNUSED INPUT PINS FOR CMOS
Note:
No connection for CMOS device inputs can be cause of malfunction. If no connection is provided
to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence
causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels
of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused
pin should be connected to VDD or GND with a resistor, if it is considered to have a possibility of
being an output pin. All handling related to the unused pins must be judged device by device and
related specifications governing the devices.
3
STATUS BEFORE INITIALIZATION OF MOS DEVICES
Note:
Power-on does not necessarily define initial status of MOS device. Production process of MOS
does not define the initial operation status of the device. Immediately after the power source is
turned ON, the devices with reset function have not yet been initialized. Hence, power-on does
not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the
reset signal is received. Reset operation must be executed immediately after power-on for devices
having reset function.
Data Sheet M13740EJ2V0DS00
15
µPD23C16000AL
The export of this product from Japan is regulated by the Japanese government. To export this product may be prohibited
without governmental license, the need for which must be judged by the customer. The export or re-export of this product
from a country other than Japan may also be prohibited without a license from that country. Please call an NEC sales
representative.
• The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
• No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in
this document.
• NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property
rights of third parties by or arising from use of a device described herein or any other liability arising from use
of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other
intellectual property rights of NEC Corporation or others.
• Descriptions of circuits, software, and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these circuits,
software, and information in the design of the customer's equipment shall be done under the full responsibility
of the customer. NEC Corporation assumes no responsibility for any losses incurred by the customer or third
parties arising from the use of these circuits, software, and information.
• While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices,
the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or
property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety
measures in its design, such as redundancy, fire-containment, and anti-failure features.
• NEC devices are classified into the following three quality grades:
"Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a
customer designated "quality assurance program" for a specific application. The recommended applications of
a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device
before using it in a particular application.
Standard: Computers, office equipment, communications equipment, test and measurement equipment,
audio and visual equipment, home electronic appliances, machine tools, personal electronic
equipment and industrial robots
Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
for life support)
Specific: Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life
support systems or medical equipment for life support, etc.
The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books.
If customers intend to use NEC devices for applications other than those specified for Standard quality grade,
they should contact an NEC sales representative in advance.
M7 98. 8
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