UPD120N18T1B [NEC]
THREE-TERMINAL LOW-DROPOUT POSITIVE-VOLTAGE REGULATOR (OUTPUT CURRENT: 0.3 A); 三端低压差正电压稳压器（输出电流： 0.3 A）
| 型号： | UPD120N18T1B |
| 厂家： | 
NEC |
| 描述： | THREE-TERMINAL LOW-DROPOUT POSITIVE-VOLTAGE REGULATOR (OUTPUT CURRENT: 0.3 A) |
| 文件： | 总15页 (文件大小：157K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
MOS INTEGRATED CIRCUIT
µPD120Nxx Series
THREE-TERMINAL LOW-DROPOUT POSITIVE-VOLTAGE REGULATOR
(OUTPUT CURRENT: 0.3 A)
DESCRIPTION
The µPD120Nxx series provides low-voltage output regulators with the output current capacitance of 0.3 A. The
output voltage varies according to the product (1.5 V, 1.8 V, 2.5 V, or 3.3 V). The circuit current is low due to the
CMOS structure, so the power consumption in the ICs can be reduced. Moreover, since ICs are mounted in the small
package of the µPD120Nxx series, this contributes to the miniaturization of the application set.
FEATURES
• Output current: 0.3 A
• On-chip overcurrent protection circuit
• On-chip thermal protection circuit
• Small circuit operation current: 60 µA TYP.
APPLICATIONS
Digital TV, Audio, HDD, DVD, etc.
PIN CONFIGURATION (Marking Side)
SC-74A
SC-62
GND
N.C.
GND
5
4
1
2
3
1
2
3
OUTPUT
INPUT
OUTPUT
INPUT
GND
GND
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. S17145EJ2V0DS00 (2nd edition)
Date Published February 2005 NS CP(K)
Printed in Japan
2005
µPD120Nxx Series
BLOCK DIAGRAM
INPUT
Overcurrent
Protection Circuit
Reference
Voltage
Circuit
+
Error
Amp.
−
OUTPUT
Thermal
Protection Circuit
GND
2
Data Sheet S17145EJ2V0DS
µPD120Nxx Series
ORDERING INFORMATION
Part Number
µ PD120N15TA
µ PD120N15T1B
µ PD120N18TA
µ PD120N18T1B
µ PD120N25TA
µ PD120N25T1B
µ PD120N33TA
µ PD120N33T1B
Package
Output Voltage
1.5 V
Marking
K71
7D
SC-74A
SC-62
1.5 V
SC-74A
SC-62
1.8 V
K72
7E
1.8 V
SC-74A
SC-62
2.5 V
K73
7F
2.5 V
SC-74A
SC-62
.3.3 V
3.3 V
K74
7G
Remark -E1 or -E2 is suffixed to the end of the part number of taping products, and -A or -AZ to that of Pb-free
products. See the table below for details.
Note1
Part Number
µ PD120NxxTA
µ PD120NxxTA-A
Package
SC-74A
SC-74A
SC-74A
Package Type
• Unit
• Unit
Note2
µ PD120NxxTA-E1
µ PD120NxxTA-E1-A
µ PD120NxxTA-E2
µ PD120NxxTA-E2-A
µ PD120NxxT1B
• 8 mm wide embossed taping
• Pin 1 on take-up side
• 3000 pcs/reel (MAX.)
Note2
Note2
SC-74A
SC-74A
SC-74A
• 8 mm wide embossed taping
• Pin 1 on take-up side
• 3000 pcs/reel (MAX.)
• 8 mm wide embossed taping
• Pin 1 on draw-out side
• 3000 pcs/reel (MAX.)
• 8 mm wide embossed taping
• Pin 1 on draw-out side
• 3000 pcs/reel (MAX.)
• Unit
SC-62
SC-62
SC-62
Note3
µ PD120NxxT1B-AZ
µ PD120NxxT1B-E1
• Unit
• 12 mm wide embossed taping
• Pin 1 on take-up side
• 1000 pcs/reel (MAX.)
Note3
Note3
µ PD120NxxT1B-E1-AZ
µ PD120NxxT1B-E2
SC-62
SC-62
SC-62
• 12 mm wide embossed taping
• Pin 1 on take-up side
• 1000 pcs/reel (MAX.)
• 12 mm wide embossed taping
• Pin 1 on draw-out side
• 1000 pcs/reel (MAX.)
µ PD120NxxT1B-E2-AZ
• 12 mm wide embossed taping
• Pin 1 on draw-out side
• 1000 pcs/reel (MAX.)
Notes 1. xx stands for symbols that indicate the output voltage.
2. Pb-free (This product does not contain Pb in external electrode and other parts.)
3. Pb-free (This product does not contain Pb in external electrode.)
3
Data Sheet S17145EJ2V0DS
µPD120Nxx Series
ABSOLUTE MAXIMUM RATINGS (TA = 25°C, unless otherwise specified.)
Parameter
Symbol
Rating
Unit
µ PD120NxxTA
µ PD120NxxT1B
Input Voltage
VIN
−0.3 to +6
V
Note1
Note2
Note3
Power Dissipation
180/510
400/2000
PT
mW
°C
Operating Ambient Temperature
Operating Junction Temperature
Storage Temperature
TA
–40 to +85
–40 to +150
–55 to +150
TJ
°C
Tstg
Rth(J-A)
°C
Note2
Note3
695/245
315/62.5
Thermal Resistance (junction to ambient)
°C/W
Note 1. Internally limited. When the operating junction temperature rises over 150°C, the internal circuit shuts down
the output voltage.
2. Mounted on ceramic substrate of 75 mm2 x 0.7 mm
3. Mounted on ceramic substrate of 16 cm2 x 0.7 mm
Caution Product quality may suffer if the absolute maximum rating is exceeded even momentarily for any
parameter. That is, the absolute maximum ratings are rated values at which the product is on the
verge of suffering physical damage, and therefore the product must be used under conditions that
ensure that the absolute maximum ratings are not exceeded.
STANDARD CONNECTION
D1
µ
PD120Nxx
OUTPUT
INPUT
D2
CIN
COUT
CIN: 0.1 µF or higher. Set this value according to the length of the line between the regulator and INPUT pin. Be sure
to connect CIN to prevent parasitic oscillation. If using a laminated ceramic capacitor, it is necessary to ensure
that CIN is 0.1 µF or higher for the voltage and temperature range to be used.
COUT: 10 µF or higher. Be sure to connect COUT to prevent oscillation and improve excessive load regulation. Place
CIN and COUT as close as possible to the IC pins (within 2 cm). Be sure to use the capacitor of 10 µF or higher
of capacity values and 1 to 8 Ω of equivalent series resistance under an operating condition.
D1: If the OUTPUT pin has a higher voltage than the INPUT pin, connect a diode.
D2: If the OUTPUT pin has a lower voltage than the GND pin, connect a schottky barrier diode.
Caution Make sure that no voltage is applied to the OUTPUT pin from external.
4
Data Sheet S17145EJ2V0DS
µPD120Nxx Series
RECOMMENDED OPERATING CONDITIONS
Parameter
Input Voltage
Symbol
Type Number
MIN.
3.0
3.2
4.5
4.5
0
TYP.
MAX.
5.5
Unit
V
VIN
µ PD120N15
µ PD120N18
µ PD120N25
µ PD120N33
All
5.5
V
5.5
V
5.5
V
Output Current
IO
0.3
A
Operating Ambient Temperature TA
Operating Junction Temperature TJ
All
− 40
− 40
+ 85
+ 125
°C
°C
All
Caution Use of conditions other than the above-listed recommended operating conditions is not a problem
as long as the absolute maximum ratings are not exceeded. However, since the use of such
conditions diminishes the margin of safety, careful evaluation is required before such conditions are
used. Moreover, using the MAX. value for all the recommended operating conditions is not
guaranteed to be safe.
ELECTRICAL CHARACTERISTICS
µ PD120N15 (TJ = 25°C, VIN = 5.0 V, IO = 0.15 A, CIN = 0.1 µF, COUT = 10 µF, unless otherwise specified.)
Parameter
Output Voltage
Symbol
Conditions
MIN.
TYP.
1.5
−
MAX.
1.53
1.545
30
30
120
25
−
Unit
V
VO1
1.47
VO2
3.0 V ≤ VIN ≤ 5.5 V, 0 A ≤ IO ≤ 0.3 A
3.0 V ≤ VIN ≤ 5.5 V
0 A ≤ IO ≤ 0.3 A
1.455
V
Line Regulation
REGIN
REGL
IBIAS
−
−
1
mV
mV
µA
µA
µ Vr.m.s.
dB
Load Regulation
2
Quiescent Current
Quiescent Current Change
Output Noise Voltage
Ripple Rejection
IO = 0 A
−
60
−
∆IBIAS
Vn
3.0 V ≤ VIN ≤ 5.5 V
10 kHz ≤ f ≤ 100 kHz
f = 1 kHz, 3.0 V ≤ VIN ≤ 5.5 V
IO = 0.15 A
−
−
100
63
0.6
1.0
0.2
−
R•R
VDIF
−
−
Dropout Voltage
−
0.9
−
V
IO = 0.3 A
−
V
Short Circuit Current
Peak Output Current
Temperature Coefficient of
Output Voltage
IOshort
VIN = 5 V
−
−
A
IOpeak
VIN = 5 V
0.3
−
−
A
∆VO/∆T
IO = 0 A, 0°C ≤ TJ ≤ 125°C
0.01
−
mV/°C
µ PD120N18 (TJ = 25°C, VIN = 5.0 V, IO = 0.15 A, CIN = 0.1 µF, COUT = 10 µF, unless otherwise specified.)
Parameter
Output Voltage
Symbol
Conditions
MIN.
TYP.
1.8
−
MAX.
1.836
1.854
30
Unit
V
VO1
1.764
VO2
3.2 V ≤ VIN ≤ 5.5 V, 0 A ≤ IO ≤ 0.3 A
3.2 V ≤ VIN ≤ 5.5 V
0 A ≤ IO ≤ 0.3 A
1.746
V
Line Regulation
REGIN
REGL
IBIAS
−
−
1
mV
mV
µA
Load Regulation
2
30
Quiescent Current
Quiescent Current Change
Output Noise Voltage
Ripple Rejection
IO = 0 A
−
60
−
120
25
∆IBIAS
Vn
3.2 V ≤ VIN ≤ 5.5 V
10 kHz ≤ f ≤ 100 kHz
f = 1 kHz, 3.2 V ≤ VIN ≤ 5.5 V
IO = 0.15 A
−
µA
−
120
63
0.4
0.2
−
−
µ Vr.m.s.
dB
R•R
−
−
Dropout Voltage
VDIF
−
0.65
−
V
Short Circuit Current
Peak Output Current
Temperature Coefficient of
Output Voltage
IOshort
IOpeak
∆VO/∆T
VIN = 5 V
−
A
VIN = 5 V
0.3
−
−
A
IO = 0 A, 0°C ≤ TJ ≤ 125°C
0.01
−
mV/°C
5
Data Sheet S17145EJ2V0DS
µPD120Nxx Series
µ PD120N25 (TJ = 25°C, VIN = 5.0 V, IO = 0.15 A, CIN = 0.1 µF, COUT = 10 µF, unless otherwise specified.)
Parameter
Output Voltage
Symbol
Conditions
MIN.
TYP.
2.5
−
MAX.
2.55
2.575
30
Unit
V
VO1
2.45
VO2
4.5 V ≤ VIN ≤ 5.5 V, 0 A ≤ IO ≤ 0.3 A
4.5 V ≤ VIN ≤ 5.5 V
0 A ≤ IO ≤ 0.3 A
2.425
V
Line Regulation
REGIN
REGL
IBIAS
−
−
1
mV
mV
µA
Load Regulation
2
30
Quiescent Current
Quiescent Current Change
Output Noise Voltage
Ripple Rejection
IO = 0 A
−
60
−
120
25
∆IBIAS
Vn
4.5 V ≤ VIN ≤ 5.5 V
10 kHz ≤ f ≤ 100 kHz
f = 1 kHz, 4.5 V ≤ VIN ≤ 5.5 V
IO = 0.15 A
−
µA
−
170
60
0.3
0.2
−
−
µ Vr.m.s.
dB
R•R
−
−
Dropout Voltage
VDIF
−
0.7
−
V
Short Circuit Current
Peak Output Current
Temperature Coefficient of
Output Voltage
IOshort
IOpeak
∆VO/∆T
VIN = 5 V
−
A
VIN = 5 V
0.3
−
−
A
IO = 0 A, 0°C ≤ TJ ≤ 125°C
0.01
−
mV/°C
µ PD120N33 (TJ = 25°C, VIN = 5.0 V, IO = 0.15 A, CIN = 0.1 µF, COUT = 10 µF, unless otherwise specified.)
Parameter
Output Voltage
Symbol
Conditions
MIN.
TYP.
3.3
−
MAX.
3.366
3.399
30
Unit
V
VO1
3.234
VO2
4.5 V ≤ VIN ≤ 5.5 V, 0 A ≤ IO ≤ 0.3 A
4.5 V ≤ VIN ≤ 5.5 V
0 A ≤ IO ≤ 0.3 A
3.201
V
Line Regulation
REGIN
REGL
IBIAS
−
−
1
mV
mV
µA
Load Regulation
2
30
Quiescent Current
Quiescent Current Change
Output Noise Voltage
Ripple Rejection
IO = 0 A
−
60
−
120
25
∆IBIAS
Vn
4.5 V ≤ VIN ≤ 5.5 V
10 kHz ≤ f ≤ 100 kHz
f = 1 kHz, 4.5 V ≤ VIN ≤ 5.5 V
IO = 0.15 A
−
µA
−
220
60
0.2
0.2
−
−
µ Vr.m.s.
dB
R•R
−
−
Dropout Voltage
VDIF
−
0.6
−
V
Short Circuit Current
Peak Output Current
Temperature Coefficient of
Output Voltage
IOshort
IOpeak
∆VO/∆T
VIN = 5 V
−
A
VIN = 5 V
0.3
−
−
A
IO = 0 A, 0°C ≤ TJ ≤ 125°C
0.01
−
mV/°C
6
Data Sheet S17145EJ2V0DS
µPD120Nxx Series
TYPICAL CHARACTERISTICS (Reference Value)
Pd vs. TA (µ PD120NxxTA)
Pd vs. TA (µ PD120NxxT1B)
0.6
2.5
2
(Mounted on ceramic substrate of 75 mm2 x 0.7
(Mounted on ceramic substrate of 16 cm2 x 0.7
62.5°C/W
0.5
245°C/W
0.4
1.5
1
0.3
(Without heatsink)
0.2
695°C/W
(Without heatsink)
315°C/W
0.5
0
0.1
0
0
20
40
60
80
100
0
20
40
60
80
100
TA - Operating Ambient Temperature - °C
TA - Operating Ambient Temperature - °C
∆VO vs. TJ
∆VO vs. TJ
10
5
10
5
IO = 0.15 A
IO = 0.15 A
0
0
PD120N15
µ
PD120N33
µ
-5
-5
PD120N25
µ
PD120N18
µ
∆
∆
-10
-10
-50
0
50
100
150
-50
0
50
100
150
TJ - Operating Junction Temperature - °C
TJ - Operating Junction Temperature - °C
VO vs. VIN (µ PD120N15)
VO vs. VIN (µ PD120N18)
2
2
TJ = 25˚C
TJ = 25˚C
IO = 5 mA
IO = 150 mA
IO = 300 mA
I
I
I
O
O
O
= 5 mA
= 150 mA
= 300 mA
1
0
1
0
0
1
2
3
4
5
6
0
1
2
3
4
5
6
VIN - Input Voltage - V
VIN - Input Voltage - V
7
Data Sheet S17145EJ2V0DS
µPD120Nxx Series
VO vs. VIN (µ PD120N25)
VO vs. VIN (µ PD120N33)
5
4
3
4
T = 25˚C
J
T = 25˚C
J
3
2
1
0
I
I
I
O
O
O
= 5 mA
2
1
0
I
I
I
O
O
O
= 5 mA
= 150 mA
= 300 mA
= 150 mA
= 300 mA
0
1
2
3
4
5
6
0
1
2
3
4
5
6
VIN - Input Voltage - V
VIN - Input Voltage - V
IBIAS (IBIAS(S)) vs. VIN (µ PD120N15)
IBIAS (IBIAS(S)) vs. VIN (µ PD120N18)
1000
800
600
400
1000
T = 25˚C
J
T = 25˚C
J
µ
µ
800
600
400
200
0
I
O
= 300 mA
= 150 mA
I
O
= 300 mA
= 150 mA
I
O
I
O
200
0
I
O
= 5 mA
I
O
= 5 mA
0
1
2
3
4
5
6
0
1
2
3
4
5
6
VIN - Input Voltage - V
VIN - Input Voltage - V
IBIAS (IBIAS(S)) vs. VIN (µ PD120N25)
IBIAS (IBIAS(S)) vs. VIN (µ PD120N33)
1000
800
600
400
200
1000
T = 25˚C
J
T = 25˚C
J
µ
µ
800
600
I
O
= 300 mA
= 150 mA
I
O
= 300 mA
= 150 mA
400
200
I
O
I
O
I
O
= 5 mA
5
I
O
= 5 mA
5
0
0
0
1
2
3
4
6
0
1
2
3
4
6
VIN - Input Voltage - V
VIN - Input Voltage - V
8
Data Sheet S17145EJ2V0DS
µPD120Nxx Series
VDIF vs. TJ
IOpeak vs. VDIF (µ PD120N15)
1
0.8
0.6
0.4
0.2
0
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
I = 0.15 A
O
TJ = 0°C
TJ = 25°C
µPD120N15
TJ = 125°C
µPD120N18
µPD120N25
µPD120N33
0
1
2
3
4
5
-25
0
25
50
75 100 125 150
VDIF - Dropout Voltage - V
IOpeak vs. VDIF (µ PD120N25)
TJ = 0°C
TJ - Operating Junction Temperature - °C
IOpeak vs. VDIF (µ PD120N18)
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
TJ = 0°C
TJ = 25°C
TJ = 25°C
TJ = 125°C
TJ = 125°C
0
1
2
3
4
5
0
1
2
3
4
VDIF - Dropout Voltage - V
VDIF - Dropout Voltage - V
IOpeak vs. VDIF (µ PD120N33)
R•R vs. f
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
80
70
60
50
40
30
20
10
0
TJ = 25°C
IO = 0.15 A
TJ = 0°C
PD120N15
µ
TJ = 25°C
TJ = 125°C
PD120N25
µ
0
1
2
3
10
100
1000
10000
100000
VDIF - Dropout Voltage - V
f - Frequency - Hz
9
Data Sheet S17145EJ2V0DS
µPD120Nxx Series
R•R vs. f
VDIF vs. IO
80
70
60
50
40
30
20
10
0
1
0.8
0.6
0.4
0.2
0
TJ = 25°C
IO = 0.15 A
PD120N18
µ
µ
µ
µ
µ
PD120N15
PD120N33
µ
PD120N18
PD120N25
PD120N33
0
0.05
0.1
0.15
0.2
0.25
0.3
10
100
1000
10000
100000
f - Frequency - Hz
IO - Output Current - A
VO vs. IO (µ PD120N15)
VO vs. IO (µ PD120N18)
3
3
2
2
1
0
1
0
200
400
600
800
0
200
400
600
800
0
IO - Output Current - A
IO - Output Current - A
VO vs. IO (µ PD120N25)
VO vs. IO (µ PD120N33)
4
5
4
3
2
3
2
1
0
1
0
200
400
600
800
200
400
600
800
0
0
IO - Output Current - A
IO - Output Current - A
10
Data Sheet S17145EJ2V0DS
µPD120Nxx Series
PACKAGE DRAWINGS (Unit: mm)
SC-74A
5 PIN PLASTIC MINI MOLD
detail of lead end
F
G
R
L
E
A
H
I
J
B
S
C
N
S
ITEM MILLIMETERS
M
D
M
K
A
B
C
2.9±0.2
0.3
0.95 (T.P.)
+0.05
0.32
D
−0.02
0.05±0.05
E
F
1.4 MAX.
+0.2
1.1
G
−0.1
H
I
2.8±0.2
+0.2
1.5
−0.1
+0.1
0.65
J
−0.15
+0.1
0.16
K
−0.06
L
M
N
R
0.4±0.2
0.19
0.1
5°±5°
S5TA-95-15A
11
Data Sheet S17145EJ2V0DS
µPD120Nxx Series
SC-62
4.5 ±0.1
1.6 ±0.2
1.5 ±0.1
0.42
±0.06
0.42
±0.06
0.47
±0.06
+0.03
–0.05
0.41
1.5 TYP.
3.0 TYP.
12
Data Sheet S17145EJ2V0DS
µPD120Nxx Series
RECOMMENDED SOLDERING CONDITIONS
The µ PD120Nxx series should be soldered and mounted under the following recommended conditions.
For soldering methods and conditions other than those recommended below, contact an NEC Electronics sales
representative.
For technical information, see the following website.
Semiconductor Device Mount Manual (http://www.necel.com/pkg/en/mount/index.html)
Type of Surface Mount Device
µ PD120N15TA, µ PD120N18TA, µ PD120N25TA, µ PD120N33TA: SC-74A
µ PD120N15T1B, µ PD120N18T1B, µ PD120N25T1B, µ PD120N33T1B: SC-62
Process
Conditions
Symbol
Infrared Ray Reflow
Peak temperature: 235°C or below (Package surface temperature),
Reflow time: 30 seconds or less (at 210°C or higher),
IR35-00-3
Maximum number of reflows processes: 3 times or less.
Vapor Phase Soldering
Wave Soldering
Peak temperature: 215°C or below (Package surface temperature),
Reflow time: 40 seconds or less (at 200°C or higher),
VP15-00-3
WS60-00-1
–
Maximum number of reflows processes: 3 times or less.
Solder temperature: 260°C or below, Flow time: 10 seconds or less,
Maximum number of flow processes: 1 time,
Pre-heating temperature: 120°C or below (Package surface temperature).
Partial Heating Method
Pin temperature: 300°C or below,
Heat time: 3 seconds or less (Per each side of the device).
µ PD120N15TA-A, µ PD120N18TA-A, µ PD120N25TA-A, µ PD120N33TA-A: SC-74ANote1
µ PD120N15T1B-AZ, µ PD120N18T1B-AZ, µ PD120N25T1B-AZ, µ PD120N33T1B-AZ: SC-62Note2
Process
Conditions
Symbol
Infrared Ray Reflow
Peak temperature: 260°C or below (Package surface temperature),
Reflow time: 30 seconds or less (at 210°C or higher),
IR60-00-3
Maximum number of reflows processes: 3 times or less.
Wave Soldering
Solder temperature: 260°C or below, Flow time: 10 seconds or less,
Maximum number of flow processes: 1 time,
WS60-00-1
Pre-heating temperature: 120°C or below (Package surface temperature).
Partial Heating Method
Pin temperature: 300°C or below,
–
Heat time: 3 seconds or less (Per each side of the device).
Notes 1. Pb-free (This product does not contain Pb in external electrode and other parts.)
2. Pb-free (This product does not contain Pb in external electrode.)
Caution Do not use different soldering methods together (except for partial heating).
Remark Flux: Rosin-based flux with low chlorine content (chlorine 0.2 Wt% or below) is recommended.
13
Data Sheet S17145EJ2V0DS
µPD120Nxx Series
NOTES FOR CMOS DEVICES
1
VOLTAGE APPLICATION WAVEFORM AT INPUT PIN
Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the
CMOS device stays in the area between VIL (MAX) and VIH (MIN) due to noise, etc., the device may
malfunction. Take care to prevent chattering noise from entering the device when the input level is fixed,
and also in the transition period when the input level passes through the area between VIL (MAX) and
V
IH (MIN).
HANDLING OF UNUSED INPUT PINS
2
Unconnected CMOS device inputs can be cause of malfunction. If an input pin is unconnected, it is
possible that an internal input level may be generated due to noise, etc., causing malfunction. CMOS
devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed
high or low by using pull-up or pull-down circuitry. Each unused pin should be connected to VDD or GND
via a resistor if there is a possibility that it will be an output pin. All handling related to unused pins must
be judged separately for each device and according to related specifications governing the device.
3
PRECAUTION AGAINST ESD
A strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and
ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as
much as possible, and quickly dissipate it when it has occurred. Environmental control must be
adequate. When it is dry, a humidifier should be used. It is recommended to avoid using insulators that
easily build up static electricity. Semiconductor devices must be stored and transported in an anti-static
container, static shielding bag or conductive material. All test and measurement tools including work
benches and floors should be grounded. The operator should be grounded using a wrist strap.
Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for
PW boards with mounted semiconductor devices.
4
STATUS BEFORE INITIALIZATION
Power-on does not necessarily define the initial status of a MOS device. Immediately after the power
source is turned ON, devices with reset functions have not yet been initialized. Hence, power-on does
not guarantee output pin levels, I/O settings or contents of registers. A device is not initialized until the
reset signal is received. A reset operation must be executed immediately after power-on for devices
with reset functions.
5
POWER ON/OFF SEQUENCE
In the case of a device that uses different power supplies for the internal operation and external
interface, as a rule, switch on the external power supply after switching on the internal power supply.
When switching the power supply off, as a rule, switch off the external power supply and then the
internal power supply. Use of the reverse power on/off sequences may result in the application of an
overvoltage to the internal elements of the device, causing malfunction and degradation of internal
elements due to the passage of an abnormal current.
The correct power on/off sequence must be judged separately for each device and according to related
specifications governing the device.
6
INPUT OF SIGNAL DURING POWER OFF STATE
Do not input signals or an I/O pull-up power supply while the device is not powered. The current
injection that results from input of such a signal or I/O pull-up power supply may cause malfunction and
the abnormal current that passes in the device at this time may cause degradation of internal elements.
Input of signals during the power off state must be judged separately for each device and according to
related specifications governing the device.
14
Data Sheet S17145EJ2V0DS
µPD120Nxx Series
REFERENCE DOCUMENTS
Document Name
Document No.
Usage of Three-Terminal Regulators User’s Manual
Voltage Regulator of SMD Information
G12702E
G11872E
Semiconductor Device Mount Manual
http://www.necel.com/pkg/en/mount/index.html
X13769X
SEMICONDUCTOR SELECTION GUIDE - Products and Packages-
•
The information in this document is current as of February, 2005. The information is subject to
change without notice. For actual design-in, refer to the latest publications of NEC Electronics data
sheets or data books, etc., for the most up-to-date specifications of NEC Electronics products. Not
all products and/or types are available in every country. Please check with an NEC Electronics sales
representative for availability and additional information.
• No part of this document may be copied or reproduced in any form or by any means without the prior
written consent of NEC Electronics. NEC Electronics assumes no responsibility for any errors that may
appear in this document.
•
NEC Electronics does not assume any liability for infringement of patents, copyrights or other intellectual
property rights of third parties by or arising from the use of NEC Electronics products listed in this document
or any other liability arising from the use of such products. No license, express, implied or otherwise, is
granted under any patents, copyrights or other intellectual property rights of NEC Electronics or others.
Descriptions of circuits, software and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these
circuits, software and information in the design of a customer's equipment shall be done under the full
responsibility of the customer. NEC Electronics assumes no responsibility for any losses incurred by
customers or third parties arising from the use of these circuits, software and information.
•
• While NEC Electronics endeavors to enhance the quality, reliability and safety of NEC Electronics products,
customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To
minimize risks of damage to property or injury (including death) to persons arising from defects in NEC
Electronics products, customers must incorporate sufficient safety measures in their design, such as
redundancy, fire-containment and anti-failure features.
• NEC Electronics products are classified into the following three quality grades: "Standard", "Special" and
"Specific".
The "Specific" quality grade applies only to NEC Electronics products developed based on a customer-
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Electronics product depend on its quality grade, as indicated below. Customers must check the quality grade of
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The quality grade of NEC Electronics products is "Standard" unless otherwise expressly specified in NEC
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(Note)
(1) "NEC Electronics" as used in this statement means NEC Electronics Corporation and also includes its
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(2) "NEC Electronics products" means any product developed or manufactured by or for NEC Electronics (as
defined above).
M8E 02. 11-1
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