UPC8126K [NEC]
900 MHz BAND DIRECT QUADRATURE MODULATOR IC FOR DIGITAL MOBILE COMMUNICATION SYSTEMS; 900 MHz频段直接正交调制器IC，适用于数字移动通信系统
| 型号： | UPC8126K |
| 厂家： | 
NEC |
| 描述： | 900 MHz BAND DIRECT QUADRATURE MODULATOR IC FOR DIGITAL MOBILE COMMUNICATION SYSTEMS |
| 文件： | 总20页 (文件大小：189K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PRELIMINARY DATA SHEET
BIPOLAR ANALOG INTEGRATED CIRCUIT
µPC8126K
900 MHz BAND DIRECT QUADRATURE MODULATOR IC
FOR DIGITAL MOBILE COMMUNICATION SYSTEMS
DESCRIPTION
The µPC8126K is a silicon monolithic integrated circuit designed as quadrature modulator for digital mobile
communication systems. This IC integrates a pre-mixer for local signals plus a quadrature modulator operating from
889 MHz to 960 MHz. The chip which has been conventionally packaged in 20-pin SSOP is packaged in 28-pin QFN
and therefore is suitable for higher density mounting. In addition, the IC has power save function and can operate
2.7 to 3.6 V supply voltage. Consequently the µPC8126K can contribute to make RF blocks smaller size, higher
performance and lower power consumption.
FEATURES
•
•
•
•
•
•
Directly modulate in 889 MHz to 960 MHz
Built-in pre-mixer for local signals
External IF filter can be applied between modulator output and pre-mixer input terminal.
Current consumption ICC = 35 mA TYP. @ VCC = 3.0 V
Equipped with power save function.
28-pin QFN suitable for higher density mounting.
APPLICATIONS
Digital cellular phones: PDC800M
•
ORDERING INFORMATION
Part Number
Package
Supplying Form
Embossed tape 12 mm wide.
µPC8126K-E1
28-pin plastic QFN (5.1 × 5.5 × 0.95 mm)
QTY 2.5 kp/reel.
Pins 1 through 10 are in pull-out direction.
Remark To order evaluation samples, please contact your local NEC sales office .
(Part number for sample order: µPC8126K)
Caution Electro-static sensitive device
The information in this document is subject to change without notice.
Document No. P13488EJ1V0DS00 (1st edition)
Date Published February 1999 N CP(K)
Printed in Japan
©
1999
µPC8126K
INTERNAL BLOCK DIAGRAM AND PIN CONNECTIONS (Top View)
22
21
20
19
18
17
16
15
N. C.
GND
23
24
25
14
13
12
GND
Q
LO Pre-Mix
RF-LOin
Qb
I/Q-Mix
÷2
V
CC
1
26
27
28
11
10
9
Ib
Phase
Shifter
LO×2
MIXout
GND
I
GND
LO
Buffer
1
2
3
4
5
6
7
8
2
Preliminary Data Sheet P13488EJ1V0DS00
µPC8126K
QUADRATURE MODULATOR SERIES PRODUCT
ICC
fLO1in
fMODout Up-Converter Phase
Part Number
Functions
Package
20-pin
Application
CT-2 etc.
(mA)
(MHz) (MHz)
f
RFout (MHz)
Shifter
µPC8101GR
µPC8104GR
150 MHz Quad.Mod
15/@2.7 V 100 to 300 50 to 150 External
F/F
SSOP (225 mil)
RF Up-Converter + IF
Quad.Mod
28/@3.0 V
16/@3.0 V
100 to 400
100 to 400
900 to 1 900 Doubler
+ F/F
Digital Comm.
µPC8105GR
400 MHz Quad.Mod
External
16-pin
SSOP (225 mil)
µPC8110GR
µPC8125GR
1 GHz Direct Quad.Mod 24/@3.0 V
800 to 1 000
220 to 270
Direct
20-pin
PDC800 MHz, etc.
PHS
SSOP (225 mil)
RF Up-Converter + IF
Quad.Mod + AGC
36/@3.0 V
1 800 to 2 000
µPC8126GR
900 MHz Direct Quad.Mod 35/@3.0 V
with Offset-Mixer
915 to 960
889 to 960
915 to 960
PDC800 MHz
(LO pre-mixer)
µPC8126K
889 to 960
28-pin QFN
20-pin
µPC8129GR
×2LO IF Quad. Mod+RF 28/@3.0 V 200 to 800 100 to 400 800 to 1 900
F/F
CR
GSM,
Up-Converter
SSOP (225 mil) DCS1800, etc.
µ
PC8139GR-7JH
Transceiver IC
TX: 32.5
220 to 270
100 to 300
1 800 to 2 000
800 to 1 500
30-pin
PHS
(1.9 GHz Indirect Quad. RX: 4.8
Mod + RX-IF + IF VCO) /@3.0 V
TSSOP (225 mil)
µPC8158K
RF Up-Converter + IF
Quad.Mod + AGC
28/@3.0 V
28-pin QFN
PDC800 M/1.5 G
Remark For outline of the quadrature modulator series, please refer to the application note Usage of µPC8101,
8104, 8105, 8125, 8129 (Document No. P13251E) and so on.
3
Preliminary Data Sheet P13488EJ1V0DS00
µPC8126K
APPLICATION EXAMPLE
[PDC800 MHz]
SUB ANT
LNA
1st MIX
2nd MIX
SW
TO DEMOD
RSSI OUT
RSSI
MAIN ANT
1st LO
2nd LO
SW
PLL1 PLL2
SW
I
0°
φ
(÷2)
×2
Filter
PA
AGC
90°
Q
µPC8126 K
This block diagram presents the IC’s location example applied in the system. The system block construction
herein is an example.
4
Preliminary Data Sheet P13488EJ1V0DS00
µPC8126K
ABSOLUTE MAXIMUM RATINGS
Parameter
Supply Voltage
Symbol
VCC
VPS
Test Conditions
TA = +25 °C
Rating
4.0
Unit
V
Power Save Control Voltage
Power Dissipation
TA = +25 °C
T
4.0
V
PD
A = +85 °CNote
430
mW
°C
°C
Operating Ambient Temperature
Storage Temperature
TA
–40 to +85
–55 to +150
Tstg
Note Mounted on a 50 × 50 × 1.6 mm double sided copper clad epoxy glass PWB.
RECOMMENDED OPERATING CONDITIONS
Parameter
Supply Voltage
Symbol
VCC
Test Conditions
MIN.
2.7
TYP.
3.0
+25
–
MAX.
3.6
Unit
V
Operating Ambient Temperature
Pre-Mix. RF Input Frequency
Pre-Mix. RF Input Power
TA
–25
689
–13
120
–14
889
915
+75
1 200
–9
°C
fRFin
MHz
dBm
MHz
dBm
MHz
MHz
PRFin
fIFin
–11
135
–12
–
Pre-Mix. IF Input Frequency
Pre-Mix. IF Input Power
P (fIF × 7) ≤ –65 dBc
270
–10
898
960
PIFin
Pre-Mix. Output Frequency
(Modulator Output Frequency,
Modulator LO Input Frequency)
fMIXout
fIFin = 200 MHz
fIFin = 135 MHz
(fMODout, fLOin)
–
Modulator LO Input Power
I/Q Input Frequency
I/Q Input Amplitude
PLOin
fI/Qin
–21.5
DC
–
–18.5
–15.5
10
dBm
MHz
–
–
–
VI/Qin
Single ended Input
Differential Input
500
250
mVP-P
–
5
Preliminary Data Sheet P13488EJ1V0DS00
µPC8126K
ELECTRICAL CHARACTERISTICS
(TA = +25°C, VCC1 = VCC2 = VCC3 = 3.0 V, VPS1, VPS2 ≥ 2.2 V unless otherwise specified)
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
MODULATOR + PRE-MIXER TOTAL (TEST CIRCUIT 1 unless otherwise specified)
Total Circuit Current
ICC (TOTAL)
No Input Signals
24
–
35
0
44
15
mA
VPS ≤ 0.5 V (Low),
Total Circuit Current at Sleep Mode
ICC (PS) TOTAL
µA
No Input Signals
PMODout
LOLNote
ImR
fIFin = 135 MHz, PIFin = –12 dBm
fRFin = 813 MHz, PRFin = –11 dBm
fMODout = 948 MHz + fI/Q
–12
–
–9
–35
–40
–45
–
–6
dBm
dBc
dBc
dBc
dBc
Modulator Output Power
Local Oscillator Leakage
Image Rejection
–30
–30
–30
–65
fI/Qin = 2.625 kHz
–
VI/Qin = 500 mVP-P (Single ended)
I/Q (DC) = Ib/Qb (DC) = VCC/2
Data Rate: 42 kbps,
IM3 (I/Q)
P (fIF × 7)
–
I/Q 3rd Order Intermodulation
fIF-LO × 7 Harmonics
RNYQ: α = 0.5
–
MOD Pattern: All Zero
Power Save
Rise Time
Fall Time
TPS (RISE)
TPS (FALL)
EVM
V
PS: Low to High, TEST CIRCUIT 2
PS: High to Low, TEST CIRCUIT 2
–
–
–
3
3
5
5
µs
µs
Response Time
V
Error Vector Magnitude
fIFin = 135 MHz, PIFin = –12 dBm
fRFin = 813 MHz, PRFin = –11 dBm
fMODout = 948 MHz + fI/Q
fI/Qin = 2.625 kHz
1.6
3.5
%rms
VI/Qin = 500 mVP-P (Single ended)
I/Q (DC) = Ib/Qb (DC) = VCC/2
Data Rate: 42 kbps,
Adjacent Channel Power
ACP
–
–65
–60
dBc
(∆f = ±50 kHz)
RNYQ: α = 0.5
MOD Pattern: PN9 (Pseudo-
random pattern)
Port Current-7 pin
Port Current-17 pin
IPS (7 pin)
No Input Signals
No Input Signals
–
–
–
–
620
400
µA
µA
IPS (17 pin)
Note fLOL = fIFin + fRFin
6
Preliminary Data Sheet P13488EJ1V0DS00
µPC8126K
STANDARD CHARACTERISTICS FOR REFERENCE
(TA = +25°C, VCC1 = VCC2 = VCC3 = 3.0 V, VPS1, VPS2 ≥ 2.2 V unless otherwise specified)
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
MODULATOR (TEST CIRCUIT 3)
Modulator Circuit Current
ICC (MOD)
No Input Signals
–
–
27.5
0
34
10
mA
VPS ≤ 0.5 V (Low),
Modulator Circuit Current at Sleep
Mode
ICC (PS) (MOD)
µA
No Input Signals
Input Impedance I and Q Port
Modulator Output Port VSWR
PRE-MIXER (TEST CIRCUIT 4)
Pre-Mixer Circuit Current
ZI/Qin
fI/Q = DC to 10 MHz
fMODout = 948 MHz
90
–
180
–
–
kΩ
VSWR (MOD)
1.5:1
–
ICC (MIX)
No Input Signals
–
–
7.5
0
10
5
mA
Pre-Mixer Circuit Current at Sleep
Mode
ICC (PS) (MIX)
VPS ≤ 0.5 V (Low),
µA
No Input Signals
CG (MIX)
Pout (MIX)
fRFin = 813 MHz, PRFin = –11 dBm
fIFin = 135 MHz, PIFin = –12 dBm
fMIXout = 948 MHz
–5
–3
–1
dB
Pre-Mixer Conversion Gain
Pre-Mixer Output Power
–17
–15
–13
dBm
7
Preliminary Data Sheet P13488EJ1V0DS00
µPC8126K
PIN EXPLANATIONS
Supply
Pin
Pin
No.
Symbol
LOinb
Voltage
(V)
Voltage (V)
@3 V
Description
Equivalent Circuit
2
–
2.6
Bypass of LO input for modulator.
This pin should be externally
grounded through around 33 pF
capacitor.
4
2
4
LOin
–
2.6
LO input for the phase shifter.
Connect around 300 Ω between pin
4 and 5 to match to 50 Ω by LC.
6
7
VCC2
2.7 to 3.6
–
–
Supply voltage pin for the phase
shifter and IQ Mixer. An internal
regulator helps keep the device
stable against temperature or VCC
variation.
–––––––––––––
VPS1
VPS
Power save control pin for the
modulator can control On/Sleep
state with bias as follows.
(Modulator)
7
VPS (V)
2.2 to 3.6 ON (Active Mode)
0 to 0.5 OFF (Sleep Mode)
State
9
GND
0
–
–
–
Ground pin for the modulator.
Connect to the ground with minimum
inductance.
(Modulator)
–––––––––––––
Track length should be kept as short
as possible.
10
11
I
VCC/2
Input for I signal.
This input impedance is 180 kΩ.
In case of that I/Q input signals are
single ended, amplitude of the signal
is 500 mVP-P max.
Note
Ib
VCC/2
Input for I signal.
This input impedance is 180 kΩ.
10
11
In case of that I/Q input signals are
single ended, VCC/2 biased DC
signal should be input.
In case of that I/Q input signals are
differential, amplitude of the signal is
250 m VP-P max.
Note
Note Relations between amplitude and VCC/2 bias of input signal are following.
8
Preliminary Data Sheet P13488EJ1V0DS00
µPC8126K
Supply
Voltage
(V)
Pin
Pin
No.
Symbol
Qb
Voltage (V)
@3 V
Description
Equivalent Circuit
12
VCC/2
–
Input for Q signal.
This input impedance is 180 kΩ.
In case of that I/Q input signals are
single ended, VCC/2 biased DC
signal should be input.
In case of that I/Q input signals are
differential, amplitude of the signal is
12
13
250 mVP-P max.
Note
13
14
16
17
Q
VCC/2
–
–
Input for Q signal.
This input impedance is 180 kΩ.
In case of that I/Q input signals are
single ended, amplitude of the signal
is 500 mVP-P max.
Note
GND
0
2.7 to 3.6
–
Ground pin for the modulator.
(Modulator)
Connect to the ground with minimum
inductance.
–––––––––––––
–––––––––––––
Track length should be kept as short
as possible.
VCC3
–
Supply voltage pin for the output
buffer amplifier of modulator.
An internal regulator helps keep the
device stable against temperature or
VCC variation.
MODout
1.6
Output pin from the modulator.
This is emitter follower output.
So this output impedance is low.
17
19
20
GND
0
–
–
Ground pin for the modulator.
Connect to the ground with minimum
inductance.
(Modulator)
–––––––––––––
Track length should be kept as short
as possible.
VPS2
VPS
Power save control pin can control
the On/Sleep state with bias as
follows.
(Pre-Mix)
20
VPS (V)
2.2 to 3.6 ON (Active Mode)
0 to 0.5 OFF (Sleep Mode)
State
Note Relations between amplitude and VCC/2 bias of input signal are following.
9
Preliminary Data Sheet P13488EJ1V0DS00
µPC8126K
Supply
Voltage
(V)
Pin
Pin
No.
Symbol
IF-LOin
Voltage (V)
@3 V
Description
Equivalent Circuit
21
–
1.3
IF input pin for the Pre-Mixer.
This pin is biased internally.
Capacitor should be connected in
series, and grounded through 51 Ω.
21
24
25
GND
0
–
–
Ground pin for Pre-Mixer.
Connect to the ground with minimum
inductance.
(Pre-Mix)
–––––––––––––
Track length should be kept as short
as possible.
RF-LOin
2.3
RF input pin for the Pre-Mixer.
This pin is biased internally.
Capacitor should be connected in
series, and grounded through 51 Ω.
25
26
VCC1
2.7 to 3.6
–
–
Supply voltage pin for the Pre-Mixer.
An internal regulator helps keep the
device stable against temperature or
VCC variation.
(Pre-Mix)
–––––––––––––
27 Pre-Mixout 2.7 to 3.6
Output from the Pre-Mixer. This pin
is designed as open collector. Due
to the high impedance output, this
pin should be externally equipped
with LC matching circuit to next
stage.
27
28
GND
0
–
–
–
Ground pin for the modulator.
Connect to the ground with minimum
inductance.
(Modulator)
–––––––––––––
–––––––––––––
Track length should be kept as short
as possible.
1, 3,
5, 8,
15,
N.C.
Non connection pins.
18,
22, 23
10
Preliminary Data Sheet P13488EJ1V0DS00
µPC8126K
RELATION BETWEEN I/Q PIN INPUT DC VOLTAGE AND AMPLITUDE
I/Q input signal (mVP-P)
Single ended input Differential input
Supply Voltage (V)
VCC
I/Q DC Voltage (V)
VCC/2 = I = Ib = Q = Qb
I = Q
I = Ib = Q = Qb
2.7 to 3.6
1.35 to 1.8
≤ 500
≤ 250
EXPLANATION OF INTERNAL FUNCTION
Block
Function/Operation
Block Diagram
90° PHASE
SHIFTER
Input signal from LO is send to digital circuit of
T-type flip-flop through frequency doubler.
Output signal from T-type F/F is changed to
same frequency as LO input and that have
quadrature phase shift, 0°, 90 °, 180°, 270°.
These circuits have function of self phase
correction to make correctly quadrature
signals.
from LOin
×2
÷2F/F
BUFFER AMP.
MIXER
Buffer amplifiers for each phase signals to
send to each mixers.
Each signals from buffer amp. are quadrature
modulated with two double-balanced mixers.
High accurate phase and amplitude inputs are
realized to good performance for image
rejection.
I
Ib
Qb
Q
ADDER
Output signals from each mixers are added
with adder and send to final amplifier.
to MODout
11
Preliminary Data Sheet P13488EJ1V0DS00
µPC8126K
TEST CIRCUIT 1
Pre-mixer + Quadrature modulator (except Power save response time)
Spectrum Analyzer
Signal Generator
Voltage
Source
Signal Generator
V
CC3 (MOD)
VPS2 (Pre Mix)
BPF
100 pF
MODout
Voltage
Source
IFin
1 000 pF
0.22 µF
33 pF
RFin
51 Ω
1 000 pF
V
CC1 (Pre Mix)
100 pF
1 000 pF
0.22É F
22 21 20 19 18 17 16 15
51 Ω
23
24
25
26
27
28
14
13
12
11
10
9
Qin
Qb
Ib
33 pF
TFF
PreMixer
I/Q Mixer
Frequency
Doubler
1 pF 18 nH
15 nH
Iin
Mixout
7 pF
I/Q Mixer
I/Q Singnal
Generator
1
2
3
4
5
6
7
8
100 pF
5.6 nH
7 pF
300 Ω
VPS1 (MOD)
33 pF
2 pF
1 000 pF
2.5 pF
6.8 nH
33 pF
Voltage
Source
0.22 µF
6.8 nH
Filter
VCC2 (MOD)
10 nH
18 nH
12
Preliminary Data Sheet P13488EJ1V0DS00
µPC8126K
TEST CIRCUIT 2
Pre-mixer + Quadrature modulator (for Power save response time)
Spectrum Analyzer
Voltage
Source
Signal Generator
Signal Generator
V
CC3 (MOD)
V
PS2 (Pre Mix)
BPF
100 pF
MODout
Voltage
Source
IFin
1 000 pF
0.22 µF
33 pF
51 Ω
RFin
VCC1 (Pre Mix)
1 000 pF
100 pF
1 000 pF
0.22 µF
I/Q Singnal
Generator
22 21 20 19 18 17 16 15
51 Ω
23
24
25
26
27
28
14
13
12
11
10
9
Qin
Qb
Ib
33 pF
TFF
PreMixer
I/Q Mixer
Frequency
Doubler
1 pF 18 nH
15 nH
Iin
Mixout
7 pF
I/Q Mixer
Palse Pattern
Generator
1
2
3
4
5
6
7
8
100 pF
5.6 nH
7 pF
300 Ω
VPS1 (MOD)
33 pF
1 000 pF
2.5 pF
6.8 nH
33 pF
Voltage
Source
0.22 µF
6.8 nH
2 pF
10 nH
Filter
V
CC2 (MOD)
18 nH
13
Preliminary Data Sheet P13488EJ1V0DS00
µPC8126K
TEST CIRCUIT 3
Quadrature modulator block
Spectrum Analyzer
or Network Analyzer
Voltage
Source
V
CC3 (MOD)
100 pF
MODout
33 pF
1 000 pF
0.22 µF
22 21 20 19 18 17 16 15
23
24
25
26
27
28
14
13
12
11
10
9
Qin
Qb
Ib
Iin
I/Q Signal
Generator
Voltage Source
Pulse Pattern Generator
1
2
3
4
5
6
7
8
100 pF
300 Ω
33 pF
2 pF
1 000 pF
VPS1 (MOD)
33 pF
LOinb
6.8 nH
Voltage
Source
0.22 µF
V
CC2 (MOD)
Signal Generator
LOin
In this case, pin 20 to 27 should be opened or grounded.
14
Preliminary Data Sheet P13488EJ1V0DS00
µPC8126K
TEST CIRCUIT 4
Pre-mixer block
Signal Generator
Signal Generator
Voltage
Source
BPF
Voltage
Source
IFin
MODout
VCC3 (MOD)
51 Ω
V
CC1 (Pre Mix)
RFin
1 000 pF
100 pF
VPS2 (Pre Mix)
22 21 20 19 18 17 16 15
1 000 pF
51 Ω
23
24
14
13
12
11
10
9
Qin
Qb
Ib
µ
0.22
F
33 pF
25
26
27
28
1 pF
15 nH
18 nH
Iin
Mixout
1
2
3
4
5
6
7
8
Spectrum Analyzer
V
PS1 (MOD)
LOinb
LOin
VCC2 (MOD)
15
Preliminary Data Sheet P13488EJ1V0DS00
µPC8126K
PACKAGE DIMENSIONS
28 pin plastic QFN (UNIT: mm)
4 – 0.5
28 pin
1 pin
0.22
0.5
7 × 0.5 = 3.5
5.5 ± 0.1
(5.5 ± 0.1)
(5.1)
(0.22)
(4.5)
0.5
0.5
Bottom View
16
Preliminary Data Sheet P13488EJ1V0DS00
µPC8126K
NOTE ON CORRECT USE
(1) Observe precautions for handling because of electrostatic sensitive devices.
(2) Form a ground pattern as widely as possible to minimize ground impedance (to prevent undesired operation).
(3) Keep the track length between the ground pins as short as possible.
(4) Connect a bypass capacitor (example 1 000 pF) to the VCC pin.
RECOMMENDED SOLDERING CONDITIONS
This product should be soldered under the following recommended condition. For soldering methods and
conditions other than those recommended below, contact your NEC sales representative.
Recommended Condition
Soldering Method
Infrared Reflow
Soldering Conditions
Symbol
Package peak temperature: 235°C or below
Time: 30 seconds or less (at 210°C)
Count: 2, Exposure limitNote: None
IR35-00-2
–
Partial Heating
Pin temperature: 300°C
Time: 3 seconds or less (per side of device)
Exposure limitNote: None
Note After opening the dry pack, keep it in a place below 25°C and 65% RH for the allowable storage period.
Caution Do not use different soldering methods together (except for partial heating).
For details of recommended soldering conditions for surface mounting, refer to information document
SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL (C10535E).
17
Preliminary Data Sheet P13488EJ1V0DS00
µPC8126K
[MEMO]
18
Preliminary Data Sheet P13488EJ1V0DS00
µPC8126K
[MEMO]
19
Preliminary Data Sheet P13488EJ1V0DS00
µPC8126K
The application circuits and their parameters are for reference only and are not intended for use in actual design-ins.
No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in
this document.
NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property
rights of third parties by or arising from use of a device described herein or any other liability arising from use
of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other
intellectual property rights of NEC Corporation or others.
While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices,
the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or
property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety
measures in its design, such as redundancy, fire-containment, and anti-failure features.
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"Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a
customer designated "quality assurance program" for a specific application. The recommended applications of
a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device
before using it in a particular application.
Standard: Computers, office equipment, communications equipment, test and measurement equipment,
audio and visual equipment, home electronic appliances, machine tools, personal electronic
equipment and industrial robots
Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
for life support)
Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life
support systems or medical equipment for life support, etc.
The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books.
If customers intend to use NEC devices for applications other than those specified for Standard quality grade,
they should contact an NEC sales representative in advance.
Anti-radioactive design is not implemented in this product.
M4 96. 5
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