MX23L1622MC-10 [Macronix]
16M-BIT MASK ROM (16/32 BIT OUTPUT); 16M - BIT MASK ROM （ 16/32位输出）
| 型号： | MX23L1622MC-10 |
| 厂家： | 
MACRONIX INTERNATIONAL |
| 描述： | 16M-BIT MASK ROM (16/32 BIT OUTPUT) |
| 文件： | 总6页 (文件大小：44K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INDEX
MX23L1622
16M-BIT MASK ROM (16/32 BIT OUTPUT)
FEATURES
ORDER INFORMATION
• Bit organization
Part No.
Access Page Access Package
Time Time
- 1M x 16 (word mode)
- 512K x 32 (double word mode)
• Fast access time
- Random access: 100ns (max.)
- Page access: 30ns (max.)
• Page
MX23L1622MC-10 100ns 30ns
MX23L1622MC-12 120ns 45ns
70 pin SSOP
70 pin SSOP
- 8 double words per page
• Current
PIN DESCRIPTION
- Operating:60mA
- Standby:50uA
• Supply voltage
- 3.3V±10%
• Package
Symbol
A0~A18
D0~D30
D31/A-1
Pin Function
Address Inputs
Data Outputs
D31 (Double Word Mode)/ LSB Ad-
dress (Word Mode)
- 70 pin SSOP (500mil)
CE
Chip Enable Input
OE
Output Enable Input
Double Word/ Word Mode Selection
Power Supply Pin
Word
VCC
VSS
NC
PIN CONFIGURATION
70
NC
A0
Ground Pin
2
3
4
5
6
7
8
9
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
NC
NC
WORD
OE
CE
A1
A2
A3
A4
A5
VCC
D0
D16
D1
D17
VSS
VCC
D2
D18
D3
D19
D4
D20
D5
D21
VSS
VCC
D6
D22
D7
D23
VSS
A6
A7
A8
No Connection
VSS
D31/A-1
D15
D30
D14
VSS
VCC
D29
D13
D28
D12
D27
D11
D26
D10
VSS
VCC
D25
D9
D24
D8
VCC
NC
A18
A17
A16
A15
A14
A13
MODE SELECTION
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
CE OE Word D31/A-1D0~D15 D16~D31 Mode Power
H
L
L
X
H
L
X
X
H
X
X
High Z High Z
High Z High Z
-
-
Stand-by
Active
Output D0~D15 D16~D31 Double Active
Word
L
L
L
Input D0~D15 High Z Word
Active
A9
A10
A11
A12
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REV. 1.9, FEB. 01, 1999
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INDEX
MX23L1622
BLOCK DIAGRAM
A0/(A-1)
A2
A3
D0
Double
Word/
Word
Address
Buffer
Memory
Array
Page
Page
Output
Buffer
Buffer
Decoder
D31/(D15)
A18
CE
WORD
OE
ABSOLUTE MAXIMUM RATINGS
Item
Symbol
VIN
Ratings
Voltage on any Pin Relative to VSS
Ambient OperatingTemperature
StorageTemperature
-1.3V to VCC+2.0V (Note)
0°C to 70°C
Topr
Tstg
-65°C to 125°C
Note: Minimum DC voltage on input or I/O pins is -0.5V.
During voltage transitions, inputs may undershoot VSS
to -1.3V for periods of up to 20ns. Maximum DC volt-
age on input or I/O pins is VCC+0.5V. During voltage
transitions, input may overshoot VCC to VCC+2.0V for
periods of up to 20ns.
DC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 3.3V±10%)
Item
Symbol
VOH
VOL
VIH
MIN.
MAX.
Conditions
Output High Voltage
Output Low Voltage
Input High Voltage
Input Low Voltage
Input Leakage Current
Output Leakage Current
Operating Current
Standby Current (TTL)
Standby Current (CMOS)
Input Capacitance
Output Capacitance
2.4V
-
IOH = -0.4mA
IOL = 1.6mA
-
0.4V
VCC+0.3V
0.8V
5uA
2.2V
VIL
-0.3V
ILI
-
-
-
-
-
-
-
0V, VCC
0V, VCC
ILO
5uA
ICC1
ISTB1
ISTB2
CIN
60mA
1mA
50uA
10pF
10pF
tRC = 100ns, all output open
CE = VIH
CE>VCC-0.2V
Ta = 25°C, f = 1MHZ
Ta = 25°C, f = 1MHZ
COUT
P/N:PM0400
REV. 1.9, FEB. 01, 1999
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INDEX
MX23L1622
AC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 3.3V±10%)
Item
Symbol
23L1622-10
23L1622-12
MIN.
MAX.
MIN.
MAX.
-
Read Cycle Time
tRC
tAA
tACE
tPA
100ns
-
120ns
Address Access Time
Chip Enable Access Time
Page Mode Access Time
Output Enable Time
-
100ns
100ns
30ns
30ns
-
-
120ns
120ns
45ns
45ns
-
-
-
-
-
tOE
tOH
tHZ
-
-
Output Hold After Address
Output High Z Delay
0ns
-
0ns
-
20ns
20ns
Note:Output high-impedance delay (tHZ) is measured
from OE or CE going high, and this parameter guaran-
teed by design over the full voltage and temperature
operating range - not tested.
AC Test Conditions
Input Pulse Levels
Input Rise and Fall Times
Input Timing Level
Output Timing Level
Output Load
0.4V~ 2.4V
10ns
IOH (load)=-04.mA
1.5V
DOUT
0.8 and 2.0V
See Figure
IOL (load)=1.6mA
C<100pF
Note:No output loading is present in tester load board.
Active loading is used and under software programming control.
Output loading capacitance includes load board's and all stray capacitance.
P/N:PM0400
REV. 1.9, FEB. 01, 1999
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INDEX
MX23L1622
TIMING DIAGRAM
RANDOM READ
ADD
tRC
ADD
ADD
CE
ADD
tACE
tOE
OE
tHZ
VALID
tOH
VALID
tAA
DATA
VALID
PAGE READ
A3-A18
VALID ADD
2'nd ADD
tPA
3'rd ADD
(A-1),A0,A1,A2
DATA
1'st ADD
tAA
VALID
VALID
VALID
Note: CE, OE are enable.
Page size is 8 double words in 32-bit mode, 16 words in 16-bit mode.
P/N:PM0400
REV. 1.9, FEB. 01, 1999
4
INDEX
MX23L1622
REVISION HISTORY
Revision
1.8
Description
1) Added Block Diagram.
Page
Date
MAR/25/1998
2) Added note to describe the minimum and maximum overshoot
ranges.
3) Changed page mode access time (tPA) and output enable time
(tOE) as 45ns instead of 50ns.
4) Added 100ns speed grade.
1.9
AC CHARACTERISTICS tOH 10ns-->0ns
P3
FEB/01/1999
P/N:PM0400
REV. 1.9, FEB. 01, 1999
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INDEX
MX23L1622
MACRONIX INTERNATIONAL CO., LTD.
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http : //www.macronix.com
MACRONIX INTERNATIONAL CO., LTD. reserves the rignt to change product and specifications without notice.
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