MP9942A [MPS]
High Efficiency 2A, 36V, 410kHz Synchronous Step-Down Converter with Power Good;
| 型号： | MP9942A |
| 厂家： | 
MONOLITHIC POWER SYSTEMS |
| 描述： | High Efficiency 2A, 36V, 410kHz Synchronous Step-Down Converter with Power Good |
| 文件： | 总21页 (文件大小：787K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MP9942A
High Efficiency 2A, 36V, 410kHz
Synchronous Step-Down Converter
with Power Good
The Future of Analog IC Technology
DESCRIPTION
FEATURES
The
MP9942A
is
a
high-frequency,
Wide 4V to 30V Continuous Operating Input
Range
36V Input Transient Tolerance
90mΩ/55mΩ Low RDS(ON) Internal Power
MOSFETs
High-Efficiency Synchronous Mode
Operation
410kHz Switching Frequency
Synchronizes from 200kHz to 2.2MHz
External Clock
High Duty Cycle for Automotive Cold-crank
Force CCM Mode
Internal Soft-Start
Power Good Indicator
Over-Current Protection with Hiccup
Thermal Shutdown
synchronous, rectified, step-down, switch-mode
converter with built-in power MOSFETs. It
offers a very compact solution to achieve a 2A
continuous output current with excellent load
and line regulation over a wide input supply
range. The MP9942A has synchronous mode
operation for higher efficiency over the output
current load range.
Current-mode operation provides fast transient
response and eases loop stabilization.
Full protection features include over-current
protection and thermal shutdown.
The MP9942A requires a minimal number of
readily-available standard external components,
and is available in a space-saving 8-pin
TSOT23 package.
Output Adjustable from 0.8V
Available in an 8-pin TSOT-23 package
APPLICATIONS
Automotive
Industrial Control System
Distributed Power Systems
All MPS parts are lead-free, halogen free, and adhere to the RoHS directive. For
MPS green status, please visit MPS website under Quality Assurance.
“MPS” and “The Future of Analog IC Technology” are Registered Trademarks of
Monolithic Power Systems, Inc.
TYPICAL APPLICATION
BST
VIN
IN
R4
20
C1
22
MP9942A
F
C4
100nF
L1
3.3V/2A
SW
FB
VOUT
EN/SYNC
EN/SYNC
10
H
C2
47
F
PG
R9
51k
R1
41.2k
VCC
GND
C6
0.1
R2
13k
F
MP9942A Rev. 1.0
10/14/2016
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1
MP9942A – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
ORDERING INFORMATION
Part Number*
Package
Top Marking
MP9942AGJ
TSOT23-8
See Below
* For Tape & Reel, add suffix –Z (e.g. MP9942AGJ–Z).
TOP MARKING
AQW: product code of MP9942AGJ;
Y: year code;
PACKAGE REFERENCE
TOP VIEW
PG
IN
FB
1
2
3
4
8
7
6
5
VCC
SW
GND
EN/SYNC
BST
TSOT23-8
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MP9942A – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
ABSOLUTE MAXIMUM RATINGS (1)
VIN ..................................................-0.3V to 40V
VSW..................................................-0.3V to 41V
Thermal Resistance (5)
TSOT23-8..............................100..... 55... °C/W
θJA
θJC
Notes:
V
BST ........................................................ VSW+6V
1) Absolute maximum ratings are rated under room temperature
unless otherwise noted. Exceeding these ratings may
damage the device.
2) About the details of EN pin’s ABS MAX rating, please refer to
page 12, Enable/SYNC control section.
3) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-to-
ambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ
(MAX)-TA)/θJA. Exceeding the maximum allowable power
dissipation will cause excessive die temperature, and the
regulator will go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
All Other Pins................................ -0.3V to 6V (2)
(3)
Continuous Power Dissipation (TA = +25°C)
TSOT23-8................................................ 1.25W
Junction Temperature...............................150°C
Lead Temperature ....................................260°C
Storage Temperature................. -65°C to 150°C
Recommended Operating Conditions (4)
Continuous Supply Voltage VIN...........4V to 30V
Output Voltage VOUT..................0.8V to VIN*DMAX
Operating Junction Temp. (TJ). -40°C to +125°C
4) The device is not guaranteed to function outside of its
operating conditions.
5) Measured on JESD51-7, 4-layer PCB.
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MP9942A – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
ELECTRICAL CHARACTERISTICS
VIN = 12V, TJ = +25°C, unless otherwise noted.
Parameter
Symbol
Condition
Min
Typ
Max
Units
Supply Current (Shutdown)
ISHDN
VEN = 0V
8
μA
Supply Current (Quiescent)
HS Switch-ON Resistance
IQ
VEN = 2V, VFB = 1V
VBST-SW=5V
0.5
90
55
0.7
mA
RON_HS
155
mΩ
LS Switch-ON Resistance
Switch Leakage
RON_LS
ILKG_SW
ILIMIT
VCC =5V
105
1
mΩ
μA
A
VEN = 0V, VSW =12V
Under 40% Duty Cycle
Current Limit
3.5
5
7
Oscillator Frequency
Fold-Back Frequency
Maximum Duty Cycle
Minimum ON Time(6)
Sync Frequency Range
Feedback Voltage
fSW
fFB
VFB=750mV
320
70
410
100
95
500
130
kHz
kHz
%
VFB<400mV
DMAX
VFB=750mV, 410kHz
92
tON_MIN
fSYNC
70
ns
0.2
2.4
804
100
1.65
1.45
MHz
mV
nA
V
VFB
780
792
10
Feedback Current
IFB
VFB=820mV
EN Rising Threshold
EN Falling Threshold
VEN_RISING
VEN_FALLING
VEN_HYS
1.15
1.05
1.4
1.25
V
EN Threshold Hysteresis
150
mV
VEN=2V
VEN=0
4
0
6
μA
μA
EN Input Current
IEN
0.2
VIN Under-Voltage Lockout
Threshold-Rising
INUVRISING
3.3
3.1
3.5
3.3
3.7
3.5
V
V
VIN Under-Voltage Lockout
Threshold-Falling
INUVFALLING
VIN Under-Voltage Lockout
Threshold-Hysteresis
INUVHYS
VCC
200
mV
VCC Regulator
ICC=0mA
4.6
4.9
1.5
1.45
170
30
5.2
4
V
%
VCC Load Regulation
Soft-Start Period
Thermal Shutdown (6)
Thermal Hysteresis (6)
PG Rising Threshold
PG Falling Threshold
ICC=5mA
tSS
TSD
VOUT from 10% to 90%
0.55
150
2.45
ms
°C
°C
%
TSD_HYS
PGVth_RISING as percentage of VFB
PGVth FALLING as percentage of VFB
86.5
80.5
90
93.5
87.5
84
%
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MP9942A – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
ELECTRICAL CHARACTERISTICS (continued)
VIN = 12V, TJ = +25°C, unless otherwise noted.
Parameter
Symbol
Condition
Min
Typ
Max
Units
PG Threshold Hysteresis
PGVth_HYS
as percentage of VFB
6
%
PG Rising Delay
PG Falling Delay
PGTd_RISING
PGTd_FALLING
40
30
90
55
160
95
μs
μs
PG Sink Current Capability
VPG
Sink 4mA
0.1
10
0.3
V
PG Leakage Current
ILKG_PG
100
nA
Notes:
6) Derived from bench characterization. Not tested in production
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MP9942A – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
PIN FUNCTIONS
Package
Pin #
Name Description
Power Good. The output of this pin is an open drain and goes high if the output voltage
exceeds 90% of the nominal voltage.
1
PG
Supply Voltage. The MP9942A operates from a 4V to 30V input rail. Requires C1 to
decouple the input rail. Connect using a wide PCB trace.
2
3
4
IN
SW
Switch Output. Connect with a wide PCB trace.
System Ground. This pin is the reference ground of the regulated output voltage, and PCB
layout requires special care. For best results, connect to GND with copper traces and vias.
GND
Bootstrap. Requires a capacitor connected between SW and BST pins to form a floating
supply across the high-side switch driver. A 20Ω resistor placed between SW and BST cap
is strongly recommended to reduce SW spike voltage.
5
BST
Enable/Synchronize. EN/SYNC high to enable the MP9942A. Apply an external clock to
the EN/SYNC pin to change the switching frequency.
6
7
EN/SYNC
VCC
Bias Supply. Decouple with 0.1μF-to-0.22μF capacitor. Select a capacitor that does not
exceed 0.22μF
Feedback. Connect to the tap of an external resistor divider from the output to GND, to set
the output voltage. The frequency fold-back comparator lowers the oscillator frequency
when the FB voltage is below 660mV to prevent current limit runaway during a short-circuit
fault condition.
8
FB
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MP9942A – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL CHARACTERISTICS
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MP9942A – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL CHARACTERISTICS (continued)
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MP9942A – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 12V, VOUT = 3.3V, L = 10µH, RBST=20Ω, TA = +25°C, unless otherwise noted.
MP9942A Rev. 1.0
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MP9942A – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 10µH, RBST=20Ω, TA = +25°C, unless otherwise noted.
MP9942A Rev. 1.0
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MP9942A – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 10µH, RBST=20Ω, TA = +25°C, unless otherwise noted.
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MP9942A – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 10µH, RBST=20Ω, TA = +25°C, unless otherwise noted.
\
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MP9942A – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
FUNCTIONAL BLOCK DIAGRAM
Figure 1: Functional Block Diagram
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MP9942A – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
OPERATION
The MP9942A is a high-frequency, synchronous,
rectified, step-down, switch-mode converter with
built-in power MOSFETs. It offers a very compact
solution to achieve 2A continuous output current
with excellent load and line regulation over a
wide input supply range.
For example, with 12V connected to VIN, RPULLUP
≥ (12V – 6.5V) ÷ 150µA = 36.7kꢀ.
Connecting the EN/SYNC pin directly to a voltage
source without any pullup resistor requires
limiting voltage amplitude to ≤6V to prevent
damage to the Zener diode.
When MP9942A operates in a fixed-frequency,
peak-current–control mode to regulate the output
voltage, an internal clock initiates a PWM cycle.
The integrated high-side power MOSFET turns
on and remains on until its current reaches the
value set by the COMP voltage. When the power
switch is off, it remains off until the next clock
cycle starts. If the current in the power MOSFET
does not reach the current value set by COMP
within 95% of one PWM period, the power
MOSFET will be forced to turn off.
Figure 2: 6.5V-type Zener Diode
Connect an external clock with a range of
200kHz to 2.2MHz to synchronize the internal
clock rising edge to the external clock rising edge.
The pulse width of external clock signal should
be less than 2μs.
Internal Regulator
Under-Voltage Lockout
The 5V internal regulator power most of the
internal circuitries. This regulator is supplied by
the VIN input and operates in the full VIN range:
When VIN exceeds 5.0V, the output of the
regulator is in full regulation; when VIN falls below
5.0V, the output of the regulator decreases
following the VIN. A 0.1uF decoupling ceramic
capacitor is needed at the pin.
Under-voltage lockout (UVLO) protects the chip
from operating at an insufficient supply voltage.
The MP9942A UVLO comparator monitors the
output voltage of the internal regulator, VCC. The
UVLO rising threshold is about 3.5V while its
falling threshold is 3.3V.
Internal Soft-Start
The soft-start prevents the converter output
voltage from overshooting during startup. When
the chip starts, the internal circuitry generates a
soft-start voltage (SS) that ramps up from 0V to
1.2V. When SS is lower than REF, SS overrides
REF so the error amplifier uses SS as the
reference. When SS exceeds REF, the error
amplifier uses REF as the reference. The SS
time is internally set to 1.45ms.
Error Amplifier
The error amplifier compares the FB pin voltage
against the internal 0.792V reference (REF) and
outputs a COMP voltage—this COMP voltage
controls the power MOSFET current. The
optimized
internal
compensation
network
minimizes the external component count and
simplifies the control loop design.
Enable/SYNC Control
Over-Current Protection and Hiccup
EN/SYNC is a digital control pin that turns the
regulator on and off: Drive EN/SYNC high to turn
on the regulator, drive it low to turn it off. An
internal 500kꢀ resistor from EN/SYNC to GND
allows EN/SYNC to be floated to shut down the
chip.
The MP9942A has cycle-by-cycle over current
limit when the inductor current peak value
exceeds the set current limit threshold. If the
output voltage starts to drop until FB is below the
Under-Voltage (UV) threshold—typically 84%
below the reference—the MP9942A enters
hiccup mode to periodically restart the part. This
protection mode is especially useful when the
The EN/SYNC pin is clamped internally using a
6.5V series Zener diode, as shown in Figure 2
Connect the EN/SYNC pin through a pullup
resistor to any voltage connected to the VIN pin—
the pullup resistor limits the EN/SYNC input
current to less than 150µA.
MP9942A Rev. 1.0
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MP9942A – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
output is dead-shorted to ground. The average
floating driver is not subject to this shutdown
command.
short-circuit current is greatly reduced to alleviate
the thermal issue and to protect the regulator.
The MP9942A exits the hiccup mode once the
over-current condition is removed.
Power Good
The MP9942A has power good (PG) output. The
PG pin is the open drain of a MOSFET. It should
be connected to VCC or some other voltage
source through a resistor (e.g. 100kꢀ). In the
presence of an input voltage, the MOSFET turns
on so that the PG pin is pulled to low before SS
is ready. After VFB reaches 90%×REF, the PG pin
is pulled high after a delay, typically 90μs. When
Thermal Shutdown
Thermal shutdown prevents the chip from
operating at exceedingly high temperatures.
When the silicon die temperature exceeds 170°C,
it shuts down the whole chip. When the
temperature drops below its lower threshold
(typically 140°C) the chip is enabled again.
VFB drops to 84%×REF, the PG pin is pulled low.
Floating Driver and Bootstrap Charging
An external bootstrap capacitor powers the
floating power MOSFET driver. This floating
driver has its own UVLO protection, with a rising
threshold of 2.2V and hysteresis of 150mV. The
bootstrap capacitor voltage is regulated internally
by VIN through D1, M1, C4, L1 and C2 (Figure 3).
If (VIN-VSW) exceeds 5V, U1 regulates M1 to
maintain a 5V BST voltage across C4. A 20ꢀ
resistor placed between SW and BST cap is
strongly recommended to reduce SW spike
voltage.
Also, PG is pulled low if thermal shutdown or EN
is pulled low.
Figure 3: Internal Bootstrap Charging Circuit
Startup and Shutdown
If both VIN and EN exceed their appropriate
thresholds, the chip starts: The reference block
starts first, generating stable reference voltage
and currents, and then the internal regulator is
enabled. The regulator provides stable supply for
the remaining circuitries.
Three events can shut down the chip: EN low, VIN
low, and thermal shutdown. In the shutdown
procedure, the signaling path is first blocked to
avoid any fault triggering. The COMP voltage and
the internal supply rail are then pulled down. The
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MP9942A – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
APPLICATION INFORMATION
Setting the Output Voltage
Choose the inductor ripple current to be
approximately 30% of the maximum load current.
The maximum inductor peak current is:
The external resistor divider sets the output
voltage (see Typical Application on page 1).
Choose R1 around 41.2kꢀ. R2 is then given by:
IL
2
IL(MAX) ILOAD
VIN UVLO Setting
R1
R2
VOUT
1
0.792V
The MP9942A has internal fix under voltage lock
out (UVLO) threshold: rising threshold is 3.5V
while falling threshold is about 3.3V. For the
application needs higher UVLO point, external
resistor divider between EN/SYNC and IN as
shown in Figure 5 can be used to get higher
equivalent UVLO threshold.
The T-type network—as shown in Figure —is
highly recommended when VOUT is low.
RT
R1
VOUT
8
FB
R2
Figure 4: T-Type Network
RT+R1 is used to set the loop bandwidth.
Basically, higher RT+R1, lower bandwidth. To
ensure the loop stability, it is strongly
recommended to limit the bandwidth lower than
40kHz based on the 410kHz default fsw. Table 1
lists the recommended T-type resistors value for
common output voltages.
Figure 5: Adjustable UVLO using EN divider
The UVLO threshold can be computed from
below two equations:
Table 1: Resistor Selection for Common Output
Voltages (7)
VOUT (V)
R1 (kꢀ)
41.2 (1%)
41.2 (1%)
R2 (kꢀ)
13 (1%)
RT (kꢀ)
51 (1%)
51 (1%)
REN_UP
INUVRISING (1
INUVFALLING (1
) VEN_RISING
3.3
5
500k//REN_DOWN
7.68 (1%)
REN_UP
Notes:
) VEN_FALLING
7) The feedback resistors in Table 1 are optimized for 410kHz
switching frequency. The detailed schematic is shown on
TYPICAL APPLICATION CIRCUITS.
500k//REN_DOWN
Where VEN_RISING=1.4V, VEN_FALLING=1.25V.
Selecting the Inductor
When choose REN_UP, make sure it is big enough
to limit the current flows into EN/SYNC pin lower
than 100uA.
Use a1µH-to-10µH inductor with a DC current
rating of at least 25% percent higher than the
maximum load current for most applications. For
highest efficiency, an inductor with small DC
resistance is recommended. For most designs,
the inductance value can be derived from the
following equation.
Selecting the Input Capacitor
The input current to the step-down converter is
discontinuous, therefore requires a capacitor is to
supply the AC current to the step-down converter
VOUT (V VOUT
)
IN
L1
V IL fOSC
IN
Where ∆IL is the inductor ripple current.
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MP9942A – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
while maintaining the DC input voltage. Use low
Where L1 is the inductor value and RESR is the
equivalent series resistance (ESR) value of the
output capacitor.
ESR capacitors for the best performance. Use
ceramic capacitors with X5R or X7R dielectrics
for best results because of their low ESR and
small temperature coefficients.
For ceramic capacitors, the capacitance
dominates the impedance at the switching
frequency, and the capacitance causes the
majority of the output voltage ripple. For
simplification, the output voltage ripple can be
estimated by:
For most application, a 22µF ceramic capacitor is
sufficient to maintain the DC input voltage. And it
is strongly recommended to use another lower
value capacitor (e.g. 0.1µF) with small package
size (0603) to absorb high frequency switching
noise. Make sure place the small size capacitor
as close to IN and GND pins as possible (see
PCB LAYOUT section).
VOUT
8 fS2 L1 C2
VOUT
∆VOUT
1
V
IN
For tantalum or electrolytic capacitors, the ESR
dominates the impedance at the switching
frequency. For simplification, the output ripple
can be approximated to:
Since C1 absorbs the input switching current, it
requires an adequate ripple current rating. The
RMS current in the input capacitor can be
estimated by:
VOUT
VOUT
∆VOUT
1
RESR
fS L1
V
IN
VOUT
VIN
VOUT
VIN
IC1 ILOAD
1
The characteristics of the output capacitor also
affect the stability of the regulation system. The
MP9942A can be optimized for a wide range of
capacitance and ESR values.
The worse case condition occurs at VIN = 2VOUT
,
where:
ILOAD
IC1
BST Resistor and External BST Diode
2
A 20ꢀ resistor in series with BST capacitor is
recommended to reduce the SW spike voltage.
Higher resistance is better for SW spike
reduction, but will compromise the efficiency on
the other hand.
For simplification, choose an input capacitor with
an RMS current rating greater than half of the
maximum load current.
The input capacitor can be electrolytic, tantalum
or ceramic. When using electrolytic or tantalum
capacitors, add a small, high quality ceramic
capacitor (e.g. 1μF) placed as close to the IC as
possible. When using ceramic capacitors, make
sure that they have enough capacitance to
provide sufficient charge to prevent excessive
voltage ripple at input. The input voltage ripple
caused by capacitance can be estimated by:
An external BST diode can enhance the
efficiency of the regulator when the duty cycle is
high (>65%) or VIN is below 5V, and also help to
avoid BST voltage insufficient. A power supply
between 3.3V and 5V can be used to power the
external bootstrap diode and VCC or VOUT is
the good choice of this power supply in the circuit
as shown in Figure 6.
ILOAD
VOUT
VOUT
V
1
IN
fS C1
V
IN
V
IN
Selecting the Output Capacitor
The output capacitor (C2) maintains the DC
output voltage. Use ceramic, tantalum, or low-
ESR electrolytic capacitors. For best results, use
low ESR capacitors to keep the output voltage
ripple low. The output voltage ripple can be
estimated by:
VOUT
VOUT
1
VOUT
1
R
ESR
fS L1
V
8 fS C2
IN
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MP9942A – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
GND
C4
SW
C6
R7
C8
C1
L1
R5
Figure 6: Optional External Bootstrap Diode to
Enhance Efficiency
The recommended external BST diode is
1N4148, and the BST capacitor value is 0.1µF to
1μF.
Vin
C2
Vout
PCB Layout (8)
GND
PCB layout, especially the input capacitor and
VCC capacitor placement, is very important to
achieve stable operation. For the best results,
follow these guidelines:
Top Layer
1) Place the ceramics input capacitor as close to
IN and GND pins as possible, especially the
small package size (0603) input bypass capacitor.
Keep the connection of input capacitor and IN pin
as short and wide as possible.
2) Place the VCC capacitor to VCC pin and GND
pin as close as possible. Make the trace length of
VCC pin-VCC capacitor anode-VCC capacitor
cathode-chip GND pin as short as possible.
3) Use large ground plane directly connect to
GND pin. Add vias near the GND pin if bottom
layer is ground plane.
4) Route SW, BST away from sensitive analog
areas such as FB.
5) Place the T-type feedback resistor close to
chip to ensure the trace which connects to FB pin
as the short as possible.
Notes:
8) The recommended layout is based on the typical application
circuit in Page 18.
Bottom Layer
Figure 7: Recommended PCB Layout
MP9942A Rev. 1.0
10/14/2016
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2016 MPS. All Rights Reserved.
18
MP9942A – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
Design Example
Below is a design example following the
application guidelines for the specifications:
Table 2—Design Example
VIN
VOUT
IO
12V
3.3V
2A
The detailed application schematic is shown in
Figure 8. The typical performance and circuit
waveforms have been shown in the Typical
Performance Characteristics section. For more
device applications, please refer to the related
Evaluation Board Datasheets.
MP9942A Rev. 1.0
10/14/2016
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2016 MPS. All Rights Reserved.
19
MP9942A – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL APPLICATION CIRCUITS
Figure 8: 12VIN, 3.3V/2A Output
MP9942A Rev. 1.0
10/14/2016
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2016 MPS. All Rights Reserved.
20
MP9942A – 36V, 2A SYNCHRONOUS STEP-DOWN CONVERTER
PACKAGE INFORMATION
TSOT23-8
See note 7
EXAMPLE
TOP MARK
PIN 1 ID
RECOMMENDED LAND PATTERN
TOP VIEW
SEATING PLANE
SEE DETAIL ''A''
FRONT VIEW
SIDE VIEW
NOTE:
1) ALL DIMENSIONS ARE IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD
FLASH, PROTRUSION OR GATE BURR.
3) PACKAGE WIDTH DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
4) LEAD COPLANARITY (BOTTOM OF LEADS
AFTER FORMING) SHALL BE 0.10 MILLIMETERS
MAX.
DETAIL ''A''
5) JEDEC REFERENCE IS MO-193, VARIATION BA.
6) DRAWING IS NOT TO SCALE.
7) PIN 1 IS LOWER LEFT PIN WHEN READING TOP
MARK FROM LEFT TO RIGHT, (SEE EXAMPLE TOP
MARK)
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MP9942A Rev. 1.0
10/14/2016
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2016 MPS. All Rights Reserved.
21
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