MP6400DJ-50-LF-Z [MPS]
Power Supply Support Circuit, Fixed, 1 Channel, PDSO6, ROHS COMPLIANT, MO-193AB, TSOT-23, 6 PIN;
| 型号： | MP6400DJ-50-LF-Z |
| 厂家： | 
MONOLITHIC POWER SYSTEMS |
| 描述： | Power Supply Support Circuit, Fixed, 1 Channel, PDSO6, ROHS COMPLIANT, MO-193AB, TSOT-23, 6 PIN 光电二极管 |
| 文件： | 总12页 (文件大小：289K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MP6400
Low Quiescent Current
Programmable-Delay
Supervisory Circuit
The Future of Analog IC Technology
DESCRIPTION
FEATURES
The MP6400 family is the microprocessor (µP)
supervisory circuit which can monitor and
provide reset function for system voltages from
0.4V. When either the SENSE voltage falls
•
Fixed Threshold Voltages for Standard
Voltage Rails From 0.9V to 5V and
Adjustable Voltage From 0.4V are Available
Low Quiescent Current: 1.6uA typ
Power-On Reset Generator with Adjustable
Delay Time: 2.1ms to 10s
•
•
below its threshold (VIT) or the voltage of
MR
manual reset (
) is pulled to a logic low, the
RESET
signal will be asserted. The reset
voltage can be factory-set for standard voltage
rails from 0.9V to 5V, while the MP6400DG(J)-
01 reset voltage is adjustable with an external
•
•
•
•
•
•
High Threshold Accuracy: ±1% typ
MR
Manual Reset (
Open-Drain
) Input
Output
RESET
Immune to Short Negative SENSE voltage
Guaranteed Reset Valid to VCC=0.8V
6 Pin TSOT23 and 2mm×2mm QFN
MR
resistor divider. When SENSE voltage and
exceed their thresholds,
RESET
is driven to a
logic high after a user-programmable delay time.
APPLICATIONS
The MP6400 has a very low quiescent current
of 1.6μA typically, which makes it ideal suitable
for battery-powered applications. It provides a
precision reference to achieve ±1% threshold
accuracy. The reset delay time can be selected
by a capacitor which is connected between
•
•
•
•
•
DSP or Micro controller Applications
Laptop/Desktop Computers
PDAs/Hand-Held Products
Portable/Battery-Powered Products
FPGA/ASIC Applications
CDELAY and GND, allowing the user to select any
All MPS parts are lead-free and adhere to the RoHS directive. For MPS green
status, please visit MPS website under Quality Assurance. “MPS” and “The
Future of Analog IC Technology” are Registered Trademarks of Monolithic
Power Systems, Inc.
delay time from 2.1ms to 10s. 380ms delay time
is selected by connecting the CDELAY pin to VCC,
while 24ms delay time by leaving the CDELAY pin
float. MP6400 is available in TSOT23 and
2mm×2mm 6-pin QFN packages.
TYPICAL APPLICATION
VCC
R1
VCC
Microprocessor
SENSE
R3
C3
DSP
MP6400
Microcontroller
C2
C1
MR
GND
RESET
CDELAY
RESET
GND
R2
CDELAY
MP6400 Rev. 1.1
12/27/2013
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© 2013 MPS. All Rights Reserved.
1
TM
MP6400 -- LOW QUIESCENT CURRENT PROGRAMMABLE-DELAY SUPERVISORY CIRCUIT
ORDERING INFORMATION
Part Number*
MP6400DG-01
MP6400DG-09
MP6400DG-12
MP6400DG-15
MP6400DG-25
MP6400DG-30
MP6400DG-33
MP6400DJ-01
MP6400DJ-09
MP6400DJ-12
MP6400DJ-15
MP6400DJ-25
MP6400DJ-30
MP6400DJ-33
Package
Top Marking
Free Air Temperature (TA)
5B
AD
AC
QFN6 (2x2mm)
Contact Factory
4V
Contact Factory
9R
–40°C to +85°C
4B
AAG
Contact Factory
Contact Factory
4V
TSOT23-6
Contact Factory
3S
*For Tape & Reel, add suffix –Z (e.g. MP6400DG–XX-Z);
For RoHS compliant packaging, add suffix –LF (e.g. MP6400DG–XX-LF–Z).
* For other versions, contact factory for availability.
PACKAGE REFERENCE
TOP VIEW
TOP VIEW
RESET
GND
MR
1
2
3
6
5
4
VCC
VCC
SENSE
CDELAY
1
2
3
6
5
4
RESET
GND
MR
SENSE
CDELAY
QFN6 (2mm x 2mm)
TSOT23-6
MP6400 Rev. 1.1
12/27/2013
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© 2013 MPS. All Rights Reserved.
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TM
MP6400 -- LOW QUIESCENT CURRENT PROGRAMMABLE-DELAY SUPERVISORY CIRCUIT
Recommended Operating Conditions (3)
Supply Voltage VCC ............................1.8V to 6V
Operating Junct. Temp (TJ)..... –40°C to +125°C
ABSOLUTE MAXIMUM RATINGS (1)
Supply Voltage VCC .........................-0.3 to 6.5 V
CDELAY Voltage VCDELAY ....... –0.3V to VCC + 0.3V
Thermal Resistance (4)
θJA
θJC
SENSE Voltage VSENSE ....................–0.3V to 6V
All Other Pins..............................–0.3V to +6.5V
RESET Current IRESET ................................ 5mA
Continuous Power Dissipation (TA = +25°C) (2)
QFN6 (2mmx2mm) .................................... 2.5W
TSOT23-6................................................ 0.57W
Junction Temperature...............................150°C
Lead Temperature ....................................260°C
Storage Temperature.............. –65°C to +150°C
QFN6 (2mmx2mm) ................50 ...... 12...°C/W
TSOT23-6 ..............................220 .... 110..°C/W
Notes:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ(MAX), the junction-to-
ambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD(MAX)=(TJ(MAX)-
TA)/θJA. Exceeding the maximum allowable power dissipation
will cause excessive die temperature, and the regulator will go
into thermal shutdown. Internal thermal shutdown circuitry
protects the device from permanent damage.
3) The device is not guaranteed to function outside of its
operating conditions.
4) Measured on JESD51-7 4-layer board.
MP6400 Rev. 1.1
12/27/2013
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TM
MP6400 -- LOW QUIESCENT CURRENT PROGRAMMABLE-DELAY SUPERVISORY CIRCUIT
ELECTRICAL CHARACTERISTICS
1.8V≤VCC≤6V, R3 = 100kΩ, C3 = 47pF, TA= -40°C to +85°C, Typical values are at TA=+25°C, unless
otherwise noted.
Parameters
Symbol Condition
Min
Typ
Max
Units
Input Supply Range
VCC
1.8
6
V
RESET
not
RESET
VCC = 3.3V,
asserted.
MR
1.6
3.5
12
µA
µA
,
,
C
DELAY open
Supply Current
(current into VCC pin)
ICC
RESET
not
RESET
VCC = 6V,
asserted.
MR
,
1.85
,
C
DELAY open
1.3V ≤ VCC < 1.8V,
OL = 0.4mA
0.3
0.4
V
V
I
Low-level Output Voltage
Power-up Reset Voltage(5)
VOL
1.8V ≤ VCC ≤ 6V,
IOL = 1.0mA
V
RESET
(max) = 0.2V,
15u A
IOL
=
0.8
V
Trise(Vcc)≥15µs/V
Negative-going Input Threshold
Accuracy
VIT
VSENSE falling slowly
±1.0
±2.0
3.5
%
Hysteresis on VIT Pin
VHYS
R
1.5
VIT%
MR
MR
50
110
kΩ
Internal Pull-up Resistance
MP6400DJ-01
VSENSE = VIT
-25
+25
nA
µA
Input Current at SENSE Pin
ISENSE
Fixed versions
2.4
V
SENSE = 6V
V
RESET
RESET = 6V,
not
RESET
Leakage Current
300
nA
asserted
MR
VIL
VIH
0.25VCC
V
V
Logic Low Input
MR
0.7VCC
Logic High Input
SENSE
Duration
Maximum
Transient
VIH = 1.05 VIT,
VIL = 0.95 VIT
tw
17.5
µs
CDELAY = Open
15
230
1.3
61
24
34
530
3
ms
ms
ms
ms
(6)
380
2.1
102
CDELAY = VCC
RESET
td
Delay Time
CDELAY = 150pF
DELAY = 10nF(6)
142
C
MR
to
RESET
VIH = 0.7 VCC
VIL = 0.25 VCC
,
Propagation Delay
tpHL1
160
ns
µs
RESET
High to Low Level
RESET
SENSE to
Delay,
VIH = 1.05 VIT,
VIL = 0.95 VIT
tpHL2
17.5
Note:
RESET
5) The lowest supply voltage (VCC) at which
6) Guaranteed by design.
becomes active.
MP6400 Rev. 1.1
12/27/2013
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TM
MP6400 -- LOW QUIESCENT CURRENT PROGRAMMABLE-DELAY SUPERVISORY CIRCUIT
STANDARD VERSIONS (7)
Top Mark
Product
Package
Nominal Supply Voltage
Threshold Voltage (VIT)
5B
4B
AD
AAG
MP6400DG-01
MP6400DJ-01
MP6400DG-09
MP6400DJ-09
MP6400DG-12
MP6400DJ-12
MP6400DG-125
MP6400DJ-125
MP6400DG-15
MP6400DJ-15
MP6400DG-18
MP6400DJ-18
MP6400DG-25
MP6400DJ-25
MP6400DG-30
MP6400DJ-30
MP6400DG-33
MP6400DJ-33
MP6400DG-50
MP6400DJ-50
QFN
TSOT23
QFN
TSOT23
QFN
TSOT23
QFN
TSOT23
QFN
TSOT23
QFN
TSOT23
QFN
TSOT23
QFN
TSOT23
QFN
Adjustable
0.4V
0.9V
1.2V
1.25V
1.5V
1.8V
2.5V
3.0V
3.3V
5.0V
0.84V
1.12V
1.16V
1.40V
1.67V
2.33V
2.79V
3.07V
4.65V
AC
Contact Factory
Contact Factory
Contact Factory
Contact Factory
Contact Factory
Contact Factory
Contact Factory
4V
4V
Contact Factory
Contact Factory
9R
3S
TSOT23
QFN
TSOT23
Contact Factory
Contact Factory
Note:
7) In “MP6400DG(J)- _ _”, the “_ _” are placeholders for the monitored voltage levels of the devices. Desired monitored voltages are set by
the suffix found in ordering information.
MP6400 Rev. 1.0
12/27/2013
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TM
MP6400 -- LOW QUIESCENT CURRENT PROGRAMMABLE-DELAY SUPERVISORY CIRCUIT
PIN FUNCTIONS
QFN
Pin #
TSOT
Pin #
Name Description
RESET
is an open drain signal which will be asserted when the SENSE voltage
MR
drops below a preset threshold or when the manual reset (
) pin drops to a logic
delay time is programmable from 2.1ms to 10s by using external
capacitors. A pull-up resistor bigger than 10k should be connected this pin to
RESET
RESET
6
1
low. The
RESET
outputting a higher voltage than VCC is allowable.
supply line, and the
5
4
2
3
GND
Ground.
MR
) can introduce another logic signal to control the
RESET
. It is
MR
The manual reset (
internally connected to VCC through a 90kΩ resistor.
Programmable reset delay time pin. When CDELAY connected to VCC through a
resistor between 50kΩ and 200kΩ, a 380ms delay time is selected. When CDELAY
floated, the delay time is 24ms. A capacitor bigger than 150pF connected CDELAY to
GND could be used to get the user’s programmable time from 2.1ms to 10s.
3
4
CDELAY
SENSE pin is connected to the monitored system voltage. When the monitored
RESET
2
1
5
6
SENSE
VCC
voltage is below desired threshold,
is asserted.
Supply voltage. A 0.1uF decoupling ceramic capacitor should be put close to this
pin.
DETAIL DESCRIPTION
The MP6400 product family asserts a
RESET
output remains asserted for
programmable delay time. Two fixed
a
user’s
delay
RESET
signal when either the SENSE pin voltage is
MR
lower than VIT or the manual reset ( ) is driven
low. The MP6400 family can be monitored a fixed
voltage from 0.9V to 5.0V, while the
MP6400DG(J)-01 can monitor any voltage above
times are user-selectable: 380ms delay time by
connecting the CDELAY pin to VCC, and 24ms delay
time by leaving the CDELAY pin float. Any delay
time from 2.1ms to 10s could be gotten by
connecting a capacitor between CDELAY and GND.
The wide monitor voltage and programmable
reset delay time make MP6400 product family
suitable for a broad array of applications.
0.4V by adjusting the external resistor divider.
MR
After both the manual reset (
) and SENSE
RESET
voltages exceed their thresholds, the
MP6400 Rev. 1.1
12/27/2013
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TM
MP6400 -- LOW QUIESCENT CURRENT PROGRAMMABLE-DELAY SUPERVISORY CIRCUIT
TYPICAL PERFORMANCE CHARACTERISTICS
VCC=3.3V, R3 = 100kΩ, C3 = 47pF, TA= -40°C to +85°C, Typical values are at TA=+25°C, unless
otherwise noted.
Supply Current vs. V
Reset Delay Time vs. C
Maximum SENSE Transient
Duration vs.SENSE Threshold
Overdrive Voltage
CC
DELAY
4
3
100
10
100
10
1
+85OC
1
2
0.1
+25OC
1
0
0.01
0.001
-40 O
2.5
C
1.5
3.5
CC(V)
4.5
5.5
0.0001 0.001 0.01 0.1
1
10
0
10
20
30
40
50
SENSE THRESHOLD OVERDRIVE(%)
V
CDELAY(uF)
Reset Delay vs.Temperature
(CDELAY=open)
Reset Delay vs.Temperature
(CDELAY=VCC)
V
IT
vs. Temperature
0.401
460
440
420
400
380
360
340
320
30
28
26
24
22
20
0.4
0.399
0.398
0.397
0.396
0.395
-40 -20
0
20 40 60 80
-40 -20
0
20 40 60 80
-40 -20
0
20 40 60 80
I
vs. Low Level
RESET
RESET Voltage
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
VCC=1.8V
VCC=3.3V
VCC=6V
15
0
5
10
RESET(mA)
I
MP6400 Rev. 1.1
12/27/2013
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TM
MP6400 -- LOW QUIESCENT CURRENT PROGRAMMABLE-DELAY SUPERVISORY CIRCUIT
FUNCTIONAL BLOCK DIAGRAM
VCC
VCC
VCC
VCC
90k
MP6400DJ-01
Adjustable Voltage
MP6400DJ-XX
90k
RESET
RESET
MR
MR
0.4V
SENSE
--
+
R1
R2
Reset
Logic
Timer
Reset
Logic
Timer
+
--
0.4V
SENSE
CDELAY
CDELAY
GND
Adjustable Voltage Version
GND
Fixed Voltage Version
Figure 1—Functional Block Diagram
TIMING DIAGRAM
VCC
0.8V
0.0V
RESET
tD
tD
tD
tD=Reset Delay
=Undefined State
SENSE
VIT+VHYS
VIT
MR
0.7VCC
0.25VCC
Time
Figure 2—MP6400 Timing Diagram
TRUTH TABLE
SENSE > VIT
MR
RESET
L
0
1
0
1
L
L
L
L
H
H
H
MP6400 Rev. 1.1
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TM
MP6400 -- LOW QUIESCENT CURRENT PROGRAMMABLE-DELAY SUPERVISORY CIRCUIT
APPLICATION INFORMATION
connects to the SENSE pin. The circuit can be
used to monitor any voltage higher than 0.4V.
Reset Output Function
RESET
The MP6400
output is typically connected
RESET
VSEN
to the
input of a microprocessor, as shown
VOUT
RESET
in Figure 3. When
is not asserted, a pull
VCC
up resistor must be connected to hold this signal
high. The voltage of reset signal is allowed to be
higher than VCC (up to 6V) through a resistor
R1
= (1+
)
0.4
VIT
R2
R1
R2
MP6400DJ-01
RESET
pulling up from supply line. If the voltage is below
RESET
0.8V,
output is undefined. This condition
SENSE
GND
can be ignored generally because that most
microprocessors do not function at this state.
1nF
MR
When both SENSE and
are higher than their
RESET
threshold voltage,
output holds logic high.
Figure 4—MP6400DJ-01 Monitoring a User-
Defined Voltage
Once either of the two drops below their
RESET
threshold,
will be asserted.
VCC
Monitor Multiple System Voltages
MR
The manual reset (
) can introduce another
MR
RESET
R1
VCC
logic signal to control the
. When
is a
Microprocessor
DSP
RESET
logic low (0.25VCC),
MR
will be asserted. After
are above their thresholds,
SENSE
100k
both SENSE and
RESET
Microcontroller
will be driven to a logic high after a reset
0.1uF
1nF
R2
MR
MR
delay time. The
is internally connected to VCC
through a 90kΩ resistor so this pin can float. See
how multiple system voltages are monitored by
RESET
RESET
GND
47pF
CDELAY
GND
MR
MR
CDELAY
in Figure 5. If the signal on
isn’t up to VCC,
there will be an additional current through internal
90kΩ pull up resistor. A logic-level FET can be
used to minimize the leakage, as shown in Figure
6.
Figure 3—Typical Application of MP6400 with
Microprocessor
MR
From the point that
is again logic high and
3.3V
1.2V
SENSE is above VIT + VHYS (the threshold
RESET
hysteresis),
will be driven to a logic high
after a reset delay time. The reset delay time is
VCORE
VI/O
SENSE VCC
SENSE VCC
programmable by CDELAY pin. Due to the finite
RESET
impedance of
pin, the pull up resistor
MP6400DJ-33
DSP
MP6400DJ-12
should be bigger than 10kΩ.
MR
RESET
RESET
RESET
Monitor a Voltage
The SENSE input pin is connected to the
monitored system voltage directly or through a
CDELAY
GND
CDELAY
GND
GND
resistor network (on MP6400DJ-01). When the
RESET
voltage on the pin is below VIT,
is asserted.
Figure 5— MP6400 Family Monitoring Multiple
System Voltages
A threshold hysteresis will prevent the chip from
responding perturbation on SENSE pin. A 1nF to
10nF bypass capacitor should be put on this pin
to increase its immunity to noise. A typical
application of the MP6400DJ-01 is shown in
Figure 4. Two external resistors form a voltage
divider from monitored voltage to GND. Its tap
MP6400 Rev. 1.1
12/27/2013
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TM
MP6400 -- LOW QUIESCENT CURRENT PROGRAMMABLE-DELAY SUPERVISORY CIRCUIT
3.3V
The reset delay time is determined by the charge
time of external capacitor. While SENSE is above
MR
VCC
SENSE
RESET
VIT and
is a logic high, the internal 140nA
current source is enabled and starts to charge
the capacitor to set the delay time. When the
RESET
MR
capacitor voltage rises to 1.13V, the
is de-
asserted. The capacitor will be discharged when
RESET
MP6400DJ-33
the
is again asserted. Stray capacitance
GND
may cause errors of the delay time. A ceramic
capacitor with low leakage is strongly
recommended.
Figure 6—Minimizing ICC When
Signal isn’t
MR
over VCC by External MOSFET
SENSE Voltage Transients Immunity
The MP6400 can be immune to SENSE pin short
negative transient. The maximum immune
Programmable Reset Delay Time
The reset delay time can be programmed by
CDELAY configure. When CDELAY is connected to
VCC through a resistor between 50kΩ and
200kΩ, the delay time is 380ms. When CDELAY
floated, the delay time is 24ms. In addition, a
capacitor connected CDELAY to GND could be
used to get the user’s programmable delay time
from 2.1ms to 10s. The three configures can be
found in Figure 7(a)(b)(c).
duration is 17us while overdrive is 5%. A shorter
RESET
negative transient can not assert the
output. The effective duration is relative to the
threshold overdrive, as shown in Figure 8.
Maximum SENSE Transient
Duration vs.SENSE Threshold
Overdrive Voltage
100
3.3V
3.3V
SENSE
SENSE
VCC
VCC
MP6400DJ-33
MP6400DJ-33
50k
RESET
RESET
10
CDELAY
GND
CDELAY
GND
24ms Delay
(b)
380ms Delay
(a)
1
0
10
20
30
40
50
3.3V
SENSE THRESHOLD OVERDRIVE(%)
Figure 8—Maximum Transient Duration vs.
Sense Threshold Overdrive Voltage
SENSE
VCC
MP6400DJ-33
RESET
CDELAY
GND
CDELAY
(c)
Figure 7—Programmable Configurations to
the Reset Delay Time
The external capacitor CDELAY must be larger than
150pF. For a given delay time, the capacitor
value can be calculated using the following
equation:
C
DELAY (nF) = [tD (s) − 4.99×10−4 (s)]×107
MP6400 Rev. 1.1
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TM
MP6400 -- LOW QUIESCENT CURRENT PROGRAMMABLE-DELAY SUPERVISORY CIRCUIT
PACKAGE INFORMATION
QFN6 (2mm x 2mm)
1.90
2.10
0.30
0.40
0.65
0.85
PIN 1 ID
SEE DETAIL A
PIN 1 ID
MARKING
0.20
6
1
3
0.30
1.25
1.45
1.90
2.10
PIN 1 ID
INDEX AREA
0.65
BSC
4
TOP VIEW
BOTTOM VIEW
PIN 1 ID OPTION A
0.30x45º TYP.
PIN 1 ID OPTION B
R0.20 TYP.
0.80
1.00
0.20 REF
0.00
0.05
SIDE VIEW
DETAIL A
1.90
NOTE:
0.70
0.70
1) ALL DIMENSIONS ARE IN MILLIMETERS.
2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH.
3) LEAD COPLANARITY SHALL BE 0.10 MILLIMETER MAX.
4) JEDEC REFERENCE IS MO-229, VARIATION VCCC.
5) DRAWING IS NOT TO SCALE.
0.25
0.65
1.40
RECOMMENDED LAND PATTERN
MP6400 Rev. 1.1
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TM
MP6400 -- LOW QUIESCENT CURRENT PROGRAMMABLE-DELAY SUPERVISORY CIRCUIT
TSOT23-6
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MP6400 Rev. 1.1
12/27/2013
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12
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TOSHIBA
MP6401DGT-25AD3-LF-Z
Fixed Positive LDO Regulator, 2.5V, CMOS, PDSO6, 2 X 2 MM, MO-229WCCC, TQFN-6
MPS
MP6401DGT-25BD3-LF-Z
Fixed Positive LDO Regulator, 2.5V, CMOS, PDSO6, 2 X 2 MM, MO-229WCCC, TQFN-6
MPS
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