MP6211DN-3 [MPS]
3.3V/5V, Single-Channel 1A Current-Limited Power Distribution Switch; 3.3V / 5V ，单通道1A限流配电开关
| 型号： | MP6211DN-3 |
| 厂家： | 
MONOLITHIC POWER SYSTEMS |
| 描述： | 3.3V/5V, Single-Channel 1A Current-Limited Power Distribution Switch |
| 文件： | 总13页 (文件大小：589K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MP6211-3/MP6212-3
3.3V/5V, Single-Channel 1A
Current-Limited Power Distribution Switch
The Future of Analog IC Technology
DESCRIPTION
FEATURES
•
•
•
•
•
•
•
•
•
1A Continuous Current
Accurate Current Limit
The
MP6211-3/MP6212-3
single-channel
Power Distribution Switch features internal
current limiting to prevent damage to host
devices due to faulty load conditions. The
MP6211-3/MP6212-3 Analog switch has 95mΩ
on-resistance and operates from 2.7V to 5.5V
input. It is available with guaranteed current
limits, making it ideal for load switching
applications. The MP6211-3/MP6212-3 has
built-in protection for both over current and
increased thermal stress. For over current, the
device will limit the current by changing to a
constant current mode.
2.7V to 5.5V Supply Range
90uA Quiescent Current
95mΩ MOSFET
Thermal-Shutdown Protection
Under-Voltage Lockout
8ms FLAG Deglitch Time
FLAG Won't Change State At Input UVLO
Transition
Reverse Current Blocking
Active High & Active Low Options
SOIC8E and MSOP8E Packages
•
•
•
As the temperature increases as a result of
short circuit, the device will shut off. The device
will recover once the device temperature
reduces to approx 120°C.
APPLICATIONS
•
•
•
•
•
•
Smartphone and PDA
Portable GPS Device
Notebook PC
Set-top-box
Telecom and Network Systems
USB Power Distribution
The FLAG output of MP6211-3/MP6212-3 will
report a fail mode (low level) when over current
or over temperature is encountered. The FLAG
will not change state when the input UVLO is
triggered.
For MPS green status, please visit MPS website under Quality Assurance.
“MPS” and “The Future of Analog IC Technology” are Trademarks of Monolithic
Power Systems, Inc.
The MP6211-3/MP6212-3 is available in 8-Pin
MSOP package with exposed pad and 8-Pin
SOIC8 package with exposed pad.
TYPICAL APPLICATION
+5V
1
2, 3
4
GND
MP6211-3/
MP6212-3
6, 7,8
To VBUS
USB Ports
OUT
IN
5
FLAG
EN*
*EN is active high for MP6211-3
SINGLE-CHANNEL
MP6211-3/MP6212-3 Rev 1.0
2/18/2011
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
1
MP6211-3/MP6212-3 –CURRENT-LIMITED POWER DISTRIBUTION SWITCH
ORDERING INFORMATION
Typical Short-
Circuit Current
@ TA=25°C
Maximum
Part Number Enable Switch Continuous Load
Current
Top
Free Air
Package
Marking Temperature (TA)
MP6212DN-3
Active
SOIC8E MP6212-3
MSOP8E M6212-3
Low
MP6212DH-3
Single
1.0A
1.5A
-40°C to +85°C
MP6211-3
SOIC8E
MP6211DN-3
MP6211DH-3*
Active
High
MSOP8E M6211-3
* For Tape & Reel, add suffix –Z (e.g. MP6211DH-3–Z).
For RoHS Compliant Packaging, add suffix –LF (e.g. MP6211DH-3–LF–Z)
PACKAGE REFERENCE
TOP VIEW
TOP VIEW
GND
OUT
OUT
OUT
FLAG
1
2
3
4
8
7
6
5
OUT
OUT
OUT
FLAG
GND
IN
1
2
3
4
8
7
6
5
IN
IN
IN
EN*
EN*
EXPOSED PAD
ON BACKSIDE
CONNECT TO GND
EXPOSED PAD
ON BACKSIDE
MSOP8E
SOIC8E
MP6211-3/MP6212-3
(* EN is active high for MP6211-3)
ABSOLUTE MAXIMUM RATINGS (1)
Thermal Resistance (3)
SOIC8E ..................................50...... 10... °C/W
MSOP8E.................................55...... 12... °C/W
θJA
θJC
IN .................................................-0.3V to +6.0V
EN, FLAG, OUT to GND..............-0.3V to +6.0V
Continuous Power Dissipation. (TA = +25°C) (2)
SOIC8E...................................................... 2.5W
MSOP8E.................................................... 2.3W
Junction Temperature...............................150°C
Lead Temperature ....................................260°C
Storage Temperature............... -65°C to +150°C
Maximum Junction Temp. (TJ)............... +125°C
Notes:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-to-
ambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ
(MAX)-TA)/θJA. Exceeding the maximum allowable power
dissipation will cause excessive die temperature, and the
regulator will go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
3) Measured on JESD51-7 4-layer PCB.
MP6211-3/MP6212-3 Rev 1.0
2/18/2011 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
www.MonolithicPower.com
2
MP6211-3/MP6212-3 –CURRENT-LIMITED POWER DISTRIBUTION SWITCH
ELECTRICAL CHARACTERISTICS (4)
VIN=5V, TA=+25°C, unless otherwise noted.
Parameter
Condition
Min
2.7
70
Typ
Max
5.5
120
1
Units
V
IN Voltage Range
Supply Current
Shutdown Current
Off Switch Leakage
Current Limit
Single Channel
90
µA
µA
µA
A
Device Disable, VOUT=float, VIN=5.5V
Device Disable, VIN=5.5V
1
1.1
1.5
1.7
2.2
Current Ramp (slew rate≤100A/s) on
Output
Trip Current
2.4
A
Under-voltage Lockout
Rising Edge
1.95
2.65
V
mV
mΩ
V
Under-voltage Hysteresis
FET On Resistance
250
95
IOUT=100mA (-40°C≤TA≤+85°C)
140
EN Input Logic High Voltage
EN Input Logic Low Voltage
FLAG Output Logic Low Voltage
2
0.8
0.4
V
ISINK=5mA
V
FLAG Output High Leakage
Current
VIN=VFLAG=5.5V
1
µA
Thermal Shutdown
140
°C
Thermal Shutdown Hysteresis
20
0.9
1.7
0.05
0.04
°C
ms
ms
ms
ms
VOUT Rising Time, Tr (5)
VIN=5.5V, CL=1µF, RL=5.5ꢀ
VIN=2.7V, CL=1µF, RL=5.5ꢀ
VIN=5.5V, CL=1µF, RL=5.5ꢀ
VIN=2.7V, CL=1µF, RL=5.5ꢀ
2
3
0.5
0.5
VOUT Falling Time, Tf (6)
Turn On Time, Ton (7)
Turn Off Time, Toff (8)
FLAG Deglitch Time
EN Input Leakage
Reverse Leakage Current
Notes:
CL=100µF, RL=5.5ꢀ
CL=100µF, RL=5.5ꢀ
1.9
1.3
8
3
ms
ms
ms
µA
µA
10
15
4
1
VOUT=5.5V, VIN=0
0.1
1
4) Production test at +25°C. Specifications over the temperature range are guaranteed by design and characterization.
5) Measured from 10% to 90%.
6) Measured from 90% to 10%
7) Measured from (50%) EN signal to (90%) output signal.
8) Measured from (50%) EN signal to (10%) output signal.
MP6211-3/MP6212-3 Rev 1.0
2/18/2011
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
3
MP6211-3/MP6212-3 –CURRENT-LIMITED POWER DISTRIBUTION SWITCH
PIN FUNCTIONS
SOIC8E MSOP8E
Name Description
1
2, 3
4
1
2, 3
4
GND
IN
Ground.
Input Voltage. Accepts 2.7V to 5.5V input.
Enable Input, Active Low: (MP6212-3), Active High: (MP6211-3)
EN
Open-Drain. Flag output stays low after a short output or thermal current limit,
and will not change state when input UVLO is triggered.
5
5
FLAG
OUT
6, 7, 8
6, 7, 8
Power-Distribution Switch Output.
TYPICAL PERFORMANCE CHARACTERISTICS
TA = +25ºC, unless otherwise noted.
OUT
tr
tf
CL
RL
90% 90%
10% 10%
Vout
TEST CIRCUIT
50%
50%
50%
50%
90%
EN
EN
Toff
Toff
Ton
Ton
Ton delay
90%
10%
90%
90%
Ton delay
Vout
Vout
10%
10%
10%
Toff delay
Toff delay
VOLTAGE WAVEFORMS
Figure 1—Test Circuit and Voltage Waveforms
MP6211-3/MP6212-3 Rev 1.0
2/18/2011
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
4
MP6211-3/MP6212-3 –CURRENT-LIMITED POWER DISTRIBUTION SWITCH
TYPICAL PERFORMANCE CHARACTERISTICS
VIN=5.5V, TA =+25ºC, unless otherwise noted.
1.8
1.6
1.4
1.2
1
0.9
2.5
0.8
2
0.7
0.6
1.5
0.5
0.8
1
0.4
2.5
0.6
2.5
2.5
3.5
4.5
5.5
6.5
5.5
1
3
3.5
4
4.5
5
5.5
6
3
3.5
4
4.5
5
5.5
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
60
55
50
45
40
35
30
100
95
90
85
80
75
70
30
25
20
15
10
5
0
-5
-10
-15
-20
-25
-30
2.5
3
3.5
4
4.5
5
2.5
3
3.5
4
4.5
5
5.5
6
-45 -30 -15 0 15 30 45 60 75 90
AMBIENT TEMPERATURE(0C)
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
140
120
100
80
130
120
110
100
90
93
Vin=5.5V
Vin=5V
92
91
90
89
88
87
Vin=4V
Vin=3.3V
Vin=2.7V
60
40
20
0
0
80
2.5
0.2 0.4 0.6 0.8
1
1.2
3
3.5
4
4.5
5
5.5
0
0.2
0.4
0.6
0.8
OUTPUT CURRENT (A)
INPUT VOLTAGE (V)
OUTPUT CURRENT (A)
MP6211-3/MP6212-3 Rev 1.0
2/18/2011
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
5
MP6211-3/MP6212-3 –CURRENT-LIMITED POWER DISTRIBUTION SWITCH
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN=5.5V, TA = +25ºC, unless otherwise noted.
2
50
45
40
35
30
25
20
15
10
5
1.75
1.7
1.9
1.8
1.65
1.6
1.55
1.5
1.7
1.6
1.5
1.45
1.4
0
2.5
3
3.5
4
4.5
5
5.5
6
2.5
3
3.5
4
4.5
5
5.5
6
0
2
4
6
8
10 12
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
PEAK CURRENT (A)
V
V
OUT
OUT
2V/div
2V/div
EN
EN
2V/div
2V/div
1s/div
V
V
OUT
OUT
2V/div
2V/div
EN
EN
2V/div
2V/div
MP6211-3/MP6212-3 Rev 1.0
2/18/2011
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
6
MP6211-3/MP6212-3 –CURRENT-LIMITED POWER DISTRIBUTION SWITCH
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN=5.5V, TA = +25ºC, unless otherwise noted.
Threshold Trip Current with
Ramped Load on Enabled Device
VEN=5V, CL=1uF
Inrush Current with
Different Load Capacitance
Enabled Device
VEN=5V, CL=1uF
1ms/div
4ms/div
2ms/div
Ramped Load on
Enabled Device
VEN=5V, CL=1uF
Short Circuit Current, Device
Enabled into Short
VEN=5V, CL=1uF
IO
500mA/div
2ms/div
2ms/div
MP6211-3/MP6212-3 Rev 1.0
www.MonolithicPower.com
7
2/18/2011
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
MP6211-3/MP6212-3 –CURRENT-LIMITED POWER DISTRIBUTION SWITCH
FUNCTION BLOCK DIAGRAM
Figure 2—Function Block Diagram
MP6211-3/MP6212-3 Rev 1.0
2/18/2011
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
8
MP6211-3/MP6212-3 –CURRENT-LIMITED POWER DISTRIBUTION SWITCH
DETAILED DESCRIPTION
Over Current
When the device recovers from over temperature
protection and enters over current mode, the
FLAG remains low if VOUT is less than 1.4V
(Figure 3). Otherwise FLAG will become low after
8ms deglitch time (Figure 4).
When the load exceeds trip current (minimum
threshold current triggering constant-current
mode) or a short is present, MP6211-3/MP6212-
3 switches into to a constant-current mode
(current limit value). MP6211-3/MP6212-3 will be
shutdown only if the overcurrent condition stays
long enough to trigger thermal protection.
The FLAG will not change state when the input
UVLO is triggered.
Trigger overcurrent protection for different
overload conditions occurring in applications:
Vout
Vout<1.4V
`
1) The output has been shorted or overloaded
before the device is enabled or input applied.
MP6211-3/MP6212-3 detects the short or
overload and immediately switches into a
constant-current mode.
Short circuit current limit
Deglitch
Time
Iout
Flag
2) A short or an overload occurs after the device
is enabled. After the current-limit circuit has
been tripped (reached the trip current
threshold), the device switches into constant-
current mode. However, high current may
flow for a short period of time before the
current-limit circuit can react.
Figure 3—Flag Indication When Short Output
to Ground
Vout
Vout>1.4V
3) Output current has been gradually increased
beyond the recommended operating current.
The load current rises until the trip current
threshold is reached or until the thermal limit
of the device is exceeded. The MP6211-
3/MP6212-3 is capable of delivering current
up to the trip current threshold without
damaging the device. Once the trip threshold
has been reached, the device switches into
its constant-current mode.
Short circuit current limit
Deglitch
Time
Deglitch
Time
Iout
Flag
Figure 4—Flag Indication When Short with 1Ω
Resistor
Thermal Protection
Flag Response
The purpose of thermal protection is to prevent
damage in the IC by allowing exceptive current to
flow and heating the junction. The die temp. is
internally monitored until the thermal limit is
reached. Once this temp. is reached, the switch
will turn off and allow the chip to cool. The switch
has a built-in hysteresis.
The FLAG pin is an open drain configuration.
When over current or over temperature is
encountered, FLAG will report a fail mode (low
level).
For over current, 8ms deglitch time-out is needed.
This is used to ensure that no false fault signal is
reported. This internal deglitch circuit eliminates
the need for components. For over temperature,
the FLAG pin is not deglitched.
Under-voltage Lockout (UVLO)
This circuit is used to monitor the input voltage to
ensure that the MP6211-3/MP6212-3 is operating
correctly. This UVLO circuit also ensures that
there is no operation until the input voltage
reaches the minimum spec.
MP6211-3/MP6212-3 Rev 1.0
2/18/2011 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
www.MonolithicPower.com
9
MP6211-3/MP6212-3 –CURRENT-LIMITED POWER DISTRIBUTION SWITCH
Enable
The logic pin disables the chip to reduce the
supply current. The device will operate once the
enable signal reaches the appropriate level. The
input is compatible with both COMS and TTL.
MP6211-3/MP6212-3 Rev 1.0
2/18/2011 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
www.MonolithicPower.com
10
MP6211-3/MP6212-3 –CURRENT-LIMITED POWER DISTRIBUTION SWITCH
APPLICATION INFORMATION
Power-Supply Considerations
In order to achieve smaller output load transient
ripple, placing a high-value electrolytic capacitor
on the output pin(s) is recommended when the
load is heavy.
Over 10µF capacitor between IN and GND is
recommended. This precaution reduces power-
supply transients that may cause ringing on the
input and improves the immunity of the device to
short-circuit transients.
+5V
1
GND
MP6211-3/
MP6212-3
6, 7,8
To VBUS
USB Ports
2, 3
4
OUT
IN
5
EN*
FLAG
*EN is active high for MP6211-3
SINGLE-CHANNEL
Figure 5—Application Circuit
MP6211-3/MP6212-3 Rev 1.0
2/18/2011
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
11
MP6211-3/MP6212-3 –CURRENT-LIMITED POWER DISTRIBUTION SWITCH
PACKAGE INFORMATION
MSOP8E (EXPOSED PAD)
0.087(2.20)
0.099(2.50)
0.114(2.90)
0.122(3.10)
5
8
0.187(4.75)
0.114(2.90)
0.122(3.10)
0.062(1.58)
0.074(1.88)
0.199(5.05)
PIN 1 ID
(NOTE 5)
Exposed Pad
4
1
0.010(0.25)
0.014(0.35)
0.0256(0.65)BSC
BOTTOM VIEW
TOP VIEW
GAUGE PLANE
0.010(0.25)
0.030(0.75)
0.037(0.95)
0.043(1.10)MAX
0.004(0.10)
0.008(0.20)
SEATING PLANE
0.002(0.05)
0.006(0.15)
0.016(0.40)
0.026(0.65)
0o-6o
FRONT VIEW
SIDE VIEW
NOTE:
0.100(2.54)
1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN BRACKET IS
IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH,
PROTRUSION OR GATE BURR.
0.075(1.90)
0.181(4.60)
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR
PROTRUSION.
4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING)
SHALL BE 0.004" INCHES MAX.
5) PIN 1 IDENTIFICATION HAS HALF OR FULL CIRCLE OPTION.
6) DRAWING MEETS JEDEC MO-187, VARIATION AA-T.
7) DRAWING IS NOT TO SCALE.
0.040(1.00)
0.016(0.40)
0.0256(0.65)BSC
RECOMMENDED LAND PATTERN
MP6211-3/MP6212-3 Rev 1.0
2/18/2011
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
12
MP6211-3/MP6212-3 –CURRENT-LIMITED POWER DISTRIBUTION SWITCH
SOIC8E (EXPOSED PAD)
0.189(4.80)
0.197(5.00)
0.124(3.15)
0.136(3.45)
8
5
0.150(3.80)
0.157(4.00)
0.228(5.80)
0.244(6.20)
0.089(2.26)
0.101(2.56)
PIN 1 ID
1
4
TOP VIEW
BOTTOM VIEW
SEE DETAIL "A"
0.051(1.30)
0.067(1.70)
SEATING PLANE
0.000(0.00)
0.006(0.15)
0.0075(0.19)
0.0098(0.25)
0.013(0.33)
0.020(0.51)
SIDE VIEW
0.050(1.27)
BSC
FRONT VIEW
0.010(0.25)
0.020(0.50)
x 45o
GAUGE PLANE
0.010(0.25) BSC
0.050(1.27)
0.024(0.61)
0.063(1.60)
0.016(0.41)
0.050(1.27)
0o-8o
DETAIL "A"
0.103(2.62)
0.213(5.40)
NOTE:
1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN
BRACKET IS IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS.
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH
OR PROTRUSIONS.
0.138(3.51)
4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING)
SHALL BE 0.004" INCHES MAX.
5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION BA.
6) DRAWING IS NOT TO SCALE.
RECOMMENDED LAND PATTERN
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MP6211-3/MP6212-3 Rev 1.0
2/18/2011
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
13
相关型号：
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MP6212DH-LF
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