MP29373DF-LF [MPS]
Switching Regulator,;
| 型号： | MP29373DF-LF |
| 厂家： | 
MONOLITHIC POWER SYSTEMS |
| 描述： | Switching Regulator, 开关 |
| 文件： | 总10页 (文件大小：248K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MP29373
Dual 1.5A, 23V, 1.4MHz
Step-Down Converter
The Future of Analog IC Technology
DESCRIPTION
FEATURES
The MP29373 is a dual monolithic step-down
switch mode converter with built-in internal
power MOSFETs. It achieves 1.5A continuous
output current for each output over a wide input
supply range with excellent load and line
regulation.
•
•
•
1.5A Current for Each Output
0.18Ω Internal Power MOSFET Switches
Stable with Low ESR Output Ceramic
Capacitors
Up to 90% Efficiency
40μA Shutdown Mode
•
•
•
•
•
•
•
•
Fixed 1.4MHz Frequency
Thermal Shutdown
Current mode operation provides fast transient
response and eases loop stabilization.
Cycle-by-Cycle Over Current Protection
Wide 4.75V to 23V Operating Input Range
Each Output Adjustable from 0.92V to 16V
Configurable for Single Output with Double
the Current
Programmable Under Voltage Lockout
Programmable Soft-Start
Available in a TSSOP20 Package with
Exposed Pad
Fault condition protection includes cycle-by-cycle
current limiting and thermal shutdown. In
shutdown mode, the regulator draws 40μA of
supply current.
The MP29373 requires a minimum number of
readily available standard external components.
•
•
•
APPLICATIONS
•
•
•
•
•
Distributed Power Systems
I/O and Core supplies
DSL Modems
Set top boxes
Cable Modems
“MPS” and “The Future of Analog IC Technology” are Registered Trademarks of
Monolithic Power Systems, Inc.
TYPICAL APPLICATION
12V
Efficiency vs
Load Current
3.3V @ 1.5A
20
19
18
17
16
15
14
13
12
11
1
2
100
SSA
NC1
ENA
COMPA
FBA
OFF ON
3
82pF
V
=3.3V
OUT
2.2nF
V
=5V
OUT
BSA
INA
90
80
70
60
50
4
SGB
10nF
2A
Schottky
5
SWA
PGA
SGA
FBB
COMPB
ENB
PGB
MP29373
2A
Schottky
6
2.5V @ 1.5A
SWB
INB
7
V
=2.5V
OUT
10nF
8
NC2
BSB
SSB
9
10
OFF ON
3.3nF
0
0.5
1.0
1.5
LOAD CURRENT (A)
MP29373 Rev. 1.1
12/13/2007
www.MonolithicPower.com
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© 2007 MPS. All Rights Reserved.
1
MP29373 — DUAL 1.5A, 23V, 1.4MHz STEP-DOWN CONVERTER
PACKAGE REFERENCE
ABSOLUTE MAXIMUM RATINGS (1)
Supply Voltage (INA, INB )................................ 25V
Switch Voltage (SWA, SWB).............................. 26V
Bootstrap Voltage (BSA, BSB) .................. VSW + 6V
Feedback Voltage (FBA, FBB)............–0.3V to +6V
Enable/UVLO Voltage (ENA, ENB) .....–0.3V to +6V
Comp Voltage (COMPA, COMPB) ..........–0.3V to +6V
Soft Start Voltage (SSA, SSB).............–0.3V to +6V
Junction Temperature.............................+150°C
Lead Temperature..................................+260°C
Storage Temperature ..............–65°C to +150°C
TOP VIEW
SSA
NC1
1
2
3
4
5
6
7
8
9
20 ENA
19 COMPA
18 FBA
17 SGB
16 PGB
15 SWB
14 INB
BSA
INA
SWA
PGA
Recommended Operating Conditions (2)
Supply Voltage (VIN) ...................... 4.75V to 23V
Operating Temperature.................–40°C to +85°C
SGA
FBB
13 NC2
12 BSB
11 SSB
COMPB
Thermal Resistance (3)
θJA
θJC
ENB 10
TSSOP20F .............................40....... 6.... °C/W
EXPOSED PAD
FOR TSSOP20F ONLY
Notes:
1) Exceeding these ratings may damage the device.
2) The device is not guaranteed to function outside of its
operating conditions.
Part Number*
Package
TSSOP20F
Temperature
3) Measured on approximately 1” square of 1 oz copper.
MP29373DF
–40°C to +85°C
For Tape & Reel, add suffix –Z (eg. MP29373DF–Z)
For RoHS Compliant Packaging, add suffix –LF
(eg. MP29373DF–LF–Z)
*
MP29373 Rev. 1.1
12/13/2007
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© 2007 MPS. All Rights Reserved.
2
MP29373 — DUAL 1.5A, 23V, 1.4MHz STEP-DOWN CONVERTER
ELECTRICAL CHARACTERISTICS
VIN = 12V, TA = +25°C, unless otherwise noted.
Parameter
Symbol Condition
Min
Typ
0.920
0.18
10
Max
Units
V
Feedback Voltage
VFB
0.892
0.948
4.75V ≤ VIN ≤ 23V
Upper Switch-On Resistance RDS(ON)1
Lower Switch-On Resistance RDS(ON)2
Upper Switch Leakage
Ω
Ω
VEN = 0V, VSW = 0V
10
µA
A
Current Limit (4)
2.5
3.0
Current Limit Gain
Output Current to Comp Pin
Voltage
GCS
1.95
A/V
Error Amplifier Voltage Gain
AVEA
GEA
400
930
V/V
Error Amplifier
Transconductance
630
1230
μA/V
ΔIC = ±10 μA
Oscillator Frequency
fOSC
fSC
1.4
MHz
KHz
Short Circuit Frequency
VFB = 0V
210
Soft-Start Pin Equivalent
Output Resistance
9
kΩ
EN Shutdown Threshold
Voltage
VEN
IEN
ICC > 100μA
0.7
1.0
1.3
V
Enable Pull-Up Current
1.0
μA
EN UVLO Threshold Rising
VUVLO VEN Rising
2.37
2.50
2.62
V
EN UVLO Threshold
Hysteresis
210
mV
Supply Current (Shutdown)
Supply Current (Quiescent)
Thermal Shutdown
Maximum Duty Cycle
Minimum On Time
Note:
IOFF
ION
40
2.4
160
70
70
μA
mA
°C
%
VEN ≤ 0.4V
VEN ≥ 3V
2.8
DMAX
VFB = 0.8V
tON
100
ns
4) Equivalent output current = 1.5A ≥ 50% Duty Cycle
2.0A ≤ 50% Duty Cycle
Assumes ripple current = 30% of load current.
Slope compensation changes current limit above 40% duty cycle.
MP29373 Rev. 1.1
12/13/2007
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3
MP29373 — DUAL 1.5A, 23V, 1.4MHz STEP-DOWN CONVERTER
PIN FUNCTIONS (TSSOP20F)
Pin #
Name Description
Soft-Start Control for Channel A. 9kꢀ output resistance from the pin. Set RC time constant
with external capacitor for soft start ramp time. Ramp Time = 2.2 x 9kꢀ x C.
1
SSA
2
3
NC
No Connect
BSA
High-Side Driver Boost Pin. Connect a 10nF capacitor from this pin to SWA.
Supply Voltage Channel A. The MP29373 operates from a +4.75V to +23V unregulated input.
Input Ceramic Capacitors should be close to this pin.
4
5
6
INA
SWA
PGA
Switch Channel A. This connects the inductor to either INA through M1A or to PGA through M2A.
Power Ground Channel A. This is the Power Ground Connection to the input capacitor
ground.
Signal Ground Channel A. This pin is the signal ground reference for the regulated output
voltage. For this reason care must be taken in its layout. This node should be placed outside
of the D1 to C1 ground path to prevent switching current spikes from inducing voltage noise
into the part.
7
SGA
FBB
Feedback Voltage for Channel B. This pin is the feedback voltage. The output voltage is ratio scaled
through a voltage divider, and the center point of the divider is connected to this pin. The voltage is
compared to the on board 0.92V reference.
8
9
Compensation Channel B. This is the output of the transconductance error amplifier. A series
COMPB RC is placed on this pin for proper control loop compensation. Please refer to more in the
datasheet.
Enable/UVLO Channel B. A voltage greater than 2.62V enables operation. Leave ENB
unconnected for automatic startup. An Under Voltage Lockout (UVLO) function can be
implemented by the addition of a resistor divider from VIN to GND. For complete low current
shutdown the ENB pin voltage needs to be less than 700mV.
10
11
ENB
Soft-Start Control for Channel B. 9kꢀ output resistance from the pin. Set RC time constant
with external capacitor for soft start ramp time. Ramp Time = 2.2x9kꢀxC.
SSB
12
13
BSB
NC
High-Side Driver Boost Pin. Connect a 10nF capacitor from this pin to SWB.
No Connect.
Supply Voltage Channel B. The MP29373 operates from a +4.75V to +23V unregulated input.
Input Ceramic Capacitors should be close to this pin.
14
15
16
INB
SWB
PGB
Switch Channel B. This connects the inductor to either INB through M1B or to PGB through M2B.
Power Ground Channel B. This is the Power Ground Connection to the input capacitor
ground.
Signal Ground Channel B. This pin is the signal ground reference for the regulated output
voltage. For this reason care must be taken in its layout. This node should be placed outside
of the D1 to C1 ground path to prevent switching current spikes from inducing voltage noise
into the part.
17
SGB
FBA
Feedback Voltage for Channel A. This pin is the feedback voltage. The output voltage is ratio scaled
through a voltage divider, and the center point of the divider is connected to this pin. The voltage is
compared to the on board 0.92V reference.
18
19
Compensation Channel A. This is the output of the transconductance error amplifier. A series
COMPA RC is placed on this pin for proper control loop compensation. Please refer to more in the
datasheet.
Enable/UVLO Channel A. A voltage greater than 2.62V enables operation. Leave ENA
unconnected for automatic startup. An Under Voltage Lockout (UVLO) function can be
implemented by the addition of a resistor divider from VIN to GND. For complete low current
20
ENA
shutdown the ENA pin voltage needs to be less than 700mV.
MP29373 Rev. 1.1
12/13/2007
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4
MP29373 — DUAL 1.5A, 23V, 1.4MHz STEP-DOWN CONVERTER
OPERATION
The MP29373 is a dual channel current mode
regulator. The COMP pin voltage is proportional
to the peak inductor current. At the beginning of
a cycle, the upper transistor M1 is off, and the
lower transistor M2 is on (see Figure 1). The
COMP pin voltage is higher than the current
sense amplifier output, and the current
comparator’s output is low. The rising edge of
the 1.4MHz CLK signal sets the RS Flip-Flop.
Its output turns off M2 and turns on M1 thus
connecting the SW pin and inductor to the input
supply. The increasing inductor current is
sensed and amplified by the Current Sense
Amplifier. Ramp compensation is summed to
Current Sense Amplifier output and compared
to the Error Amplifier output by the Current
Comparator.
If the sum of the Current Sense Amplifier output
and the Slope Compensation signal does not
exceed the COMP voltage, the falling edge of
the CLK resets the Flip-Flop.
The output of the Error Amplifier integrates the
voltage difference between the feedback and
the 0.92V bandgap reference. The polarity is
such that a voltage at the FB pin lower than
0.92V increases the COMP pin voltage. Since
the COMP pin voltage is proportional to the
peak inductor current, an increase in its voltage
increases current delivered to the output. The
lower 10ꢀ switch ensures that the bootstrap
capacitor voltage is charged during light load
conditions. External Schottky Diode D1 carries
the inductor current when M1 is off (see Figure 1).
When the sum of the Current Sense Amplifier
output and the Slope Compensation signal
exceeds the COMP pin voltage, the RS Flip-
Flop is reset. The MP29373 reverts to its initial
M1 off, M2 on state.
INA/
INB
CURRENT
SENSE
AMPLIFIER
INTERNAL
REGULATORS
+
--
5V
OSCILLATOR
SLOPE
COMP
BSA/
BSB
210/1400KHz
CLK
+
--
+
S
R
Q
Q
SWA/
SWB
CURRENT
COMPARATOR
SHUTDOWN
COMPARATOR
--
0.7V
ENA/
ENB
LOCKOUT
COMPARATOR
+
--
+
1.8V
COMPA/
COMPB
2.29V/
2.50V
PGA/
PGB
--
+
0.92V
ERROR
AMPLIFIER
0.4V
--
FREQUENCY
FOLDBACK
COMPARATOR
SGA/
SGB
SSA/
SSB
FBA / FBB
Figure 1—Functional Block Diagram
(Diagram portrays ½ of the MP29373)
MP29373 Rev. 1.1
12/13/2007
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5
MP29373 — DUAL 1.5A, 23V, 1.4MHz STEP-DOWN CONVERTER
switch current limit. The inductance value can
be calculated by:
APPLICATION INFORMATION
COMPONENT SELECTION
⎛
⎜
⎝
⎞
⎟
⎟
⎠
VOUT
VOUT
The MP29373 has two channels: A and B. The
following formulas are used for component
selection of both channels. Refer to
components with reference “A” for channel A,
and components with reference “B” for channel
B, respectively, as indicated in Figure 3 (i.e. –
R1A for Channel A and R1B for Channel B).
⎜
L1=
× 1−
fS × ΔIL
V
IN
Where VIN is the input voltage, fS is the
switching frequency, and ΔIL is the peak-to-
peak inductor ripple current.
Choose an inductor that will not saturate under
the maximum inductor peak current.
Setting the Output Voltage
The peak inductor current can be calculated by:
The output voltage is set using a resistive
voltage divider from the output voltage to FB pin.
The voltage divider divides the output voltage
down to the feedback voltage by the ratio:
⎛
⎜
⎝
⎞
⎟
⎟
⎠
VOUT
VOUT
⎜
ILP = ILOAD
+
× 1−
2 × fS × L1
V
IN
Where ILOAD is the load current.
R2
VFB = VOUT
Output Rectifier Diode
R1+ R2
The output rectifier diode supplies the current to
the inductor when the high-side switch is off. To
reduce losses due to the diode forward voltage
and recovery times, use a Schottky diode.
Thus the output voltage is:
R1+ R2
VOUT = 0.92V ×
R2
Choose a diode whose maximum reverse
voltage rating is greater than the maximum
input voltage, and whose current rating is
greater than the maximum load current.
Where VFB is the feedback voltage and VOUT is
the output voltage
A typical value for R2 can be as high as 100kꢀ,
but a typical value is 10kꢀ. Using that value, R1
is determined by:
Input Capacitor
The input current to the step-down converter is
discontinuous, therefore a capacitor is required
to supply the AC current to the step-down
converter while maintaining the DC input
voltage. Use low ESR capacitors for the best
performance. Ceramic capacitors are preferred,
but tantalum or low-ESR electrolytic capacitors
may also suffice.
VOUT
R1 = R2× (
− 1)
0.92V
For example, for a 3.3V output voltage, R2 is
10kꢀ, and R1 is 25.9kꢀ.
Inductor
The inductor is required to supply constant
current to the output load while being driven by
the switched input voltage. A larger value
inductor will result in less ripple current that will
result in lower output ripple voltage. However,
the larger value inductor will have a larger
physical size, higher series resistance, and/or
lower saturation current. A good rule for
determining the inductance to use is to allow
the peak-to-peak ripple current in the inductor
to be approximately 30% of the maximum
switch current limit. Also, make sure that the
peak inductor current is below the maximum
Since the input capacitor (C1) absorbs the input
switching current it requires an adequate ripple
current rating. The RMS current in the input
capacitor can be estimated by:
⎛
⎞
⎟
VOUT
VIN
VOUT
VIN
⎜
IC1 = ILOAD
×
× 1−
⎜
⎝
⎟
⎠
The worst-case condition occurs at VIN = 2VOUT
,
where:
ILOAD
IC1
=
2
MP29373 Rev. 1.1
12/13/2007
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6
MP29373 — DUAL 1.5A, 23V, 1.4MHz STEP-DOWN CONVERTER
For simplification, choose the input capacitor
whose RMS current rating greater than half of
the maximum load current.
MP29373 can be optimized for a wide range of
capacitance and ESR values.
Compensation Components
The input capacitor can be electrolytic, tantalum
or ceramic. When using electrolytic or tantalum
capacitors, a small, high quality ceramic
capacitor, i.e. 0.1μF, should be placed as close
to the IC as possible.
The MP29373 employs current mode control on
each channel for easy compensation and fast
transient response. The system stability and
transient response are controlled through the
COMP pin. COMP pin is the output of the
internal transconductance error amplifier. A
series capacitor-resistor combination sets a
When using ceramic capacitors, make sure that
they have enough capacitance to provide
sufficient charge prevent excessive voltage
ripple at input. The input voltage ripple caused
by capacitance can be estimated by:
pole-zero
combination
to
control
the
characteristics of the control system.
The DC gain of the voltage feedback loop is
given by:
⎛
⎜
⎝
⎞
⎟
⎟
⎠
ILOAD
VOUT
VIN
VOUT
⎜
ΔV
=
×
× 1−
IN
VFB
fS × C1
V
IN
AVDC = RLOAD × GCS × AVEA
×
VOUT
Output Capacitor
Where AVEA is the error amplifier voltage gain,
GCS is the current sense transconductance and
The output capacitor is required to maintain the
DC output voltage. Ceramic, tantalum, or low
ESR electrolytic capacitors are recommended.
Low ESR capacitors are preferred to keep the
output voltage ripple low. The output voltage
ripple can be estimated by:
RLOAD is the load resistor value.
The system has two poles of importance. One
is due to the compensation capacitor (C3) and
the output resistor of error amplifier, and the
other is due to the output capacitor and the load
resistor. These poles are located at:
⎛
⎜
⎝
⎞
⎟
⎟
⎛
⎜
⎝
⎞
⎟
⎟
⎠
VOUT
VOUT
VIN
1
⎜
⎜
ΔVOUT
=
× 1−
× RESR
+
fS × L1
8 × fS × C2
⎠
GEA
fP1
=
=
Where L1 is the inductor value, C2 is the output
capacitance value, and RESR is the equivalent
series resistance (ESR) value of the output
capacitor.
2π × C3 × AVEA
1
fP2
2π × C2× RLOAD
In the case of ceramic capacitors, the
impedance at the switching frequency is
dominated by the capacitance. The output
voltage ripple is mainly caused by the
capacitance. For simplification, the output
voltage ripple can be estimated by:
Where
transconductance.
GEA
is
the
error
amplifier
The system has one zero of importance, due to
the compensation capacitor (C3) and the
compensation resistor (R3). This zero is located
at:
⎛
⎞
⎟
⎟
⎠
VOUT
8 × fS2 × L1× C2
VOUT
⎜
ΔVOUT
=
× 1−
1
⎜
⎝
V
IN
fZ1 =
2π × C3 × R3
In the case of tantalum or electrolytic capacitors,
the ESR dominates the impedance at the
switching frequency. For simplification, the
output ripple can be approximated to:
The system may have another zero of
importance, if the output capacitor has a large
capacitance and/or a high ESR value. The zero,
due to the ESR and capacitance of the output
VOUT
VOUT
VIN
⎛
⎞
⎟
capacitor,
is
located
at:
ΔVOUT
=
× 1−
× R
ESR
⎜
fS × L1
⎝
⎠
The characteristics of the output capacitor also
affect the stability of the regulation system. The
MP29373 Rev. 1.1
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MP29373 — DUAL 1.5A, 23V, 1.4MHz STEP-DOWN CONVERTER
3. Determine if the second compensation
capacitor (C6) is required. It is required if the
ESR zero of the output capacitor is located at
less than half of the switching frequency, or the
following relationship is valid:
1
fESR
=
2π × C2× RESR
In this case (as shown in Figure 2), a third pole
set by the compensation capacitor (C6) and the
compensation resistor (R3) is used to
compensate the effect of the ESR zero on the
loop gain. This pole is located at:
fS
2
1
<
2π × C2× RESR
If this is the case, then add the second
compensation capacitor (C6) to set the pole fP3
at the location of the ESR zero. Determine the
C6 value by the equation:
1
fP3
=
2π × C6 × R3
The goal of compensation design is to shape
the converter transfer function to get a desired
loop gain. The system crossover frequency
where the feedback loop has the unity gain is
important.
C2 × RESR
C6 =
R3
Soft-Start
Lower crossover frequencies result in slower
line and load transient responses, while higher
crossover frequencies could cause system
unstable. A good rule of thumb is to set the
crossover frequency to below one-tenth of the
Each channel is soft-start controlled with the
SSA and SSB pins. Use capacitors to control
the ramp time using the equation:
RampTime = 2.2× 9kΩ × C4
switching
frequency.
To
optimize
the
External Bootstrap Diode
compensation components for conditions not
listed in Table 2, the following procedure can be
used:
It is recommended that an external bootstrap
diode be added when the system has a 5V
fixed input or the power supply generates a 5V
output. This helps improve the efficiency of the
regulator. The bootstrap diode can be a low
cost one such as IN4148 or BAT54.
1. Choose the compensation resistor (R3) to set
the desired crossover frequency. Determine the
R3 value by the following equation:
5V
2π × C2× fC VOUT
R3 =
×
GEA × GCS
VFB
BSA/B
Where fC is the desired crossover frequency,
which is typically less than one tenth of the
switching frequency.
10nF
MP29373
SWA/B
2. Choose the compensation capacitor (C3) to
achieve the desired phase margin. For
applications with typical inductor values, setting
the compensation zero, fZ1, to below one forth
of the crossover frequency provides sufficient
phase margin. Determine the C3 value by the
following equation:
Figure 2—External Bootstrap Diode
This diode is also recommended for high duty
VOUT
cycle operation (when
>65%) and high
VIN
output voltage (VOUT>12V) applications.
4
C3 >
2π × R3 × fC
Where R3 is the compensation resistor value.
MP29373 Rev. 1.1
12/13/2007
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MP29373 — DUAL 1.5A, 23V, 1.4MHz STEP-DOWN CONVERTER
TYPICAL APPLICATION CIRCUITS
12V
3.3V @ 1.5A
1
2
20
19
18
17
16
15
14
13
12
11
OFF ON
SSA
NC1
ENA
COMPA
FBA
C6A
3
C3A
2.2nF
BSA
INA
82pF
4
C5A
10nF
SGB
5
D1B
B230A
SWA
PGA
SGA
FBB
COMPB
ENB
PGB
MP29373
6
D1A
B230A
2.5V @ 1.5A
SWB
INB
7
C5B
10nF
8
NC2
BSB
SSB
9
10
OFF ON
C3B
3.3nF
Figure 3—2.5V @ 1.5A and 3.3V @ 1.5A Application Circuit
MP29373 Rev. 1.1
12/13/2007
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MP29373 — DUAL 1.5A, 23V, 1.4MHz STEP-DOWN CONVERTER
PACKAGE INFORMATION
TSSOP20F
4.40
TYP
0.40
TYP
0.65
BSC
6.40
6.60
20
11
1.60
TYP
3.20
TYP
4.30
4.50
6.20
6.60
5.80
TYP
PIN 1 ID
1
10
TOP VIEW
RECOMMENDED LAND PATTERN
0.80
1.05
1.20 MAX
0.09
0.20
SEATING PLANE
0.00
0.15
0.19
0.30
0.65 BSC
SEE DETAIL "A"
SIDE VIEW
FRONT VIEW
GAUGE PLANE
0.25 BSC
3.80
4.30
0.45
0.75
0o-8o
DETAIL A
2.60
3.10
NOTE:
1) ALL DIMENSIONS ARE IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH,
PROTRUSION OR GATE BURR.
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH
OR PROTRUSION.
4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING)
SHALL BE 0.10 MILLIMETERS MAX.
5) DRAWING CONFORMS TO JEDEC MO-153, VARIATION ACT.
6) DRAWING IS NOT TO SCALE.
BOTTOM VIEW
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MP29373 Rev. 1.1
12/13/2007
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2007 MPS. All Rights Reserved.
10
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