MP2316GD-P [MPS]
IC REG BUCK ADJ 3A SYNC;
| 型号： | MP2316GD-P |
| 厂家： | 
MONOLITHIC POWER SYSTEMS |
| 描述： | IC REG BUCK ADJ 3A SYNC |
| 文件： | 总25页 (文件大小：1812K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MP2316
19V, 3A, 40µA IQ, High-Efficiency
Constant On-Time (COT) Step-Down
Converter in 2x3mm QFN Package
The Future of Analog IC Technology
DESCRIPTION
FEATURES
The MP2316 is a fully-integrated, high efficiency,
synchronous, step-down switch-mode converter,
featuring only 40μA quiescent current. This very
compact device achieves 3A continuous output
current over a wide input supply range with
excellent load and line regulation, and can
operate with high efficiency over a wide output
current load range. It’s optimized for battery-
operated applications and applications requiring
high light load efficiency.
4V to 19V Operating Input Range
3A Output Current
40μA Quiescent Current
Output Adjustable from 0.6V
90mΩ/30mΩ High Side/Low Side RDS(ON) for
Internal Power MOSFETs
Power Good Indicator
Programmable Soft-Start Time
Forced PWM or Auto PFM/PWM Mode
Selectable
With Constant On-Time control, the MP2316
provides very fast transient response, easy loop
design as well as very tight output regulation.
Programmable Switching Frequency
Thermal Shutdown
Short Circuit Protection: Hiccup Mode
Available in QFN14 (2mmx3mm) Package
Full protection features include SCP, OCP, UVP,
and thermal shutdown.
APPLICATIONS
The MP2316 requires a minimal number of
readily available standard external components
with a space saving 2mmx3mm 14-pin QFN
package.
Tablet PCs
Solid State Drives
Gaming
Battery-operated Applications
All MPS parts are lead-free, halogen free, and adhere to the RoHS directive. For
MPS green status, please visit MPS website under Quality Assurance.
“MPS” and “The Future of Analog IC Technology” are Registered Trademarks
of Monolithic Power Systems, Inc.
TYPICAL APPLICATION
MP2316 Rev. 1.3
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MP2316 – 19V, 3A LOW IQ STEP DOWN CONVERTER
ORDERING INFORMATION
Part Number*
Package
Top Marking
MP2316GD
QFN-14 (2mmx3mm)
See Below
* For Tape & Reel, add suffix –Z (e.g. MP2316GD–Z);
TOP MARKING
AFJ: product code of MP2316GD;
Y: year code;
LLL: lot number;
PACKAGE REFERENCE
TOP VIEW
QFN-14 (2mmx3mm)
MP2316 Rev. 1.3
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MP2316 – 19V, 3A LOW IQ STEP DOWN CONVERTER
ABSOLUTE MAXIMUM RATINGS (1)
VIN................................................................+21V
Thermal Resistance (6)
QFN-14 (2mmx3mm)…………70……15…°C/W
θJA
θJC
V
FREQ/MODE....................................................+21V
Notes:
VSW ..–0.3V (-5V<10ns) to VIN+0.3V (23V<10ns)
1) Exceeding these ratings may damage the device
2) About the details of EN pin’s ABS MAX rating, please refer to
Enable control section.
3) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-to-
ambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ
V
BST..........................................................VSW+6V
All Other Pins.............................. –0.3V to +6V(2)
(3)
Continuous Power Dissipation
QFN-14 (2mmx3mm)..................................1.8W
Junction Temperature............................. +150oC
Lead Temperature .................................. +260oC
Storage Temperature................-65oC to +150oC
(MAX)-TA)/θJA
. Exceeding the maximum allowable power
dissipation will cause excessive die temperature, and the
regulator will go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
Recommended Operating Conditions (4)
Supply Voltage VIN .............................. 4V to 19V
Output Voltage VOUT..............0.6V to VIN*DMAX
Operating Junction Temp. ........-40°C to +125°C
4) The device is not guaranteed to function outside of its
operating conditions.
5) About the Dmax, See “Application When Input Voltage is
Closed to Output Voltage” for more information.
6) Measured on JESD51-7, 4-layer PCB.
(5)
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MP2316 – 19V, 3A LOW IQ STEP DOWN CONVERTER
ELECTRICAL CHARACTERISTICS
VIN = 12V, TJ=-40°C to +125°C (7), typical value is tested at TJ=+25°C, unless otherwise noted.
Parameters
Symbol Condition
Min
Typ
Max
Units
Supply current (shutdown)
IIN
VEN = 0V
0.1
1
μA
V
EN = 5V, TJ = 25°C,
Supply current (quiescent)
IQ
40
3.7
200
55
μA
V
VFB = 0.9V
VIN under-voltage lockout
threshold rising
INUVVth
3.5
3.9
VIN under-voltage lockout
threshold hysteresis
INUVHYS
mV
HS switch-on resistance
LS switch-on resistance
Switch leakage
HSRDS-ON
LSRDS-ON
SWLKG
90
30
0
mꢀ
mꢀ
μA
VEN = 0V, VSW = 0V or 12V
Duty=10%
1
High Side FET Current limit (8)
Low Side FET Current limit
One-Shot on time(8)
ILIMIT_HS
ILIMIT_LS
TON
5
A
A
Force PWM Mode, Sink
Current
1.5
RFREQ=180k from
230
90
ns
FREQ/MODE Pin to VIN
Minimum on time(8)
Minimum off time
TON_min
ns
ns
TOFF_min
150
600
600
10
TJ = 25°C
594
591
606
609
50
Feedback voltage
VFB
mV
TJ=-40°C to +125°C
VFB = 700mV
Feedback current
IFB
ISS
nA
μA
V
Soft start current
4
8
11
EN Input High Voltage
EN Input Low Voltage
VEN_H
VEN_L
1.6
0.4
V
VEN = 2V
VEN = 0V
2
0
μA
EN input current
IEN
Power-good rising threshold
Power-good falling threshold
Power-good delay
PGVth-Hi
PGVth-Lo
PGTd
0.9
0.85
140
VFB
VFB
μs
Power-good sink current
capability
VPG
Sink 1mA
0.4
50
V
Power-good leakage current
Thermal shutdown (8)
IPG_LEAK
TSD
VPG = 3.3V
nA
°C
150
20
Thermal shutdown hysteresis (8)
TSD-HYS
°C
Notes:
7) Not tested in production. Guaranteed by over-temperature correlation.
8) Guaranteed by design and engineering sample characterization.
.
MP2316 Rev. 1.3
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MP2316 – 19V, 3A LOW IQ STEP DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTORISTICS
VIN=12V, VOUT=1.2V, L=2.2μH, TA=25oC, unless otherwise noted.
MP2316 Rev. 1.3
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MP2316 – 19V, 3A LOW IQ STEP DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTORISTICS (continued)
VIN=12V, VOUT=1.2V, L=2.2μH, TA=25oC, unless otherwise noted.
MP2316 Rev. 1.3
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MP2316 – 19V, 3A LOW IQ STEP DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTORISTICS (continued)
VIN=12V, VOUT=1.2V, L=2.2μH, TA=25oC, unless otherwise noted.
MP2316 Rev. 1.3
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MP2316 – 19V, 3A LOW IQ STEP DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTORISTICS (continued)
VIN=12V, VOUT=1.2V, L=2.2μH, TA=25oC, unless otherwise noted.
MP2316 Rev. 1.3
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MP2316 – 19V, 3A LOW IQ STEP DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTORISTICS (continued)
VIN=12V, VOUT=1.2V, L=2.2μH, TA=25oC, unless otherwise noted.
MP2316 Rev. 1.3
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MP2316 – 19V, 3A LOW IQ STEP DOWN CONVERTER
PIN FUNCTIONS
Package
Pin #
Name
Description
System Ground. These pins are the reference ground for the regulated output voltage,
and require special consideration during PCB layout.
1,12
2, 13
3, 14
GND
SW
Switch output. Connect using wide PCB traces.
Supply Voltage. The MP2316 operates from a +4V to +19V input rail. C1 is needed to
decouple the input rail. Use wide PCB traces and multiple vias to make the connection.
VIN
Frequency set during CCM operation. Connect a resistor to VIN to set the switching
4
FREQ/MODE frequency and part works at forced PWM mode. Connect a resistor to GND to set the
switching frequency and part works at auto PFM/PWM mode. Don’t float this pin.
Power-Good Output. The output of this pin is an open drain that goes high if the output
voltage is higher than 90% of the nominal voltage. There is a 40µs delay between when
FB ≥ 90% and when the PG pin goes high.
5
PG
Note: If PG is pulled up to an external voltage, PG will not de-assert (Logic low) if EN is
low or if input power is off. It is recommended that PG is pulled up to VCC pin and in
this case PG will de-assert (Logic low) when EN is Low or if input power is off. Refer to
Applications section for additional details.
Soft start. Connect a capacitor across SS and GND to set the soft-start time to avoid
start up inrush current.
6
7
SS
FB
Feedback. Sets the output voltage when connected to the tap of an external resistor
divider that is connected between output and GND.
Internal Ramp Adjust. Connect a capacitor from VOUT to this pin to adjust the internal
ramp amplitude. This can be used to improve the transient performance.
8
CR
EN = 1 to enable the MP2316. For automatic start-up, connect EN pin to VIN with a
pull-up resistor.
9
EN
Bootstrap requires a capacitor connected between SW and BST pins to form a floating
supply across the high-side switch driver.
10
11
BST
VCC
Internal Bias Supply. Internal 5V LDO output. Decouple with a 1µF ceramic capacitor as
close to the pin as possible.
MP2316 Rev. 1.3
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MP2316 – 19V, 3A LOW IQ STEP DOWN CONVERTER
FUNCTIONAL BLOCK DIAGRAM
Figure 1—Functional Block Diagram
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MP2316 – 19V, 3A LOW IQ STEP DOWN CONVERTER
OPERATION
work at forced PWM mode. Connect a resistor
(R7) from FREQ/MODE pin to GND can set the
PWM Operation
The MP2316 is a fully-integrated, synchronous,
rectified, step-down switch converter. The device
uses constant-on-time (COT) control to provide
fast transient response and easy loop
compensation. Figure 2 shows the simplified
ramp compensation block in MP2316, at the
beginning of each cycle, the high-side MOSFET
(HS-FET) turns ON whenever the ramp voltage
(VRamp) is lower than the error amplifier output
voltage (VEAO)—which indicates insufficient
output voltage. The input voltage and the
frequency-set resistor determine the high-side
MOSFET turn-on timer (TON).
switching frequency and meanwhile the part
works at auto PFM/PWM mode.
Figure 3—Mode Selection
Switching Frequency
After the ON period elapses, the HS-FET enters
the OFF state. By cycling HS-FET between the
ON and OFF states, the converter regulates the
output voltage. The integrated low-side MOSFET
(LS-FET) turns on when the HS-FET is in its OFF
state to minimize the conduction loss.
MP2316 uses constant-on-time (COT) control
and there is no dedicated oscillator in the IC. The
input voltage is feed-forwarded to the on-time
one-shot timer through the frequency resistor, the
duty ratio is kept as VOUT/VIN, and the switching
frequency is fairly constant over the input voltage
range. The approximate typical switching
frequency can be determined with the following
equation:
Shoot-through occurs when there is both HS-FET
and LS-FET are turned on at the same time,
causing a dead short between input and GND.
Shoot-through dramatically reduces efficiency,
and the MP2316 avoids this by internally
generating a dead-time (DT) between HS-FET is
off and LS-FET is on, LS-FET is off and HS-FET
is on. The device enters either heavy-load
operation or light-load operation depending on
the output current.
106
(1)
FSW (KHz)
V (V)
IN
Ton(ns)
VOUT (V)
TON will be slightly different at Forced PWM mode
and Auto PFM/PWM mode. The approximate
typical Ton formula is shown below:
Forced PWM mode:
14.5RFREQ(k)
(2)
TON_PWM
TDELAY _PWM(ns)
V (V) 0.4
IN
Auto PFM/PWM mode,
13RFREQ(k)
TON_PFM
TDELAY _PFM(ns) (3)
V (V) 0.4
IN
Where TDELAY_PWM and TDELAY_PFM are the
comparator delay, and the typical value equals
approximately 15ns and 10ns respectively
Figure 2—Simplified Ramp Compensation
Block
When part enters CCM mode, the duty ratio will
change slightly from light load to full load due to
power loss. So the frequency will change a little
from light load to full load even in CCM mode.
Because of the minimum on time and minimum
off time, switching frequency is limited. The
MODE Selection
As shown in Figure 3, connecting a resistor (R6)
from FREQ/MODE pin to VIN can set the
switching frequency and meanwhile, the part will
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MP2316 – 19V, 3A LOW IQ STEP DOWN CONVERTER
maximum frequency can be calculated by the
following equations, choose the lower value of
them as the maximum frequency:
improves device efficiency when the output
current is low.
106
FSW-max (KHz)
(4)
V (V)
IN
T
on-min(ns)
VOUT (V)
6
(V (V)-V (V))10
IN
OUT
FSW-max (KHz)
(5)
T
off-min(ns)V (V)
IN
Where Ton-min typical value is 90ns and Toff-
min typical value is 150ns.For example, VIN=12V,
Vout=1.2V, the maximum frequency we can set
is about 1.1MHz. MP2316 is optimized to operate
at high switching frequency with high efficiency.
High switching frequency makes it possible to
use small-sized LC filter components to save
system PCB space.
Figure 5—Light Load Operation
Light-load operation is also called skip mode
because the HS-FET does not turn on as
frequently as during heavy-load conditions. The
frequency at which the HS-FET turns on is a
function of the output current—as the output
current increases, the time period that the current
modulator regulates becomes shorter, and the
HS-FET turns on more frequently. The switching
frequency increases in turn. The output current
reaches the critical level when the current
modulator time is zero, and can be determined
using the following equation:
Forced PWM Operation
TON is constant
VIN
VSW
IL
Whenever VRAMP drops
IOUT
below VEAO, the HS-FET
is turned ON
VRAMP
VEAO
(VIN VOUT) VOUT
2LFSW VIN
IOUT
(6)
HS-FET
Driver
LS-FET
Driver
The device reverts to PWM mode once the
output current exceeds the critical level. After that,
the switching frequency stays fairly constant over
the output current range.
Figure 4—Force PWM Operation
When the MP2316 works in Forced PWM, the
MP2316 enters continuous-conduction mode
(CCM) where the HS-FET and LS-FET repeat
the on/off operation, even if the inductor current
goes to zero or negative value. The switching
frequency (FSW) is fairly constant. Figure 4 shows
the timing diagram during this operation.
Application When Input Voltage is Close to
Output Voltage.
MP2316 extends the on time when output
voltage loses regulation when input voltage is
close to output voltage. The switching frequency
drops correspondingly in order to achieve larger
duty cycle to keep output regulated. If the Vin is
very close to Vout, Ton extension circuit will force
MP2316 working in PWM mode with higher than
expected frequency. Increasing Vin to certain
level, part will exit this mode. Refer to Figure 6,
MP2316 can work at auto PFM/PWM mode when
Vin is above the curve. If auto PFM/PWM mode
is required at input voltage below the curve, use
Enable startup instead of input voltage startup.
Light-Load Operation
When the MP2316 works in auto PFM/PWM
mode and during light-load operation—the
MP2316 automatically reduces the switching
frequency to maintain high efficiency, and the
inductor current drops near zero. When the
inductor current reaches zero, the LS-FET driver
goes into tri-state (high Z). Hence, the output
capacitors discharge slowly to GND through LS-
FET, R1, and R2. This operation greatly
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MP2316 – 19V, 3A LOW IQ STEP DOWN CONVERTER
Figure 8—Simplified External Ramp Circuit in
PWM Mode with Small ESR Cap
Figure 8 shows a simplified external ramp
compensation for PWM mode. Chose the
external ramp Cr to meet the following condition:
Figure 6—VIN startup min VIN vs. VOUT to
guarantee auto PFM/PWM mode work well
Floating Driver and Bootstrap Charging
1
1
RFB
5
(7)
An external bootstrap capacitor powers the
floating power MOSFET driver. This floating
driver has its own UVLO protection. This UVLO’s
rising threshold is 2.2V with a hysteresis of
150mV. The bootstrap capacitor voltage is
regulated internally by VIN through D1, M1, Cb,
L1 and C2A (Figure 7). If (VIN-VSW) exceeds 5V,
U1 will regulate M1 to maintain a 5V BST voltage
across Cb.
2F Cr
sw
Where, RFB is set to 90k internally. Then:
(8)
IRramp = ICr + IRFB ICr
And the Vramp on the VCR can be estimated as:
V Vout
in
V
T
(9)
ramp
on
Rramp Cr
Where, Rramp is set to 900k internally.
As can be seen from equation 9, if there is
instability in PWM mode, we can reduce Cr. If Cr
cannot be reduced further due to limitation from
equation 7, then we can add an external resistor
between SW and CR to reduce the equivalent
Rramp. Typically set Vramp to about 20-40mV
for a stable PWM operation.
Table 1 below is recommended Cr value for
different output voltages. The recommended Cr
value in Table 1 is based on 500kHz switching
frequency, selected output inductor and 22µF
output capacitors.
Figure 7—Bootstrap Charging Circuit
Ramp with small ESR Output Capacitor
When the output capacitors are ceramic ones,
the ESR ripple is not high enough to stabilize the
system, the external ramp compensation is
needed.
MP2316 Rev. 1.3
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MP2316 – 19V, 3A LOW IQ STEP DOWN CONVERTER
Pre-bias startup
Table 1—Cr Selection for Common Output
Voltages
The MP2316 has been designed for monotonic
startup into pre-biased loads. If the output is pre-
biased to a certain voltage during startup, the
BST voltage will be refreshed and charged, the
voltage on the soft-start capacitor will be charged
too. If BST voltage exceeds its rising threshold
voltage and Soft-start capacitor voltage exceeds
the sensed output voltage at the FB pin, the part
starts to work.
Cr(pF)
VOUT(V) L(μH)
VIN=12V VIN=5V
1.0
1.2
1.5
1.8
2.5
3.3
2.2
2.2
3.3
3.3
3.3
4.7
82
82
100
82
56
56
100
120
120
150
150
56
5
4.7
100
56(8)
Power-Good (PG)
Notes:
9) When VOUT=5V, VIN should be higher than 6V.
The PG pin is an open drain output. PG requires
a pull up resistor (eg. 100k). PG pin is pulled to
GND before SS is ready. After FB voltage
reaches 90% of VREF, the PG pin is pulled high
after a 40μs delay. When the FB voltage drops
below 85% of VREF, the PG pin will be pulled low.
Cr value may need change with different input
voltage, output voltage, output inductor, output
capacitor and frequency set. If the design spec is
not the same as Table 1 spec, Cr value is
needed to be adjusted accordingly. Take
equation 9 as design guide.
Note: If PG is pulled up to an external voltage,
PG will not de-assert (Logic low) if EN is low or if
Vin < 0.8V (typ). If PG is pulled up to the VCC pin,
PG will de-assert (Logic low) if either EN is Low
or if Vin < 0.8V (typ). If connecting two or more
PG together, please refer to Application section.
In skip mode, the stability mainly determined by
the ripple of VEAO, a reasonable Vramp chosen in
PWM operation is generally ok for skip mode.
Soft Start
MP2316 employs a soft start (SS) mechanism to
ensure smooth output ramping during power up.
When the EN pin goes high, an internal current
source (8μA) charges up the SS capacitor. The
SS capacitor voltage takes over the REF voltage
to the PWM comparator. The output voltage
smoothly ramps up with the SS voltage. Once SS
voltage rises above the VREF, it continues to ramp
up REF voltage takes over. At this point, the soft
start finishes and it enters steady state operation.
Over-Current Protection (OCP) and Short-
Circuit Protection (SCP)
MP2316 has cycle-by-cycle over-current limit
control. During HS-FET ON state, the inductor
current is monitored. When the sensed inductor
current hits the peak current limit, the HS limit
comparator (shown in Figure 1) is triggered, the
device enters over-current protection mode
immediately, turns off HS-FET and turns on LS-
FET. Meanwhile, the output voltage drops until
VFB is below the under-voltage (UV) threshold—
typically 50% below the reference. Once UV is
triggered, the MP2316 enters hiccup mode to
periodically restart the part.
The SS capacitor value can be determined as
follows:
Tss(ms)Iss(uA)
(10)
Css(nF)
VREF(V)
During over-current protection, the device tries to
recover from over-current fault with hiccup mode,
that means the chip will disable output power
stage, discharge soft-start cap and then
automatically try to soft-start again. If the over-
current condition still holds after soft-start ends,
the device repeats this operation cycle till over-
current condition disappears and then output
rises back to regulation level. The OCP is non-
latch protection.
If the output capacitance is large value, it is not
recommended to set the SS time too short.
Otherwise, it’s easy to hit the current limit during
SS. A minimum value of 4.7nF is recommended
if the output capacitance is larger than 330μF.
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MP2316 – 19V, 3A LOW IQ STEP DOWN CONVERTER
Enable Control
EN is a digital control pin that turns the regulator
on and off. Drive EN high to turn on the regulator;
drive it low to turn it off. An internal 1Mꢀ resistor
from EN to GND allows EN to be floated to shut
down the chip.
The EN pin is clamped internally using a 6.5V
series-Zener-diode. Connecting the EN input pin
through a pullup resistor to the voltage on the VIN
pin. The pull up resistance needs to be large
enough to limit the EN pin current less than
100µA. For example, with 12V connected to Vin,
R
PULLUP ≥ (12V – 6.5V) ÷ 100µA = 55kꢀ.
Connecting the EN pin directly to a voltage
source without any pullup resistor requires limit
the amplitude of the voltage less than 6V to
prevent damage to the Zener diode.
UVLO protection
MP2316 has under-voltage lock-out protection
(UVLO). When the input voltage is higher than
the UVLO rising threshold voltage, the MP2316
powers up. It shuts off when the input voltage is
lower than the UVLO falling threshold voltage.
This is non-latch protection.
Thermal Shutdown
The MP2316 employs thermal shutdown by
internally monitoring the junction temperature of
the IC. If the junction temperature exceeds the
threshold value (typically 150ºC), the converter
shuts off. This is non-latch protection. There is
about 20ºC hysteresis. Once the junction
temperature drops below 130ºC, it initiates start
up.
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MP2316 – 19V, 3A LOW IQ STEP DOWN CONVERTER
Setting the Frequency
APPLICATION INFORMATION
COMPONENT SELECTION
Setting the Output Voltage
Refer to Mode selection section. Set the forced
PWM mode switching frequency by connecting
a resistor R6 from VIN to FREQ/MODE pin and
leaving R7 NS. The R6 is determined as follows:
The external resistor divider is used to set the
output voltage. First, choose a value for R2. R2
should be chosen reasonably, a small R2 will
lead to considerable quiescent current loss
while too large R2 makes the FB noise
sensitive. It is recommended to choose a value
within for R2. Typically, set the current through
R2 between will make a good balance between
system stability and also the no load loss. Then
R1 is determined as follow:
Vo106
FSW (kHz) V
TDelay _PWM(ns) V 0.4
IN
IN
(12)
R6(k)
14.5
Where TDelay_PWM is about 15ns.
VOUT VREF
R1
R2
(11)
VREF
Where the VREF is 0.6V typically.
The feedback circuit is shown as Figure 9.
Figure 10—R6 vs. Forced PWM Mode
Switching Frequency
Set the auto PFM/PWM mode switching
frequency by connecting a resistor R7 from
FREQ/MODE pin to ground and leaving R6 NS.
The R7 is determined as follow:
Figure 9—Feedback Network
Table 2 lists the recommended resistors value
for common output voltages.
Vo106
FSW (kHz) V
TDelay _PFM(ns) V 0.4
IN
IN
(13)
Table 2—Resistor Selection for Common
Output Voltages(9)
R7(k)
13
Where TDelay_PFM is about 10ns.
VOUT(V)
R1(kΩ)
R2(kΩ)
1.0
1.2
1.5
1.8
2.5
3.3
5
27
40.2
40.2
40.2
40.2
40.2
40.2
40.2
40.2
60.4
80.6
127
182
294
Notes:
10) The feedback resistors in table 2 are optimized for 500kHz
switching frequency. The detailed schematics are shown on
the typical application circuit section.
Figure 11—R7 vs. Auto PFM/PWM Mode
Switching Frequency
MP2316 Rev. 1.3
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17
MP2316 – 19V, 3A LOW IQ STEP DOWN CONVERTER
Equation 12 and 13 are the typical switching
frequency calculation formula. The actually
frequency will change a little at different load
currents and different input voltages as
described before.
The worst-case condition occurs at VIN = 2VOUT,
where:
IOUT
(17)
ICIN
2
For simplification, choose the input capacitor
with an RMS current rating greater than half of
the maximum load current.
Selecting the Inductor
The inductor is necessary to supply constant
current to the output load while being driven by
the switched input voltage. A larger-value
inductor will result in less ripple current that will
result in lower output ripple voltage. However, a
larger-value inductor will have a larger physical
footprint, higher series resistance, and/or lower
saturation current. A good rule for determining
the inductance value is to design the peak-to-
peak ripple current in the inductor to be in the
range of 30% to 40% of the maximum output
current, and that the peak inductor current is
below the maximum switch current limit. The
inductance value can be calculated by:
The input capacitance value determines the
input voltage ripple of the converter. If there is
an input voltage ripple requirement in the
system, choose the input capacitor that meets
the specification.
The input voltage ripple can be estimated as
follows:
IOUT
SW CIN
VOUT
VOUT
(18)
V
(1
)
IN
F
V
V
IN
IN
Under worst-case conditions where VIN = 2VOUT
:
IOUT
4 FSW CIN
1
(19)
V
IN
VOUT
SW IL
VOUT
(14)
L
(1
)
F
V
IN
Selecting the Output Capacitor
Where ∆IL is the peak-to-peak inductor ripple
current.
The output capacitor is required to maintain the
DC output voltage. Ceramic or POSCAP
capacitors are recommended. The output
voltage ripple can be estimated as:
The inductor should not saturate under the
maximum inductor peak current, where the
peak inductor current can be calculated by:
VOUT
V
1
(20)
)
VOUT
(1 OUT )(RESR
FSW L
V
8FSW COUT
VOUT
VOUT
IN
(15)
ILP IOUT
(1
)
2FSW L
V
IN
In the case of ceramic capacitors, the
impedance at the switching frequency is
dominated by the capacitance. The output
voltage ripple is mainly caused by the
capacitance. For simplification, the output
voltage ripple can be estimated as:
Selecting the Input Capacitor
The input current to the step-down converter is
discontinuous and therefore requires
a
capacitor to supply the AC current to the step-
down converter while maintaining the DC input
voltage. Ceramic capacitors are recommended
for best performance and should be placed as
close to the VIN pin as possible. Capacitors
with X5R and X7R ceramic dielectrics are
recommended because they are fairly stable
with temperature fluctuations.
VOUT
VOUT
(21)
VOUT
(1
)
8F 2 LCOUT
V
SW
IN
The output voltage ripple caused by ESR is
very small. Therefore, an external ramp is
needed to stabilize the system. The external
ramp can be generated through the capacitor
Cr.
The capacitors must also have a ripple current
rating greater than the maximum input ripple
current of the converter. The input ripple current
can be estimated as follows:
In the case of POSCAP capacitors, the ESR
dominates the impedance at the switching
frequency. For simplification, the output ripple
can be approximated as:
VOUT
VOUT
(16)
ICIN IOUT
(1
)
V
V
IN
IN
MP2316 Rev. 1.3
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18
MP2316 – 19V, 3A LOW IQ STEP DOWN CONVERTER
External 3.3V
VOUT
V
VOUT
(1 OUT )RESR
(22)
FSW L
V
IN
100kꢀ
PG
EN
Besides considering the output ripple, chose
larger output capacitor also can get better load
transient response, but maximum output
capacitor limitation should be also considered in
design application. If the output capacitor value
is too high, the output voltage can’t reach the
design value during the soft-start time, and then
it will fail to regulate. The maximum output
capacitor value Co_max can be limited
approximately by:
MP2316
MP2316
PG
EN
(23)
CO _MAX (ILIM_ AVG IOUT ) Tss / VOUT
Figure 13: PG Pull up to external power supply
with enable control signal --- PG parallel Output
Where, ILIM_AVG is the average start-up current
during soft-start period. Tss is the soft-start time.
External Bootstrap Diode
PG Pull-Up
BST voltage may become insufficient at some
particular conditions. In this case an external
bootstrap diode can enhance the efficiency of
the regulator and help to avoid BST voltage
insufficient at light load PFM operation. The
BST voltage insufficient is more likely to happen
at given either of the following conditions:
It is recommended that PG is pulled up to VCC
for proper operation. If PG is pulled up to
external voltage or if connecting two or more
PG together, connect a diode from PG to EN as
shown in Fig.12 and Fig.13. In this case PG will
de-assert low when EN signal is low. But PG
will not de-assert low when input power is off
and EN signal is high condition.
VIN is low
VOUT
Duty cycle is large: D=
>65%
External 3.3V
VIN
In these cases, if BST voltage insufficient
happens the output ripple voltage may become
extremely large at light load condition or bad
efficiency at heavy load condition, add an
external BST diode from the VCC pin to BST
pin, as shown in Figure 14.
100kꢀ
PG
MP2316
EN
Figure 12: PG Pull up to external power supply
with enable control signal --- Single PG Output
Figure 14: Optional External Bootstrap Diode
The recommended external BST diode is
IN4148.
MP2316 Rev. 1.3
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19
MP2316 – 19V, 3A LOW IQ STEP DOWN CONVERTER
PC Board Layout
VOUT
Proper layout of the switching power supplies is
very important, and sometimes critical for
proper function. Poor layout design can result in
poor line or load regulation and stability issues.
Please follow these guidelines and take Figure
15 as reference:
1）The high current paths (GND, IN and SW)
should be placed very close to the device
with short, direct and wide traces.
VCC
sw
2）The input capacitor needs to be as close as
VIN
possible to the IN and GND pins.
3）The Mode/Frequency circuit should be
placed closed to the part.
4）The external feedback resistors should be
placed next to the FB pin.
GND
5）Keep the switching node SW short and
away from the feedback network.
Figure 15— Sample Board Layout
In order to have better performances, it is better
to use four layers boards. Figure 15 shows the
top and bottom layers (Inner 1 and Inner 2 are
all GND).
Design Example
A design example is provided below when the
ceramic capacitors are applied:
VIN
VOUT
IOUT
12V
1.2V
3A
The detailed application schematic is showed in
Figure 17. The typical performance and
waveforms have been showed in the Typical
Characteristics Section. For more devices
applications, please refer to the related
Evaluation Board Datasheet.
MP2316 Rev. 1.3
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20
MP2316 – 19V, 3A LOW IQ STEP DOWN CONVERTER
TYPICAL APPLICATION CIRCUITS
Note:
a. Use R6=130k and not use R7 to set forced PWM, Use R7=147k and not use R6 to set auto PFM/PWM. The recommended R6, R7
value are basing on equation 12, 13 and optimized according to test result.
b. Recommend to pull-up PG to IC VCC pin. If need pull-up PG to external power supply, please refer to the PG description in
application information section.
Figure 16— VIN=12V, VOUT=1.0V, IOUT=3A, FS=500kHz
Rb
0
10
Cb
0.1uF
VOUT
1.2V/3A
VIN
BST
L
3, 14
Vin
EN
2.2uH
R3
100K
R6
NS
2, 13
8
SW
CR
C1A
0.1uF
C1
22uF
Cr
100pF
R1
40.2K
9
MP2316
4
FREQ/MODE
C2A
22uF
GND
7
R2
40.2K
R4
NS
FB
R7
180K
11
VCC
R5
100K
PG
GND
1, 12
SS
C4
1uF
5
6
GND
C3
15nF
Note:
a. Use R6=158k and not use R7 to set forced PWM, Use R7=180k and not use R6 to set auto PFM/PWM. The recommended R6, R7
value are basing on equation 12, 13 and optimized according to test result.
b. Recommend to pull-up PG to IC VCC pin. If need pull-up PG to external power supply, please refer to the PG description in
application information section.
Figure 17— VIN=12V, VOUT=1.2V, IOUT=3A, FS=500kHz
MP2316 Rev. 1.3
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21
MP2316 – 19V, 3A LOW IQ STEP DOWN CONVERTER
Rb
0
10
Cb
0.1uF
VOUT
1.5V/3A
VIN
BST
L
3, 14
Vin
EN
3.3uH
R3
100K
R6
NS
2, 13
8
SW
CR
C1A
0.1uF
C1
22uF
Cr
120pF
R1
60.4K
9
MP2316
4
FREQ/MODE
C2A
22uF
GND
7
R2
40.2K
R4
NS
FB
R7
220K
11
VCC
R5
100K
PG
GND
1, 12
SS
C4
1uF
5
6
GND
C3
15nF
Note:
a. Use R6=196k and not use R7 to set forced PWM, Use R7=220k and not use R6 to set auto PFM/PWM. The recommended R6, R7
value are basing on equation 12, 13 and optimized according to test result.
b. Recommend to pull-up PG to IC VCC pin. If need pull-up PG to external power supply, please refer to the PG description in
application information section.
Figure 18— VIN=12V, VOUT=1.5V, IOUT=3A, FS=500kHz
Rb
0
10
Cb
0.1uF
VOUT
1.8V/3A
VIN
BST
L
3, 14
Vin
EN
3.3uH
R3
100K
R6
NS
2, 13
8
SW
CR
C1A
0.1uF
C1
22uF
Cr
120pF
R1
80.6K
9
MP2316
4
FREQ/MODE
C2A
22uF
GND
7
R2
40.2K
R4
NS
FB
R7
255K
11
VCC
R5
100K
PG
GND
1, 12
SS
C4
1uF
5
6
GND
C3
15nF
Note:
a. Use R6=243k and not use R7 to set forced PWM, Use R7=255k and not use R6 to set auto PFM/PWM. The recommended R6, R7
value are basing on equation 12, 13 and optimized according to test result.
b. Recommend to pull-up PG to IC VCC pin. If need pull-up PG to external power supply, please refer to the PG description in
application information section.
Figure 19— VIN=12V, VOUT=1.8V, IOUT=3A, FS=500kHz
MP2316 Rev. 1.3
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22
MP2316 – 19V, 3A LOW IQ STEP DOWN CONVERTER
Rb
0
10
Cb
0.1uF
VOUT
2.5V/3A
VIN
BST
L
3, 14
Vin
EN
3.3uH
R3
100K
R6
NS
2, 13
8
SW
CR
C1A
0.1uF
C1
22uF
Cr
150pF
R1
127K
9
MP2316
4
FREQ/MODE
C2A
22uF
GND
7
R2
40.2K
R4
NS
FB
R7
360K
11
VCC
R5
100K
PG
GND
1, 12
SS
C4
1uF
5
6
GND
C3
15nF
Note:
a. Use R6 =348k and not use R7 to set forced PWM, Use R7= 360k and not use R6 to set auto PFM/PWM. The recommended R6, R7
value are basing on equation 12, 13 and optimized according to test result.
b. Recommend to pull-up PG to IC VCC pin. If need pull-up PG to external power supply, please refer to the PG description in
application information section.
Figure 20— VIN=12V, VOUT=2.5V, IOUT=3A, FS=500kHz
Rb
0
10
Cb
0.1uF
VOUT
3.3V/3A
VIN
BST
L
3, 14
Vin
EN
4.7uH
R3
100K
R6
NS
2, 13
8
SW
CR
C1A
0.1uF
C1
22uF
Cr
150pF
R1
182K
9
MP2316
4
FREQ/MODE
C2A
7
22uF
GND
R2
40.2K
R4
NS
FB
R7
499K
11
VCC
R5
100K
PG
GND
1, 12
SS
C4
1uF
5
6
GND
C3
15nF
Note:
a. Use R6=453k and not use R7 to set forced PWM, Use R7=499k and not use R6 to set auto PFM/PWM. The recommended R6, R7
value are basing on equation 12, 13 and optimized according to test result.
b. Recommend to pull-up PG to IC VCC pin. If need pull-up PG to external power supply, please refer to the PG description in
application information section.
Figure 21— VIN=12V, VOUT=3.3V, IOUT=3A, FS=500kHz
MP2316 Rev. 1.3
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23
MP2316 – 19V, 3A LOW IQ STEP DOWN CONVERTER
Rb
0
10
Cb
0.1uF
VOUT
5V/3A
BST
L
3, 14
Vin
EN
4.7uH
2, 13
R3
100K
SW
CR
R6
NS
C1A
22uF
Cr
100pF
R1
294K
9
C1
0.1uF
8
7
MP2316
4
FREQ/MODE
C2A
22uF
R2
R4
NS
FB
R7
787K
11
40.2K
VCC
PG
GND
1, 12
SS
R5
100K
C4
1uF
5
6
GND
C3
15nF
Note:
a. Use R6=715k and not use R7 to set forced PWM, Use R7=787k and not use R6 to set auto PFM/PWM. The recommended R6, R7
value are basing on equation 12, 13 and optimized according to test result.
b. Recommend to pull-up PG to IC VCC pin. If need pull-up PG to external power supply, please refer to the PG description in
application information section.
Figure 22— VIN=12V, VOUT=5V, IOUT=3A, FS=500kHz
MP2316 Rev. 1.3
5/31/2019
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24
MP2316 – 19V, 3A LOW IQ STEP DOWN CONVERTER
PACKAGE INFORMATION
QFN-14 (2mmx3mm)
1) ALL DIMENSIONS ARE IN MILLIMETERS.
2) EXPOSED PADDLE SIZE DOES NOT
INCLUDE MOLD FLASH.
3) LEAD COPLANARITY SHALL BE 0.10
MILLIMETERS MAX.
4) JEDEC REFERENCE IS MO-220.
5) DRAWING IS NOT TO SCALE.
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MP2316 Rev. 1.3
5/31/2019
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25
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