MP2234SGJ [MPS]

High-Efficiency, 2A, 16V, 800kHz Synchronous, Step-Down Converter;
MP2234SGJ
型号: MP2234SGJ
厂家: MONOLITHIC POWER SYSTEMS    MONOLITHIC POWER SYSTEMS
描述:

High-Efficiency, 2A, 16V, 800kHz Synchronous, Step-Down Converter

文件: 总19页 (文件大小:722K)
中文:  中文翻译
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MP2234S  
High-Efficiency, 2A, 16V, 800kHz  
Synchronous, Step-Down Converter  
The Future of Analog IC Technology  
DESCRIPTION  
FEATURES  
The  
MP2234S  
is  
a
high-frequency,  
Wide 4.5V-to-16V Operating Input Range  
140m/60mLow RDS(ON) Internal Power  
MOSFETs  
High-Efficiency Synchronous Mode  
Operation  
Fixed 800kHz Switching Frequency  
Synchronizes from a 300kHz-to-2MHz  
External Clock  
Power-Save Mode at Light Load  
External Soft-Start  
Over Current Protection and Hiccup  
Thermal Shutdown  
Output Adjustable from 0.804V  
Available in a 8-pin TSOT-23 Package  
synchronous, rectified, step-down, switch-mode  
converter with built-in power MOSFETs. It  
offers a compact solution to achieve a 2A  
continuous output current with excellent load  
and line regulation over a wide input-supply  
range. The MP2234S has synchronous mode  
operation for higher efficiency over the output  
current load range.  
Current-mode operation provides fast transient  
response and eases loop stabilization.  
Full protection features include over-current  
protection (OCP) and thermal shut down (TSD).  
The MP2234S requires a minimal number of  
readily-available standard external components,  
and is available in a space-saving 8-pin  
TSOT23 package.  
APPLICATIONS  
Notebook Systems and I/O Power  
Digital Set-Top Boxes  
Flat-Panel Television and Monitors  
Distributed Power Systems  
All MPS parts are lead-free, halogen free, and adhere to the  
RoHS directive. For MPS green status, please visit MPS website  
under Quality Assurance. “MPS” and “The Future of Analog IC  
Technology” are Registered Trademarks of Monolithic Power  
Systems, Inc.  
TYPICAL APPLICATION  
R3  
20  
12V  
C4  
0.1µ  
F
C1  
L1  
4.7µH  
22µF  
MP2234S  
3.
C2  
R1  
40.2k  
47µF  
C3  
µF  
R5  
5.6k  
0.1  
R2  
13k  
C5  
22nF  
MP2234S Rev.1.0  
4/3/2015  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2015 MPS. All Rights Reserved.  
1
MP2234S – SYNCHRONOUS STEP-DOWN CONVERTER  
ORDERING INFORMATION  
Part Number*  
Package  
Top Marking  
MP2234SGJ  
See Below  
TSOT-23  
* For Tape & Reel, add suffix –Z (e.g. MP2234SGJ–Z).  
TOP MARKING  
ALZ: product code of MP2234SGJ;  
Y: year code;  
PACKAGE REFERENCE  
1
2
3
4
8
7
6
5
MP2234S Rev.1.0  
4/3/2015  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2015 MPS. All Rights Reserved.  
2
MP2234S – SYNCHRONOUS STEP-DOWN CONVERTER  
ABSOLUTE MAXIMUM RATINGS (1)  
VIN ................................................ -0.3V to 17V  
VSW ....................................................................  
-0.3V (-5V for <10ns) to 17V (19V for <10ns)  
VBST ...................................................... VSW+6V  
All Other Pins................................-0.3V to 6V(2)  
Thermal Resistance (5)  
TSOT23-8 ............................. 100..... 55... °C/W  
θJA θJC  
Notes:  
1) Exceeding these ratings may damage the device.  
2) About the details of EN pin’s ABS MAX rating, please refer to  
Page 12, Enable/SYNC control section.  
3) The maximum allowable power dissipation is a function of the  
maximum junction temperature TJ (MAX), the junction-to-  
ambient thermal resistance θJA, and the ambient temperature  
TA. The maximum allowable continuous power dissipation at  
any ambient temperature is calculated by PD (MAX) = (TJ  
(MAX)-TA)/θJA. Exceeding the maximum allowable power  
dissipation will cause excessive die temperature, and the  
regulator will go into thermal shutdown. Internal thermal  
shutdown circuitry protects the device from permanent  
damage.  
(3)  
Continuous Power Dissipation (TA = +25°C)  
..........................................................1.25W  
Junction Temperature..............................150°C  
Lead Temperature ...................................260°C  
Storage Temperature.................-65°C to 150°C  
Recommended Operating Conditions (4)  
Supply Voltage VIN .......................... 4.5V to 16V  
Output Voltage VOUT........... 0.804V to VIN x DMAX  
Operating Junction Temp. (TJ). -40°C to +125°C  
4) The device is not guaranteed to function outside of its  
operating conditions.  
5) Measured on JESD51-7, 4-layer PCB.  
MP2234S Rev.1.0  
4/3/2015  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2015 MPS. All Rights Reserved.  
3
MP2234S – SYNCHRONOUS STEP-DOWN CONVERTER  
ELECTRICAL CHARACTERISTICS  
VIN=12V, TJ=-40°C to +125°C(6), typical value is tested at TJ=+25°C, unless otherwise noted.  
Parameter  
Symbol Condition  
Min  
Typ  
Max  
Units  
V
EN = 0V, TJ=+25°C  
1
5
1
μA  
Supply Current (Shutdown)  
IIN  
Iq  
VEN = 0V, TJ=-40°C to +125°C  
VEN = 2V, VFB = 1V  
μA  
mA  
mΩ  
mΩ  
μA  
Supply Current (Quiescent)  
HS Switch-On Resistance  
LS Switch-On Resistance  
Switch Leakage  
0.5  
140  
60  
HSRDS-ON VBST-SW=5V  
LSRDS-ON VCC =5V  
SWLKG  
ILIMIT  
VEN = 0V, VSW =12V or 0V  
1
Current Limit  
Under 40% Duty Cycle  
VFB=0.75V,TJ=+25°C  
VFB=0.75V,TJ=-40°C to +125°C  
VFB<400mV  
3
4
A
620  
550  
800  
800  
0.5  
92  
900  
900  
kHz  
kHz  
fSW  
%
Oscillator Frequency  
fSW  
Fold-Back Frequency  
Maximum Duty Cycle  
Minimum On Time(7)  
Sync Frequency Range  
fFB  
DMAX  
τON_MIN  
fSYNC  
VFB=700mV  
40  
ns  
0.3  
2
MHz  
TJ =25°C  
788  
804  
804  
820  
mV  
mV  
Feedback Voltage  
VFB  
TJ=-40°C to +125°C  
VFB=830mV  
784  
824  
Feedback Current  
EN Rising Threshold  
EN Hysteresis  
IFB  
10  
1.4  
150  
50  
nA  
V
VEN_RISING  
VEN Hysteresis  
1
1.8  
mV  
VEN=2V  
VEN=0  
2
μA  
EN Input Current  
IEN  
0
μA  
μs  
EN Turn-Off Delay  
ENtd-off  
10  
VIN Under-Voltage Lockout  
Threshold—Rising  
INUVVth  
3.5  
3.9  
4.3  
V
VIN Under-Voltage Lockout  
Threshold—Hysteresis  
INUVHYS  
VCC  
700  
mV  
VCC Regulator  
VCC Load Regulation  
Soft-Start Current  
Thermal Shutdown (7)  
Thermal Hysteresis (7)  
Notes:  
4.6  
8
5
2
5.4  
14  
V
ICC=5mA  
%
ISS  
11  
150  
20  
μA  
°C  
°C  
6) Not tested in production. Guaranteed by over-temperature correlation.  
7) Guaranteed by design.  
MP2234S Rev.1.0  
4/3/2015  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2015 MPS. All Rights Reserved.  
4
MP2234S – SYNCHRONOUS STEP-DOWN CONVERTER  
TYPICAL CHARACTERISTICS  
Performance waveforms are tested on the evaluation board of the Design Example section.  
VIN = 12V, VOUT = 3.3V, L=4.7μH, TA = 25°C, unless otherwise noted.  
MP2234S Rev.1.0  
4/3/2015  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2015 MPS. All Rights Reserved.  
5
MP2234S – SYNCHRONOUS STEP-DOWN CONVERTER  
TYPICAL PERFORMANCE CHARACTERISTICS  
Performance waveforms are tested on the evaluation board of the Design Example section.  
VIN = 12V, VOUT = 3.3V, L=4.7μH, TA = 25°C, unless otherwise noted.  
MP2234S Rev.1.0  
4/3/2015  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2015 MPS. All Rights Reserved.  
6
MP2234S – SYNCHRONOUS STEP-DOWN CONVERTER  
TYPICAL PERFORMANCE CHARACTERISTICS (contiuned)  
Performance waveforms are tested on the evaluation board of the Design Example section.  
VIN = 12V, VOUT = 3.3V, L=4.7μH, TA = 25°C, unless otherwise noted.  
MP2234S Rev.1.0  
4/3/2015  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2015 MPS. All Rights Reserved.  
7
MP2234S – SYNCHRONOUS STEP-DOWN CONVERTER  
TYPICAL PERFORMANCE CHARACTERISTICS (contiuned)  
Performance waveforms are tested on the evaluation board of the Design Example section.  
VIN = 12V, VOUT = 3.3V, L=4.7μH, TA = 25°C, unless otherwise noted.  
V
/AC  
OUT  
10mV/div.  
V
OUT  
2V/div.  
V
/AC  
IN  
V
/AC  
OUT  
200mV/div.  
20mV/div.  
V
IN  
5V/div.  
SW  
5V/div.  
V
V
SW  
10V/div.  
I
I
INDUCTOR  
2A/div.  
INDUCTOR  
I
OUT  
2A/div.  
1A/div.  
MP2234S Rev.1.0  
4/3/2015  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2015 MPS. All Rights Reserved.  
8
MP2234S – SYNCHRONOUS STEP-DOWN CONVERTER  
PIN FUNCTIONS  
Package  
Pin #  
Name Description  
Soft-Start. Connect an external capacitor to program the soft start time for the switch mode  
regulator.  
1
SS  
IN  
Supply Voltage. The IN pin supplies power for internal MOSFET and regulator. The  
MP2234S operates from a +4.5V to +16V input rail. Requires a low-ESR, and low-  
inductance capacitor (C1) to decouple the input rail. Place the input capacitor very close to  
this pin and connect it with wide PCB traces and multiple vias.  
2
3
Switch Output. Connect to the inductor and bootstrap capacitor. This pin is driven up to VIN  
by the high-side switch during the PWM duty cycle ON time. The inductor current drives  
the SW pin negative during the OFF time. The ON resistance of the low-side switch and  
the internal body diode fixes the negative voltage. Connect using wide PCB traces and  
multiple vias.  
SW  
System Ground. Reference ground of the regulated output voltage. PCB layout Requires  
extra care. For best results, connect to GND with copper and vias.  
4
5
GND  
BST  
Bootstrap. Requires a capacitor connected between SW and BST pins to form a floating  
supply across the high-side switch driver.  
Enable/Synchronize. EN/SYNC=high to enable the MP2234S. Apply an external clock  
6
7
EN/SYNC change the switching frequency. For automatic start-up, connect EN/SYNC pin to VIN with  
a 100kresistor.  
Internal 5V LDO output. Powers the driver and control circuits. Decouple with 0.1μF to  
0.22μF capacitor. Do not use a capacitor 0.22μF.  
VCC  
Feedback. Connect to the tap of an external resistor divider from the output to GND to set  
the output voltage. The frequency fold-back comparator lowers the oscillator frequency  
8
FB  
when the FB voltage is below 400mV to prevent current limit runaway during a short circuit  
fault. Place the resistor divider as close to the FB pin as possible. Avoid placing vias on  
the FB traces.  
MP2234S Rev.1.0  
4/3/2015  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2015 MPS. All Rights Reserved.  
9
MP2234S – SYNCHRONOUS STEP-DOWN CONVERTER  
FUNCTIONAL BLOCK DIAGRAM  
Figure 1. Functional Block Diagram  
MP2234S Rev.1.0  
4/3/2015  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2015 MPS. All Rights Reserved.  
10  
MP2234S – SYNCHRONOUS STEP-DOWN CONVERTER  
clock initiates the PWM cycle, the HS-FET turns  
on and remains on until VILsense reaches the  
OPERATION  
The  
MP2234S  
is  
a
high-frequency,  
value set by VCOMP (after a period of dead time),  
and the low-side MOSFET (LS-FET) turns on  
and remains on until the inductor-current value  
decreases to zero. The device repeats the  
same operation in every clock cycle to regulate  
the output voltage (see Figure 3).  
synchronous, rectified, step-down, switch-mode  
converter with built-in power MOSFETs. It  
offers a compact solution that achieves a 2A  
continuous output current with excellent load  
and line regulation over 4.5V to 16V input-  
supply range.  
The MP2234S has three working modes:  
advanced asynchronous modulation (AAM)  
mode, discontinuous conduction mode (DCM),  
and continuous conduction mode (CCM). The  
load current increases as the device transitions  
from AAM mode to DCM to CCM.  
IL  
AAM Control Operation  
Figure 3. DCM Control Operation  
In a light-load condition, MP2234S works in  
advanced asynchronous modulation (AAM)  
mode (see Figure 2). The VAAM is an internal  
fixed voltage when input and output voltages  
are fixed. VCOMP is the error-amplifier output  
(which represents the peak inductor-current  
CCM Control Operation  
The device enters continuous conduction mode  
(CCM) from DCM once the inductor current no  
longer drops to zero in a clock cycle. In CCM,  
the internal clock initiates the PWM cycle, the  
HS-FET turns on and remains on until VILsense  
reaches the value set by VCOMP (after a period  
of dead time), and the LS-FET turns on and  
remains on until the next clock cycle begins.  
The device repeats the same operation in every  
clock cycle to regulate the output voltage.  
information). When VCOMP is lower than VAAM  
,
the internal clock is blocked. This causes the  
MP2234S to skip pulses, achieving the light-  
load power save. Refer to AN032 for additional  
details.  
The internal clock re-sets every time VCOMP is  
higher than VAAM. At the same time, the high-  
side MOSFET (HS-FET) turns on and remains  
on until VILsense reaches the value set by VCOMP.  
If VILsense does not reach the value set by VCOMP  
within 92% of one PWM period, the HS-FET is  
forced off.  
Internal Regulator  
The light-load feature in this device is optimized  
for 12V input applications.  
A 5V internal regulator powers most of the  
internal circuitries. This regulator takes VIN and  
operates in the full VIN range. When VIN  
exceeds 5.0V, the output of the regulator is in  
full regulation. When VIN is less than 5.0V, the  
output decreases, and the part requires a 0.1µF  
ceramic decoupling capacitor.  
Error Amplifier (EA)  
The error amplifier compares the FB pin voltage  
to the internal 0.804V reference (VREF) and  
outputs a current proportional to the difference  
between the two. This output current then  
Figure 2. Simplified AAM Control Logic  
DCM Control Operation  
The VCOMP voltage ramps up as the output  
current increases. When its minimum value  
exceeds VAAM, the device enters discontinuous  
conduction mode (DCM). In DCM, the internal  
charges  
or  
discharges  
the  
internal  
compensation network to form the COMP  
voltage, which controls the power MOSFET  
current. The optimized internal compensation  
MP2234S Rev.1.0  
4/3/2015  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2015 MPS. All Rights Reserved.  
11  
MP2234S – SYNCHRONOUS STEP-DOWN CONVERTER  
network minimizes the external component  
counts and simplifies the control loop design.  
(see Figure 5). For best results, set the UVLO  
falling threshold (VSTOP) above 4.5V using the  
enable resistors. Set the rising threshold  
(VSTART) to provide enough hysteresis to  
allow for input-supply variations.  
Enable/SYNC Control  
EN/SYNC is a digital control pin that turns the  
regulator on and off. Drive EN high to turn on  
the regulator; drive it low to turn it off. An  
internal 1Mresistor from EN/SYNC to GND  
allows EN/SYNC to be floated to shut down the  
chip. The EN/SYNC pin is clamped internally  
using a 6.5V series-Zener-diode (see Figure 4).  
Connecting the EN/SYNC input pin through a  
pull-up resistor to the voltage on the IN pin  
limits the EN input current to less than 100µA.  
RENUP  
RENDOWN  
For example, with 12V connected to IN, RPULLUP  
(12V – 6.5V) ÷ 100µA = 55k.  
Figure 5. Adjustable UVLO  
Connecting the EN pin directly to a voltage  
source without any pull-up resistor requires  
limiting the amplitude of the voltage source to  
6V to prevent damage to the Zener diode.  
Soft-Start (SS)  
Adjust the soft-start time by connecting a  
capacitor from SS pin to ground. When the soft-  
start begins, an internal 11µA current source  
charges the external capacitor. The soft-start  
capacitor connects to the non-inverting input of  
the error amplifier. The soft-start period  
continues until the voltage on the soft-start  
capacitor exceeds the 0.804V reference. Then  
the non-inverting amplifier takes the reference  
voltage as the input. Use the following equation  
to calculate the soft-start time:  
Figure 4. 6.5V Zener Diode Connection  
0.804V ×Css(nF)  
For external clock synchronization, connect a  
clock with a frequency range between 300kHz  
and 2MHz 2ms after the output voltage is set:  
The internal clock rising edge will synchronize  
with the external clock rising edge. Select an  
external clock signal with a pulse width less  
than 1μs.  
tSS(ms) =  
11μA  
Over-Current-Protection (OCP) and Hiccup  
The MP2234S has a cycle-by-cycle over-  
current limit when the inductor current peak  
value exceeds the set current limit threshold.  
Meanwhile, the output voltage drops until VFB is  
below the Under-Voltage (UV) threshold—  
typically 50% below the reference. Once UV is  
triggered, the MP2234S enters hiccup mode to  
periodically restart the part. This protection  
mode is especially useful when the output is  
dead-shorted to ground, and greatly reduces  
the average short circuit current to alleviate  
thermal issues and protect the regulator. The  
MP2234S exits the hiccup mode once the over-  
current condition is removed.  
Under-Voltage Lockout (UVLO)  
The MP2234S has under-voltage lock-out  
protection (UVLO). When the VCC voltage  
exceeds the UVLO rising threshold voltage, the  
device begins to power-up. It shuts off when  
the VCC voltage drops below the UVLO falling  
threshold voltage. This is non-latch protection.  
The MP2234S is disabled when the input  
voltage falls below 3.2V (Typ). If an application  
requires a higher under-voltage lockout (UVLO)  
threshold, use the EN pin to adjust the input  
voltage UVLO by using two external resistors  
MP2234S Rev.1.0  
4/3/2015  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2015 MPS. All Rights Reserved.  
12  
MP2234S – SYNCHRONOUS STEP-DOWN CONVERTER  
Thermal Shutdown (TSD)  
Thermal shutdown prevents the chip from  
operating at exceedingly high temperatures.  
When the silicon die reaches temperatures that  
exceed 150°C, it shuts down the whole chip.  
When the temperature drops below its lower  
threshold, typically 130°C, the chip is enabled  
again.  
Floating Driver and Bootstrap Charging  
An external bootstrap capacitor powers the  
floating power MOSFET driver. This floating  
driver has its own UVLO protection. This  
UVLO’s rising threshold is 2.2V with a  
hysteresis of 150mV. The bootstrap capacitor  
voltage is regulated internally by VIN through D1,  
M1, R3, C4, L1 and C2 (see Figure 6). If (VIN-  
VSW) exceeds 5V, U1 will regulate M1 to  
maintain a 5V BST voltage across C4. A 20ꢀ  
resistor placed between SW and BST cap is  
strongly recommended to reduce SW spike  
voltage.  
D1  
VIN  
M1  
BST  
U1  
R3  
5V  
C4  
VOUT  
C2  
L1  
SW  
Figure 6. Internal Bootstrap Charging Circuit  
Startup and Shutdown  
If both VIN and VEN exceed their respective  
thresholds, the chip starts. The reference block  
starts first, generating stable reference voltage  
and currents, and then the internal regulator is  
enabled. The regulator provides a stable supply  
for the remaining circuitries.  
Three events can shut down the chip: VEN low,  
VIN low and thermal shutdown. During the  
shutdown procedure, the signal path is first  
blocked to avoid any fault triggering. The  
COMP voltage and the internal supply rail are  
then pulled down. The floating driver is not  
subject to this shutdown command.  
MP2234S Rev.1.0  
4/3/2015  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2015 MPS. All Rights Reserved.  
13  
MP2234S – SYNCHRONOUS STEP-DOWN CONVERTER  
VOUT ×(V VOUT  
)
APPLICATION INFORMATION  
IN  
L1 =  
V × ΔIL × fOSC  
IN  
Setting the Output Voltage  
The external resistor divider sets the output  
voltage (see Typical Application on page 1).  
Where ΔIL is the inductor ripple current.  
Choose the inductor ripple current to be  
approximately 30% of the maximum load  
current. The maximum inductor peak current is:  
Choose R1 around 40kfor VOUT>1.2V, R2 is  
then given by:  
R1  
ΔIL  
R2 =  
IL(MAX) = ILOAD  
+
V
OUT  
2
1  
0.804V  
Use a larger inductor for improved efficiency  
under light-load conditions—below 100mA.  
The T-Type network is recommended highly  
(see Figure 7)  
Selecting the Input Capacitor  
The input current to the step-down converter is  
discontinuous, therefore requires a capacitor is  
to supply the AC current to the step-down  
converter while maintaining the DC input  
voltage. Use low ESR capacitors for the best  
performance. Use ceramic capacitors with X5R  
or X7R dielectrics for best results because of  
their low ESR and small temperature  
coefficients. For most applications, use a 22µF  
capacitor.  
Figure 7. T-Type Network  
Table 1 lists the recommended resistors and  
compensation values for common output  
voltages.  
Table 1: Resistor Selection for Common Output  
Voltages(8)  
Since C1 absorbs the input switching current, it  
requires an adequate ripple current rating. The  
RMS current in the input capacitor can be  
estimated by:  
VOUT  
R1 (k) R2 (k) Rt (k)  
(V)  
1
20.5  
30.1  
40.2  
40.2  
40.2  
40.2  
84.5  
61.9  
32.4  
19.1  
13  
34  
24  
15  
6.8  
5.6  
2
1.2  
1.8  
2.5  
3.3  
5
VOUT  
VIN  
VOUT  
VIN  
IC1 = ILOAD  
×
× 1−  
The worst case condition occurs at VIN = 2VOUT  
,
where:  
7.68  
ILOAD  
Notes:  
IC1  
=
8) The recommended parameters are based on a 800kHz  
switching frequency; a different input voltage, output-inductor  
value, and output-capacitor value may affect the selection of  
R1, R2, and Rt. For additional component parameters, please  
refer to the “Typical Application Circuits” section on pages 17  
and 18.  
2
For simplification, choose an input capacitor  
with an RMS current rating greater than half of  
the maximum load current.  
Selecting the Inductor  
The input capacitor can be electrolytic, tantalum  
or ceramic. When using electrolytic or tantalum  
capacitors, add a small, high quality ceramic  
capacitor (e.g. 0.1μF) placed as close to the IC  
as possible. When using ceramic capacitors,  
make sure that they have enough capacitance  
to provide sufficient charge to prevent  
excessive voltage ripple at input. The input  
Use a 1µH-to-22µH inductor with a DC current  
rating of at least 25% percent higher than the  
maximum load current for most applications.  
For highest efficiency, use an inductor with a  
DC resistance less than 15m. For most  
designs, the inductance value can be derived  
from the following equation.  
MP2234S Rev.1.0  
4/3/2015  
www.MonolithicPower.com  
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14  
MP2234S – SYNCHRONOUS STEP-DOWN CONVERTER  
z VOUT is 5V or 3.3V; and  
VOUT  
voltage ripple caused by capacitance can be  
estimated as:  
z Duty cycle is high: D=  
>65%  
VIN  
ILOAD  
VOUT  
VOUT  
ΔV  
=
×
× 1−  
IN  
If the BST voltage is insufficient, the output-  
ripple voltage may become extremely large  
during a light-load condition. If this occurs, add  
an external BST diode from VCC to BST (see  
Figure 8).  
fS ×C1  
V
IN  
V
IN  
Selecting the Output Capacitor  
The output capacitor (C2) maintains the DC  
output voltage. Use ceramic, tantalum, or low-  
ESR electrolytic capacitors. For best results,  
use low ESR capacitors to keep the output  
voltage ripple low. The output voltage ripple can  
be estimated as:  
MP2234S  
⎞ ⎛  
VOUT  
VOUT  
1
ΔVOUT  
=
× 1−  
× R  
⎟ ⎜  
+
ESR  
fS ×L1  
V
8× fS ×C2  
IN ⎠ ⎝  
Figure 8. Optional External Bootstrap Diode to  
Enhance Efficiency  
Where L1 is the inductor value and RESR is the  
equivalent series resistance (ESR) value of the  
output capacitor.  
The recommended external BST diode is  
IN4148, and the BST capacitor value is 0.1µF  
to 1μF.  
PC Board Layout (9)  
PCB layout is very important to achieve stable  
operation especially for VCC capacitor and  
input capacitor placement. For best results,  
refer to Figure 9 and the guidelines below:  
For ceramic capacitors, the capacitance  
dominates the impedance at the switching  
frequency, and the capacitance causes the  
majority of the output voltage ripple. For  
simplification, the output voltage ripple can be  
estimated as:  
VOUT  
8× fS2 ×L1 ×C2  
VOUT  
ΔVOUT  
=
× 1−  
1. Use large ground plane directly connect to  
GND pin. Add vias near the GND pin if  
bottom layer is ground plane.  
V
IN  
For tantalum or electrolytic capacitors, the ESR  
dominates the impedance at the switching  
frequency. For simplification, the output ripple  
can be approximated as:  
2. Place the VCC capacitor to VCC pin and  
GND pin as close as possible. Make the  
trace length of VCC pin-VCC capacitor  
anode-VCC capacitor cathode-chip GND  
pin as short as possible.  
VOUT  
VOUT  
ΔVOUT  
=
× 1−  
×RESR  
fS ×L1  
V
IN  
3. Place the ceramic input capacitor close to  
IN and GND pins. Keep the connection of  
input capacitor and IN pin as short and  
wide as possible.  
The characteristics of the output capacitor also  
affect the stability of the regulation system. The  
MP2234S can be optimized for a wide range of  
capacitance and ESR values.  
4. Route SW, BST away from sensitive  
analog areas such as FB.  
External Bootstrap Diode  
In particular conditions, BST voltage may  
become insufficient (see equations below).  
During these conditions an external bootstrap  
diode can enhance the efficiency of the  
regulator and avoid insufficient BST voltage at  
light-load PFM operation. Insufficient BST  
voltage is more likely to occur during either of  
the following conditions:  
5. Place the T-type feedback resistor R5 close  
to chip to ensure the trace which connects  
to FB pin as short as possible.  
Notes:  
9) The recommended layout is based on the Figure 10 Typical  
Application circuit on page 17.  
MP2234S Rev.1.0  
4/3/2015  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2015 MPS. All Rights Reserved.  
15  
MP2234S – SYNCHRONOUS STEP-DOWN CONVERTER  
GND  
C6  
R1  
C4  
SW  
C3  
C1A  
L1  
R4  
C1  
Vin  
C 2  
Vout  
C2A  
GND  
Top Layer  
GND  
EN/SYNC  
Vout Sense  
Bottom Layer  
Figure 9. Recommended PCB Layout  
Design Example  
Below is a design example following the  
application guidelines for the specifications:  
Table 2: Design Example  
VIN  
VOUT  
IOUT  
12V  
3.3V  
2A  
The detailed application schematic is shown in  
Figure 11. The typical performance and circuit  
waveforms have been shown in the Typical  
Performance Characteristics section. For more  
device applications, please refer to the related  
Evaluation Board Datasheets.  
MP2234S Rev.1.0  
4/3/2015  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2015 MPS. All Rights Reserved.  
16  
MP2234S – SYNCHRONOUS STEP-DOWN CONVERTER  
TYPICAL APPLICATION CIRCUITS  
Figure 10. 12VIN, 5V/2A Output  
Figure 11. 12VIN, 3.3V/2A Output  
Figure 12. 12VIN, 2.5V/2A Output  
MP2234S Rev.1.0  
4/3/2015  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2015 MPS. All Rights Reserved.  
17  
MP2234S – SYNCHRONOUS STEP-DOWN CONVERTER  
Figure 13. 12VIN, 1.8V/2A Output  
Figure 14. 12VIN, 1.2V/2A Output  
Figure 15. 12VIN, 1V/2A Output  
MP2234S Rev.1.0  
4/3/2015  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2015 MPS. All Rights Reserved.  
18  
MP2234S – SYNCHRONOUS STEP-DOWN CONVERTER  
PACKAGE INFORMATION  
TSOT23-8  
See note 7  
EXAMPLE  
TOP MARK  
IAAAA  
PIN 1 ID  
RECOMMENDED LAND PATTERN  
TOP VIEW  
SEATING PLANE  
SEE DETAIL ''A''  
FRONT VIEW  
SIDE VIEW  
NOTE:  
1) ALL DIMENSIONS ARE IN MILLIMETERS.  
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD  
FLASH, PROTRUSION OR GATE BURR.  
3) PACKAGE WIDTH DOES NOT INCLUDE  
INTERLEAD FLASH OR PROTRUSION.  
4) LEAD COPLANARITY (BOTTOM OF LEADS  
AFTER FORMING) SHALL BE 0.10 MILLIMETERS  
MAX.  
DETAIL ''A''  
5) JEDEC REFERENCE IS MO-193, VARIATION BA.  
6) DRAWING IS NOT TO SCALE.  
7) PIN 1 IS LOWER LEFT PIN WHEN READING TOP  
MARK FROM LEFT TO RIGHT, (SEE EXAMPLE TOP  
MARK)  
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third  
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not  
assume any legal responsibility for any said applications.  
MP2234S Rev.1.0  
4/3/2015  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2015 MPS. All Rights Reserved.  
19  

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