MP2108DQ-LF [MPS]
Switching Regulator, Current-mode, 3.5A, 920kHz Switching Freq-Max, PDSO10, 3 X 3 MM, ROHS COMPLIANT, MO-229VEED-5, QFN-10;
| 型号： | MP2108DQ-LF |
| 厂家： | 
MONOLITHIC POWER SYSTEMS |
| 描述： | Switching Regulator, Current-mode, 3.5A, 920kHz Switching Freq-Max, PDSO10, 3 X 3 MM, ROHS COMPLIANT, MO-229VEED-5, QFN-10 开关 光电二极管 |
| 文件： | 总13页 (文件大小：454K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MP2108
2A, 6V, 740KHz
Synchronous Buck Converter
The Future of Analog IC Technology
DESCRIPTION
FEATURES
The MP2108 is a 2A, 740KHz synchronous
buck converter designed for low voltage
applications requiring high efficiency. It is
capable of providing output voltages as low as
0.9V, and integrates top and bottom switches to
minimize power loss and component count. The
740KHz switching frequency allows for small
filtering components, further reducing the
solution size.
•
•
•
•
•
•
•
•
•
•
2A Output Current
Synchronous Rectification
Internal 160mΩ and 190mΩ Power Switches
Input Range of 2.6V to 6V
Over 95% Efficiency
Under Voltage Lockout Protection
Soft-Start Operation
Thermal Shutdown
Internal Current Limit (Source & Sink)
Tiny 10-Pin MSOP and 3x3 QFN Packages
The MP2108 includes cycle-by-cycle current
limiting and under voltage lockout. Internal
power switches, combined with the tiny 10-pin
MSOP or 3mm x 3mm QFN packages, provide
a solution requiring a minimum of board space.
QFN package is recommended if output current
is higher than 1.5A.
APPLICATIONS
•
•
•
•
SOHO Routers, PCMCIA Cards, Mini PCI
Handheld Computers, PDAs
Cell phones, Digital Still and Video Cameras
Small LCD Displays
EVALUATION BOARD REFERENCE
“MPS” and “The Future of Analog IC Technology” are Registered Trademarks of
Monolithic Power Systems, Inc.
Board Number
Dimensions
EV2108DQ/DK-00A
2.5”X x 2.0”Y x 0.5”Z
TYPICAL APPLICATION
100
V
=2.5V
OUT
90
80
70
60
50
40
30
20
10
0
2
1
V
=1.2V
OUT
VIN
10
BST
3
7
RUN
LX
6
SS
8
COMP
FB
VREF SGND PGND
9
5
4
V
=3.3V
IN
0.01
0.1
1
10
LOAD CURRENT (A)
MP2108 Rev 1.2
1/22/2010
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MP2108 – 2A, 6V, 740KHz SYNCHRONOUS BUCK CONVERTER
PACKAGE REFERENCE
TOP VIEW
TOP VIEW
BST
VIN
1
2
3
4
5
10 RUN
BST
VIN
1
2
3
4
5
10
9
RUN
VREF
COMP
FB
9
8
7
6
VREF
COMP
FB
LX
LX
8
PGND
SGND
7
PGND
SGND
6
SS
SS
EXPOSED PAD
ON BACKSIDE
Part Number**
Package***
Temperature
Part Number*
Package
Temperature
QFN10
(3mm x 3mm)
MP2108DQ
MP2108DK
MSOP10
–40°C to +85°C
–40°C to +85°C
For Tape & Reel, add suffix –Z (eg. MP2108DQ–Z)
For RoHS compliant packaging, add suffix –LF (eg.
MP2108DQ–LF–Z)
For Tape & Reel, add suffix –Z (eg. MP2108DK–Z)
For RoHS compliant packaging, add suffix –LF (eg.
MP2108DK–LF–Z)
**
*
*** Recommended for output currents higher than 1.5A
ABSOLUTE MAXIMUM RATINGS (1)
Input Supply Voltage VIN ............................. 6.5V
LX Voltage VLX ..................... –0.3V to VIN + 0.3V
BST to LX Voltage .........................–0.3V to +6V
Voltage on All Other Pins...............–0.3V to +6V
Storage Temperature...............–55°C to +150°C
Recommended Operating Conditions (2)
Input Supply Voltage VIN ...................... 2.6V to 6
Output Voltage VOUT...........................0.9V to 5V
Operating Temperature..............–40°C to +85°C
Thermal Resistance (3)
MSOP10................................150..... 65... °C/W
QFN10 (3mm x 3mm).............50...... 12... °C/W
θJA
θJC
Notes:
1) Exceeding these ratings may damage the device.
2) The device is not guaranteed to function outside of its
operating conditions.
3) Measured on approximately 1” square of 1 oz copper.
ELECTRICAL CHARACTERISTICS
VIN = 5.0V, TA = +25°C, unless otherwise noted.
Parameter
Symbol Condition
Min
Typ
Max
Units
Input Voltage Range
Input Undervoltage Lockout
VIN
2.6
6
V
V
2.2
Input Undervoltage Lockout
Hysteresis
100
mV
Shutdown Supply Current
Operating Supply Current
VREF Voltage
RUN Input Low Voltage
RUN Input High Voltage
RUN Hysteresis
VRUN ≤ 0.3V
VRUN > 2V, VFB = 1.1V
VIN = 2.6V to 6V
0.5
1.2
2.4
1.0
1.8
µA
mA
V
V
V
VREF
VIL
VHL
0.4
1
1.5
100
mV
µA
RUN Input Bias Current
MP2108 Rev 1.2
1/22/2010
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MP2108 – 2A, 6V, 740KHz SYNCHRONOUS BUCK CONVERTER
ELECTRICAL CHARACTERISTICS (continued)
VIN = 5.0V, TA = +25°C, unless otherwise noted.
Parameter
Symbol Condition
Min
Typ
740
200
Max
Units
Oscillator
Switching Frequency
Maximum Duty Cycle
Minimum On Time
Error Amplifier
fSW
620
85
920
KHz
%
ns
DMAX VFB = 0.7V
TON
Voltage Gain
AVEA
GEA
400
450
±40
895
–100
V/V
µA/V
µA
mV
nA
Transconductance
COMP Maximum Output Current
FB Regulation Voltage
FB Input Bias Current
Soft-Start
VFB
IFB
875
915
VFB = 0.9V
Soft-Start Current
Output Switch On-Resistance
ISS
2
µA
VIN = 5V
VIN = 3V
VIN = 5V
VIN = 3V
190
280
160
230
3.5
mΩ
mΩ
mΩ
mΩ
A
Switch On Resistance
Synchronous Rectifier On Resistance
Switch Current Limit (Source)
2.5
Synchronous Rectifier Current Limit
(Sink)
350
160
mA
Thermal Shutdown
°C
PIN FUNCTIONS
Pin #
Name
Description
Power Switch Boost. BST powers the gate of the high-side N-Channel power MOSFET
switch. Connect a 10nF or greater capacitor between BST and LX.
1
BST
Internal Power Input. VIN supplies the power to the MP2108 through the internal LDO
regulator. Bypass VIN to PGND with a 10µF or greater capacitor. Connect VIN to the input
source voltage.
Output Switching Node. LX is the source of the high-side N-Channel switch and the drain
of the low-side N-Channel switch. Connect the output LC filter between LX and the output.
2
3
VIN
LX
Power Ground. PGND is the source of the N-Channel MOSFET synchronous rectifier.
Connect PGND to SGND as close to the MP2108 as possible.
SGND Signal Ground.
4
5
PGND
Soft-Start Input. Place a capacitor from SS to SGND to set the soft-start period. The
6
SS
MP2108 sources 2µA from SS to the soft-start capacitor at start-up. As the voltage at SS
rises, the feedback threshold voltage increases to limit inrush current at startup.
Feedback Input. FB is the inverting input of the internal error amplifier. Connect a resistive
voltage divider from the output voltage to FB to set the output voltage.
Compensation Node. COMP is the output of the error amplifier. Connect a series RC
network to compensate the regulation control loop.
Internal 2.4V Regulator Bypass. Connect a 10nF capacitor between VREF and SGND to
bypass the internal regulator. Do not apply any load to VREF.
On/Off Control Input. Drive RUN high to turn on the MP2108, drive RUN low to turn the
7
8
FB
COMP
VREF
RUN
9
10
MP2108 off. For automatic startup, connect RUN to VIN via a 100kΩ pull-up resistor.
MP2108 Rev 1.2
1/22/2010
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MP2108 – 2A, 6V, 740KHz SYNCHRONOUS BUCK CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS
Circuit of Figure 2, VIN = 5V, VOUT = 2.5V, L1 = 5µH, C1 = 10µF, C2 = 22µF, TA = +25°C, unless
otherwise noted.
Efficiency vs
Load Current
Peak Current vs
Duty Cycle
100
90
80
70
60
50
40
30
20
10
0
5.0
4.5
4.0
3.5
3.0
2.5
2.0
V
=3.3V
OUT
V
=1.2V
OUT
V
=2.5V
OUT
V
=5V
IN
0.01
0.1
1
10
0
20
40
60
100
80
LOAD CURRENT (A)
DUTY CYCLE (%)
Feedback Voltage vs
Die Temperature
Switching Frequency vs
Die Temperature
830
810
790
770
750
730
710
690
670
650
630
0.904
0.902
0.900
0.898
0.896
0.894
0.892
0.890
0.888
0.886
0.884
-50 -25
0
25 50 75 100 125
-50 -25
0
25 50 75 100 125 150
DIE TEMPERATURE (OC)
DIE TEMPERATURE (OC)
MP2108 Rev 1.2
1/22/2010
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MP2108 – 2A, 6V, 740KHz SYNCHRONOUS BUCK CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Circuit of Figure 2, VIN = 5V, VOUT = 2.5V, L1 = 5µH, C1 = 10µF, C2 = 22µF, TA = +25°C, unless
otherwise noted.
Load Transient
Steady State Operation
Steady State Operation
0.5A-1A Step Resistive Load
Full Load
No Load
V
OUT
AC Coupled
10mV/div.
V
OUT
AC Coupled
10mV/div.
V
OUT
AC Coupled
200mV/div.
I
L
1A/div.
I
L
2A/div.
I
L
V
1A/div.
SW
V
SW
5V/div.
5V/div.
400ns/div.
400ns/div.
Start-up through Enable
Shut-down through Enable
Start-up through Enable
Full Load
No Load
No Load
V
V
V
OUT
OUT
OUT
2V/div.
2V/div.
1V/div.
V
V
V
EN
EN
EN
2V/div.
5V/div.
2V/div.
1ms/div.
100ms/div.
400ms/div.
Shut-down through Enable
Full Load
V
OUT
2V/div.
V
EN
2V/div.
200ms/div.
MP2108 Rev 1.2
1/22/2010
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MP2108 – 2A, 6V, 740KHz SYNCHRONOUS BUCK CONVERTER
OPERATION
V
IN
2.6V to 6V
V
IN
2
C1
CURRENT
SENSE
AMPLIFIER
ENABLE
CKT & LDO
REGULATOR
GATE
DRIVE
REGULATOR
RUN
Vdr
OFF ON
+
--
10
BST
LX
V
REF
2.4V
PWM
1
3
COMPARATOR
9
C6
C7
+
--
L1
V
OUT
CONTROL
LOGIC
Vdr
C2
720KHz
OSCILLATOR
RAMP
CURRENT
+
LIMIT
--
COMPARATOR
V
BP
R2
UVLO &
THERMAL
SHUTDOWN
+
--
PGND
FB
SS
4
7
6
C5
--
--
+
GM
ERROR
AMPLIFIER
V
FB
0.9V
CURRENT
LIMIT
THRESHOLD
R1
5
8
COMP
R3
C3
SGND
C4
Figure 1—Functional Block Diagram
MP2108 Rev 1.2
1/22/2010
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MP2108 – 2A, 6V, 740KHz SYNCHRONOUS BUCK CONVERTER
The MP2108 measures the output voltage
The average inductor current is controlled by
the voltage at COMP, which in turn, is
controlled by the output voltage. Thus the
output voltage controls the inductor current to
satisfy the load.
through an external resistive voltage divider and
compares it to the internal 0.9V reference to
generate the error voltage at COMP. The
current-mode regulator uses the voltage at
COMP and compares it to the inductor current
to regulate the output voltage. The use of
current-mode regulation improves transient
response and control loop stability.
Since the high-side N-Channel MOSFET
requires voltage above VIN to drive its gate, a
bootstrap capacitor from LX to BST is required
to drive the high-side MOSFET gate. When LX
is driven low (through the low-side MOSFET),
the BST capacitor is internally charged. The
voltage at BST is applied to the high-side
MOSFET gate to turn it on. Voltage is
maintained until the high-side MOSFET is
turned off and the low-side MOSFET is turned
on, and the cycle repeats. Connect a 10nF or
greater capacitor from BST to SW to drive the
high-side MOSFET gate.
At the beginning of each cycle, the high-side
N-Channel MOSFET is turned on, forcing the
inductor current to rise. The current at the drain
of the high-side MOSFET is internally
measured and converted to a voltage by the
current sense amplifier.
That voltage is compared to the error voltage at
COMP. When the inductor current rises
sufficiently, the PWM comparator turns off the
high-side switch and turns on the low-side
switch; forcing the inductor current to decrease.
APPLICATION INFORMATION
2
1
VIN
BST
3
10
RUN
SS
LX
6
8
7
COMP
FB
VREF SGND PGND
9
5
4
Figure 2—Typical Application Circuit
Internal Low-Dropout Regulator
Soft-Start
The internal power to the MP2108 is supplied
from the input voltage (VIN) through an internal
2.4V low-dropout linear regulator, whose output
is VREF. Bypass VREF to SGND with a 10nF
or greater capacitor for proper operation. The
internal regulator can not supply more current
than is required to operate the MP2108.
Therefore, do not apply any external load to
VREF.
The MP2108 includes a soft-start timer that
slowly ramps the output voltage at startup to
prevent excessive current at the input.
When power is applied to the MP2108, and
RUN is asserted. A 2µA internal current source
charges the external capacitor at SS. As the
capacitor charges, the voltage at SS rises. The
MP2108 internally limits the feedback threshold
voltage at FB to that of the voltage at SS. This
forces the output voltage to rise at the same
MP2108 Rev 1.2
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MP2108 – 2A, 6V, 740KHz SYNCHRONOUS BUCK CONVERTER
rate as the voltage at SS, forcing a linear
output voltage ramp from 0V to the desired
regulation voltage during soft-start.
type. All ceramic capacitors should be placed
close to the IC. For most applications, a 10µF
ceramic capacitor will work.
The soft-start period is determined by the
equation:
Selecting the Output Capacitor
The output capacitor (C2) is required to
maintain the DC output voltage. Low ESR
capacitors are preferred to keep the output
voltage ripple to a minimum. The characteristics
of the output capacitor also affect the stability of
the regulation control system. Ceramic,
tantalum, or low ESR electrolytic capacitors are
recommended.
tSS = 0.45 × C5
Where C5 (in nF) is the soft-start capacitor from
SS to GND, and tSS (in ms) is the soft-start
period. Determine the capacitor required for a
given soft-start period by the equation:
C5 = 2.22× tSS
The output voltage ripple is:
Use values for C5 between 10nF and 22nF to
set the soft-start period between 4ms and 10ms.
VRIPPLE
=
⎛
⎞
⎟
⎟
⎠
⎛
⎜
⎝
⎞
⎟
⎟
⎠
VOUT
VOUT
VIN
1
Setting the Output Voltage (see Figure 2)
Set the output voltage by selecting the resistive
voltage divider ratio. The voltage divider drops
the output voltage to the 0.9V feedback voltage.
Use 10kꢀ for the low-side resistor of the
voltage divider. Determine the high-side resistor
by the equation:
⎜
⎜
× 1−
× RESR
+
⎜
fSW × L
8 × fSW × C2
⎝
Where VRIPPLE is the output voltage ripple, fSW is
the switching frequency, VIN is the input voltage
and RESR is the equivalent series resistance of
the output capacitors.
Choose an output capacitor to satisfy the output
ripple requirements of the design. A 22µF
ceramic capacitor is suitable for most
applications.
V
⎛
⎞
OUT
R2 = ⎜
− 1⎟ × R1
⎜
⎟
0.9V
⎝
⎠
Where R2 is the high-side resistor, R1 is the
low-side resistor and VOUT is the output voltage.
Selecting the Inductor
The inductor is required to supply constant
current to the output load while being driven by
the switched input voltage. A larger value
inductor results in less ripple current that in turn
results in lower output ripple voltage. However,
the larger value inductor is likely to have a
larger physical size and higher series
resistance. Choose an inductor that does not
saturate under the worst-case load conditions.
A good rule for determining the inductance is to
allow peak-to-peak ripple current to be
approximately 30% to 40% of the maximum
load current. Make sure that the peak inductor
current (the load current plus half the peak-to-
peak inductor ripple current) is below 2.5A to
prevent loss of regulation due to the current
limit.
Selecting the Input Capacitor
The input current to the step-down converter is
discontinuous, so a capacitor is required to
supply the AC current to the step-down
converter while maintaining the DC input
voltage. A low ESR capacitor is required to
keep the noise at the IC to a minimum. Ceramic
capacitors are preferred, but tantalum or low
ESR electrolytic capacitors are also an option.
The capacitor can be electrolytic, tantalum or
ceramic. Because it absorbs the input switching
current, it must have an adequate ripple current
rating. Use a capacitor with RMS current rating
greater than 1/2 of the DC load current.
For stable operation, place the input capacitor
as close to the IC as possible. A smaller high
quality 0.1µF ceramic capacitor may be placed
closer to the IC with the larger capacitor placed
further away.
If using this technique, it is recommended that
the larger capacitor be a tantalum or electrolytic
MP2108 Rev 1.2
1/22/2010
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MP2108 – 2A, 6V, 740KHz SYNCHRONOUS BUCK CONVERTER
Calculate the required inductance value by the
equation:
If large value capacitors with relatively high
equivalent-series-resistance (ESR) are used,
the zero due to the capacitance and ESR of the
output capacitor can be compensated by a third
pole set by R3 and C4. The pole is:
VOUT
×
(
VIN − VOUT
)
L =
VIN × fSW × ∆I
Where ∆I is the peak-to-peak inductor ripple
current. It is recommended to choose ∆I to be
30%~40% of the maximum load current.
1
fP3
=
2π ×R3× C4
The system crossover frequency (the frequency
where the loop gain drops to 1dB or 0dB) is
important. Set the crossover frequency below
one tenth of the switching frequency to insure
stable operation. Lower crossover frequencies
result in slower response and worse transient
load recovery. Higher crossover frequencies
degrade the phase and/or gain margins and
can result in instability.
Compensation
The system stability is controlled through the
COMP pin. COMP is the output of the internal
transconductance error amplifier. A series
capacitor-resistor combination sets a pole-zero
combination to control the characteristics of the
control system.
The DC loop gain is:
Table 1—Compensation Values for Typical
Output Voltage/Capacitor Combinations
⎛
⎜
⎜
⎝
⎞
⎟
⎟
⎠
VFB
AVDC
=
× AVEA × GCS ×RLOAD
VOUT
VOUT
C2
22µF
R3
C3
C4
R2
R1
Where VFB is the feedback voltage, 0.9V, AVEA
is the transconductance error amplifier voltage
gain, 400 V/V and GCS is the current sense
transconductance, (roughly the output current
divided by the voltage at COMP), 4.5A/V.
1.8V
6.8kꢀ 3.3nF None 10kꢀ 10kꢀ
9.1kꢀ 2.2nF None 17.8kꢀ 10kꢀ
12kꢀ 1.8nF None 27kꢀ 10kꢀ
Ceramic
22µF
Ceramic
2.5V
3.3V
22µF
Ceramic
RLOAD is the load resistance:
VOUT
47µF
Tantalum
(300mꢀ)
RLOAD
=
IOUT
1.8V
13kꢀ 2nF
1nF
10kꢀ 10kꢀ
Where IOUT is the output load current.
47µF
The system has 2 poles of importance, one is
due to the compensation capacitor (C3), and
the other is due to the load resistance and the
output capacitor (C2), where:
2.5V Tantalum 18kꢀ 1.2nF 750pF 17.8kꢀ 10kꢀ
(300mꢀ)
47µF
3.3V Tantalum 24kꢀ 1nF 560pF 27kꢀ 10kꢀ
(300mꢀ)
GEA
fP1
=
47µF
Ceramic
2π × AVEA × C3
1V
6.98kꢀ 3.3nF None 1.18kꢀ 10kꢀ
6.98kꢀ 3.3nF None 3.4kꢀ 10kꢀ
P1 is the first pole, and GEA is the error amplifier
transconductance (450µA/V) and
47µF
Ceramic
1.2V
1
fP2
=
Choosing the Compensation Components
The values of the compensation components
listed in Table 1 yields a stable control loop for
the given output voltage and capacitor. To
optimize the compensation components for
conditions not listed in Table 1, use the
following procedure.
2π×RLOAD × C2
The system has one zero of importance, due to
the compensation capacitor (C3) and the
compensation resistor (R3). The zero is:
1
fZ1
=
2π ×R3× C3
MP2108 Rev 1.2
1/22/2010
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MP2108 – 2A, 6V, 740KHz SYNCHRONOUS BUCK CONVERTER
Choose the compensation resistor to set the
External Bootstrap Diode
desired crossover frequency. Determine the
value by the following equation:
An external bootstrap diode may enhance the
efficiency of the regulator, the applicable
conditions of external BST diode are:
z VOUT is 5V or 3.3V; and
2π × C2× fC VOUT
R3 =
×
GEA × GCS
VFB
VOUT
z Duty cycle is high: D=
>65%
VIN
Where GEA is the EA transconductance
(450µA/V) and fC is the desired crossover
frequency (preferably 33KHz).
In these cases, an external BST diode is
recommended from the output of the voltage
regulator to BST pin, as shown in Fig.3
Choose the compensation capacitor to set the
zero below one fourth of the crossover
frequency. Determine the value by the following
equation:
External BST Diode
IN4148
BST
CBST
MP2108
2
C3 >
5V or 3.3V
SW
π × R3 × fC
L
COUT
Determine if the second compensation
capacitor, C4 is required. It is required if the
ESR zero of the output capacitor happens at
less than half of the switching frequency or:
Figure 3—Add Optional External Bootstrap
Diode to Enhance Efficiency
The recommended external BST diode is
IN4148, and the BST cap is 0.1~1µF.
π × C2× RESR × fSW > 1
where RESR is the equivalent series resistance
of the output capacitor.
PCB Layout Guide
PCB layout is very important to achieve stable
operation. It is highly recommended to duplicate
EVB layout for optimum performance.
The second compensation capcacitor is
determined by the equation:
C2×RESR(max)
If change is necessary, please follow these
guidelines and take Figure 4 for reference.
C4 =
R3
Where RESR(MAX) is the maximum ESR of the
output capacitor.
1) Keep the path of switching current short
and minimize the loop area formed by Input
cap, high-side MOSFET and low-side
MOSFET.
2) Bypass ceramic capacitors are suggested
to be put close to the Vin Pin.
3) Ensure all feedback connections are short
and direct. Place the feedback resistors
and compensation components as close to
the chip as possible.
4) Route SW away from sensitive analog
areas such as FB.
5) Connect IN, SW, and especially GND
respectively to a large copper area to cool
the chip to improve thermal performance
and long-term reliability.
MP2108 Rev 1.2
1/22/2010
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2010 MPS. All Rights Reserved.
10
MP2108 – 2A, 6V, 740KHz SYNCHRONOUS BUCK CONVERTER
L1
CBST
VIN
VOUT
COUT
CIN
GND
GND
R4
Css
C1
R1
R2
R3
C2
Top Layer
GND
Bottom Layer
Figure 4—PCB Layout (Double Layers)
MP2108 Rev 1.2
1/22/2010
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2010 MPS. All Rights Reserved.
11
MP2108 – 2A, 6V, 740KHz SYNCHRONOUS BUCK CONVERTER
PACKAGE INFORMATION
MSOP10
MP2108 Rev 1.2
1/22/2010
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2010 MPS. All Rights Reserved.
12
MP2108 – 2A, 6V, 740KHz SYNCHRONOUS BUCK CONVERTER
QFN10 (3mm x 3mm)
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MP2108 Rev. 1.2
1/22/2010
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2010 MPS. All Rights Reserved.
13
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