SN74LS85N [MOTOROLA]
4-BIT MAGNITUDE COMPARATOR; 4位数值比较器
| 型号： | SN74LS85N |
| 厂家： | 
MOTOROLA |
| 描述： | 4-BIT MAGNITUDE COMPARATOR |
| 文件： | 总4页 (文件大小：106K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN54/74LS85
4-BIT MAGNITUDE
COMPARATOR
The SN54/74LS85 is a 4-Bit Magnitude Camparator which compares two
4-bitwords(A,B),eachwordhavingfourParallelInputs(A –A , B –B );A ,
0
3
0
3
3
B
being the most significant inputs. Operation is not restricted to binary
4-BIT MAGNITUDE
COMPARATOR
3
codes, the device will work with any monotonic code. Three Outputs are
provided: “A greater than B” (O ), “A less than B” (O ), “A equal to B”
A>B A<B
LOW POWER SCHOTTKY
(O
). ThreeExpanderInputs, I , allowcascadingwithout
, I
, I
A=B
A>B A<B A=B
external gates. For proper compare operation, the Expander Inputs to the
leastsignificantpositionmustbeconnectedasfollows:I =I =L,I
= H. For serial (ripple) expansion, the O
connected respectively to the I
significant comparator, as shown in Figure 1. Refer to Applications section of
data sheet for high speed method of comparing large words.
A<B A>B
A=B
Inputs of the next most
A=B
, O
and O Outputs are
A>B A<B
, I , and I
A>B A<B A=B
J SUFFIX
CERAMIC
CASE 620-09
The Truth Table on the following page describes the operation of the
SN54/74LS85underallpossiblelogicconditions. Theupper11linesdescribe
the normal operation under all conditions that will occur in a single device or
in a series expansion scheme. The lower five lines describe the operation
under abnormal conditions on the cascading inputs. These conditions occur
when the parallel expansion technique is used.
16
1
N SUFFIX
PLASTIC
CASE 648-08
• Easily Expandable
• Binary or BCD Comparison
16
• O
, O
, and O Outputs Available
A>B A<B
A=B
1
CONNECTION DIAGRAM DIP (TOP VIEW)
D SUFFIX
SOIC
CASE 751B-03
V
B
A
A
B
A
B
0
A
CC
16
2
2
1
1
0
3
16
15
14
13
12
11
10
9
1
NOTE:
The Flatpak version has the
same pinouts (Connection
Diagram) as the Dual In-Line
Package.
ORDERING INFORMATION
SN54LSXXJ
SN74LSXXN
SN74LSXXD
Ceramic
Plastic
SOIC
1
2
3
4
5
6
8
7
O
O O
A>B A=B
I
I
I
GND
B
3
A<B
A<B A=B
A>B
LOGIC SYMBOL
PIN NAMES
LOADING (Note a)
10 12 13 15 9 11 14
1
HIGH
LOW
A
A
A
A
B
B
B
B
3
0
1
2
3
0
1
2
A –A , B –B
Parallel Inputs
A = B Expander Inputs
A < B, A > B, Expander Inputs
A Greater Than B Output (Note b)
B Greater Than A Output (Note b)
A Equal to B Output (Note b)
1.5 U.L.
1.5 U.L.
0.5 U.L.
10 U.L.
10 U.L.
10 U.L.
0.75 U.L.
0.75 U.L.
0.25 U.L.
5 (2.5) U.L.
5 (2.5) U.L.
5 (2.5) U.L.
4
I
I
I
O
5
7
6
0
3
0
3
A>B
A<B
A=B
A>B
A<B
A=B
I
I
O
O
2
3
A=B
A<B A>B
, I
O
O
O
A>B
A<B
A=B
V
= PIN 16
CC
GND = PIN 8
NOTES:
a) 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW.
b) The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74)
Temperature Ranges.
FAST AND LS TTL DATA
5-84
SN54/74LS85
LOGIC DIAGRAM
(15)
(1)
A3
B3
(5)
(6)
O
A>B
A=B
(13)
(14)
(2)
(3)
(4)
A2
B2
A<B
A=B
A>B
O
(12)
(11)
A1
B1
(7)
O
A<B
(10)
(9)
A0
B0
TRUTH TABLE
CASCADING
INPUTS
COMPARING INPUTS
OUTPUTS
A ,B
A ,B
2
A ,B
1
A ,B
0
I
I
I
O
O
O
3
3
2
1
0
A>B
X
X
X
X
X
X
X
X
H
L
X
H
L
A<B
X
X
X
X
X
X
X
X
L
H
X
H
L
A=B
X
X
X
X
X
X
X
X
L
L
H
L
L
A>B
H
L
H
L
H
L
H
L
H
L
L
L
H
A<B
L
H
L
H
L
H
L
H
L
H
L
L
H
A=B
L
L
L
L
L
L
L
L
L
L
H
L
L
A >B
X
X
X
X
X
X
X
X
X
X
X
X
3
3
3
3
3
3
3
3
3
3
3
3
3
3
A <B
3
A =B
A >B
3
2
2
2
2
2
2
2
2
2
2
2
2
A =B
A <B
3
2
A =B
A =B
A >B
3
2
1
1
1
A =B
A =B
A <B
3
2
1
A =B
A =B
A =B1
A >B
3
2
1
0
0
0
0
0
0
0
0
A =B
A =B
A =B
A <B
3
2
1
1
1
1
1
1
1
0
A =B
A =B
A =B
A =B
3
2
1
0
A =B
A =B
A =B
A =B
3
2
1
0
A =B
A =B
A =B
A =B
3
2
1
0
H = HIGH Level
L = LOW Level
X = IMMATERIAL
A =B
A =B
A =B
A =B
3
2
1
0
A =B
3
A =B
2
A =B
1
A =B
0
GUARANTEED OPERATING RANGES
Symbol
Parameter
Min
Typ
Max
Unit
V
CC
Supply Voltage
54
74
4.5
4.75
5.0
5.0
5.5
5.25
V
T
A
Operating Ambient Temperature Range
54
74
–55
0
25
25
125
70
°C
I
I
Output Current — High
Output Current — Low
54, 74
–0.4
mA
mA
OH
54
74
4.0
8.0
OL
FAST AND LS TTL DATA
5-85
SN54/74LS85
A
A
A
A
A
A
A
A
B
B
B
B
B
B
B
0
0
1
1
2
2
3
3
0
0
1
1
2
2
3
B
A
A
A
A
B
B
B
B
3
3
0
1
2
3
0
1
2
I
O
O
O
L
I
I
I
A > B
A > B
A < B
A = B
A > B
A > B
A > B
A < B
A = B
I
I
O
O
L
A < B
A = B
A < B
A = B
SN54/74LS85 A < B
SN54/74LS85
O
H
A = B
L = LOW LEVEL
H = HIGH LEVEL
Figure 1. Comparing Two n-Bit Words
APPLICATIONS
Figure 2 shows a high speed method of comparing two 24-bit words with only two levels of device delay. With the technique
shown in Figure 1, six levels of device delay result when comparing two 24-bit words. The parallel technique can be expanded
to any number of bits, see Table 1.
Table 1
WORD LENGTH
NUMBER OF PKGS.
NOTE:
The SN54/74LS85 can be used as a 5-bit comparator
only when the outputs are used to drive the A –A and
1–4 Bits
5–24 Bits
25–120 Bits
1
0
3
2–6
8–31
B –B inputs of another SN54/74LS85 as shown in
0
3
Figure 2 in positions #1, 2, 3, and 4.
INPUTS
(LSB)
(MSB)
A
I
A
A
A
B
B
B
B
A
A
A
A
A
A
B
B
B
B
B
B
20 21 22 23 20 21 22 23
0
0
1
2
2
3
0
1
2
2
3
3
A
A
B
B
A
A
A
A
B
B
B
B
2 3
1
3
0
1
0
1
2
3
0
1
L
L
I
I
I
O
O
O
O
A
B
A > B
A < B
A = B
A > B
A < B
A = B
A > B
A < B
A = B
A > B
19
19
L
#5
O
I
I
#1
A < B
A = B
H
O
NC
INPUTS
A
A
A
A
A
A
B
B
B
B
B
B
A
A
A
A
B
B
B
B
A
A
A
A
B
B
B
B
5
0
6
7
2
8
5
6
7
2
8
3
10 11 12 13 10 11 12 13
15 16 17 18 15 16 17 18
A
A
B
B
A
A
A
A
B
B
B
B
A
A
A
A
B
B
B
B
2
3
1
3
0
1
0
1
2
3
0
1
2
3
0
1
2
3
0
1
O
A
B
O
O
A
B
I
I
I
I
I
I
A
B
I
I
I
A > B
9
9
A > B
A > B
4
4
A > B
A < B
A = B
A > B
A < B
A = B
14
A > B
A < B
A = B
#4
#3
#2
O
O
O
O
O
O
A < B
A = B
A < B
A = B
A < B
A = B
14
L
L
L
NC
NC
NC
A
A
A
A
B
B
B
B
3
A > B
0
1
2
3
0
1
2
I
I
O
A > B
A < B
O
#6
OUTPUTS
A < B
I
O
A = B
A = B
MSB = MOST SIGNIFICANT BIT
LSB = LEAST SIGNIFICANT BIT
L = LOW LEVEL
H = HIGH LEVEL
NC = NO CONNECTION
Figure 2. Comparison of Two 24-Bit Words
FAST AND LS TTL DATA
5-86
SN54/74LS85
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits
Symbol
Parameter
Input HIGH Voltage
Unit
Test Conditions
Min
Typ
Max
Guaranteed Input HIGH Voltage for
All Inputs
V
2.0
V
IH
54
74
0.7
0.8
Guaranteed Input LOW Voltage for
All Inputs
V
V
V
Input LOW Voltage
V
IL
Input Clamp Diode Voltage
Output HIGH Voltage
–0.65
3.5
–1.5
V
V
V
V
V
= MIN, I = –18 mA
IN
IK
CC
54
74
2.5
2.7
= MIN, I
OH
= MAX, V = V
IN
CC
IH
OH
or V per Truth Table
IL
3.5
0.4
0.5
V
V
= V
CC
MIN,
= V or V
IL IH
54, 74
74
0.25
0.35
V
V
I
= 4.0 mA
= 8.0 mA
CC
IN
OL
OL
V
OL
Output LOW Voltage
I
per Truth Table
Input HIGH Current
A < B, A > B
Other Inputs
20
60
µA
mA
mA
V
CC
V
CC
V
CC
= MAX, V = 2.7 V
IN
I
I
IH
A < B, A > B
Other Inputs
0.1
0.3
= MAX, V = 7.0 V
IN
Input LOW Current
A < B, A > B
Other Inputs
–0.4
–1.2
= MAX, V = 0.4 V
IN
IL
I
I
Output Short Circuit Current (Note 1)
Power Supply Current
–20
–100
20
mA
mA
V
V
= MAX
= MAX
OS
CC
CC
CC
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS (T = 25°C, V
CC
= 5.0 V)
A
Limits
Typ
Symbol
Parameter
Unit
Test Conditions
Min
Max
t
t
Any A or B to A < B, A > B
Any A or B to A = B
A < B or A = B to A > B
A = B to A = B
24
20
36
30
ns
PLH
PHL
t
t
27
23
45
45
ns
ns
ns
ns
PLH
PHL
t
t
14
11
22
17
V
C
= 5.0 V
= 15 pF
PLH
PHL
CC
L
t
t
13
13
20
26
PLH
PHL
t
t
A > B or A = B to A < B
14
11
22
17
PLH
PHL
AC WAVEFORMS
1.3 V
1.3 V
1.3 V
1.3 V
V
V
IN
IN
t
t
t
t
PHL
PHL
PLH
PLH
V
OUT
1.3 V
1.3 V
1.3 V
1.3 V
V
OUT
Figure 3
Figure 4
FAST AND LS TTL DATA
5-87
相关型号：
SN74LS85NP3
Magnitude Comparator, LS Series, 4-Bit, True Output, TTL, PDIP16, PLASTIC, DIP-16
ROCHESTER
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