MRF175LU [MOTOROLA]
N-CHANNEL BROADBAND RF POWER FETs; N沟道宽带射频功率FET型号: | MRF175LU |
厂家: | MOTOROLA |
描述: | N-CHANNEL BROADBAND RF POWER FETs |
文件: | 总8页 (文件大小:142K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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by MRF175LU/D
SEMICONDUCTOR TECHNICAL DATA
The RF MOSFET Line
N–Channel Enhancement–Mode
Designed for broadband commercial and military applications using single
ended circuits at frequencies to 400 MHz. The high power, high gain and
broadband performance of each device makes possible solid state transmitters
for FM broadcast or TV channel frequency bands.
100 W, 28 V, 400 MHz
N–CHANNEL
BROADBAND
•
Guaranteed Performance
RF POWER FETs
MRF175LU @ 28 V, 400 MHz (“U” Suffix)
Output Power — 100 Watts
Power Gain — 10 dB Typ
Efficiency — 55% Typ
MRF175LV @ 28 V, 225 MHz (“V” Suffix)
Output Power — 100 Watts
Power Gain — 14 dB Typ
Efficiency — 65% Typ
D
•
•
•
100% Ruggedness Tested At Rated Output Power
Low Thermal Resistance
Low C
rss
— 20 pF Typ @ V
= 28 V
DS
G
CASE 333–04, STYLE 2
S
MAXIMUM RATINGS
Rating
Symbol
Value
65
Unit
Vdc
Vdc
Adc
Drain–Source Voltage
Gate–Source Voltage
V
DSS
V
GS
±40
13
Drain Current — Continuous
I
D
Total Device Dissipation @ T = 25°C
Derate above 25°C
P
D
270
1.54
Watts
W/°C
C
Storage Temperature Range
Operating Junction Temperature
THERMAL CHARACTERISTICS
T
–65 to +150
200
°C
°C
stg
T
J
Characteristic
Thermal Resistance, Junction to Case
Symbol
Max
Unit
R
0.65
°C/W
θJC
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
C
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain–Source Breakdown Voltage
(V = 0, I = 50 mA)
V
65
—
—
—
—
—
—
Vdc
mAdc
(BR)DSS
GS
Zero Gate Voltage Drain Current
(V = 28 V, V = 0)
D
I
2.5
1.0
DSS
DS
Gate–Body Leakage Current
(V = 20 V, V = 0)
GS
I
µAdc
GSS
GS
DS
(continued)
Handling and Packaging — MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and
packaging MOS devices should be observed.
REV 8
Motorola, Inc. 1997
ELECTRICAL CHARACTERISTICS — continued (T = 25°C unless otherwise noted)
C
Characteristic
Symbol
Min
Typ
Max
Unit
ON CHARACTERISTICS
Gate Threshold Voltage (V
DS
= 10 V, I = 100 mA)
V
1.0
0.1
2.0
3.0
0.9
3.0
6.0
1.5
—
Vdc
Vdc
D
GS(th)
V
DS(on)
Drain–Source On–Voltage (V
= 10 V, I = 5.0 A)
GS
D
Forward Transconductance (V
= 10 V, I = 2.5 A)
g
fs
mhos
DS
D
DYNAMIC CHARACTERISTICS
Input Capacitance (V
= 28 V, V
= 0, f = 1.0 MHz)
C
—
—
—
180
200
20
—
—
—
pF
pF
pF
DS
GS
iss
Output Capacitance (V
DS
Reverse Transfer Capacitance (V
= 28 V, V
= 0, f = 1.0 MHz)
C
oss
GS
= 28 V, V
= 0, f = 1.0 MHz)
C
rss
DS
GS
FUNCTIONAL CHARACTERISTICS — MRF175LV (Figure 1)
Common Source Power Gain
G
12
55
14
65
—
—
dB
%
ps
(V
DD
= 28 Vdc, P
= 100 W, f = 225 MHz, I
= 100 W, f = 225 MHz, I
= 100 W, f = 225 MHz, I
= 100 mA)
= 100 mA)
= 100 mA,
out
DQ
DQ
DQ
Drain Efficiency
(V = 28 Vdc, P
η
DD
out
Electrical Ruggedness
(V = 28 Vdc, P
ψ
No Degradation in Output Power
DD
out
VSWR 30:1 at all Phase Angles)
FUNCTIONAL CHARACTERISTICS — MRF175LU (Figure 2)
Common Source Power Gain
G
8.0
50
10
55
—
—
dB
%
ps
(V
DD
= 28 Vdc, P
= 100 W, f = 400 MHz, I
= 100 W, f = 400 MHz, I
= 100 W, f = 400 MHz, I
= 100 mA)
= 100 mA)
= 100 mA,
out
DQ
DQ
DQ
Drain Efficiency
(V = 28 Vdc, P
η
DD
out
Electrical Ruggedness
(V = 28 Vdc, P
ψ
No Degradation in Output Power
DD
out
VSWR 30:1 at all Phase Angles)
RFC1
R1
+28 Vdc
BIAS
C4
C5
C10
C6
C11
C7
L4
R2
C1
L2
L3
C9
RF INPUT
RF OUTPUT
L1
C2
C3
C8
D.U.T.
C1, C2, C8 — Arco 463 or Equivalent
C3, C7 — 25 pF Unelco Cap
C4 — 1000 pF Chip Cap
C5 — 0.01 µF Chip Cap
C6 — 250 pF Unelco Cap
C9 — Arco 462 or Equivalent
C10 — 1000 pF ATC Chip Cap
C11 — 10 µF 100 V Electrolytic
L1 — Hairpin Inductor #18 Wire
L3 — Hairpin Inductor #16 Wire
0.45″
0.32″
0.2″
0.15″
L2 — Stripline Inductor 0.200″ x 0.500″
L4 — 2 Turns #16 Wire 5/16″ ID
RFC1 — VK200–4B
R1 — 1.0 k 1/4 W Resistor
R2 — 100 Ω Resistor
Figure 1. 225 MHz Test Circuit
MRF175LU MRF175LV
2
MOTOROLA RF DEVICE DATA
L3
C11
C12
C13
C14
+ v
BIAS
C9
.01
GND
OUT
R2
f
L2
C8
R1
Z2
Z3
C1
L1
IN
Z1
C2
C3
C4
C5
C6
C7
D.U.T.
C1, C8 — 270 pF ATC Chip Cap
C2, C4, C6, C7 — 1.0–20 pF Trimmer Cap
C3 — 15 pF Mini Unelco Cap
L1 — Hairpin Inductor #18 Wire
R1 — 10 k 1/4 W Resistor
R2 — 1 k 1/4 W Resistor
R3 — 1.5 k 1/4 W Resistor
C5 — 33 pF Mini Unelco Cap
Z1 — Microstrip Line 0.950″ x 0.250″
Z2 — Microstrip Line 1″ x 0.250″
Z3 — Microstrip Line 0.550″ x 0.250″
C9, C12 — 0.1 µF Ceramic Cap
C11, C14 — 680 pF Feed Thru Cap
C13 — 50 µF Tantalum Cap
0.25
″
0.4″
Board Material — 0.062″ Teflon —
L2 — 12 Turns #18 Wire 0.450″ ID
L3 — Ferroxcube VK200 20/4B
fiberglass, ε = 2.56, 1 oz. copper
r
clad both sides
Figure 2. 400 MHz Test Circuit
TYPICAL CHARACTERISTICS
4000
100
3000
2000
1000
0
V
= 20 V
10 V
DS
10
T
= 25°C
C
0
0
2
4
6
8
10
12
14
16
18
20
0
10
I , DRAIN CURRENT (AMPS)
D
100
I
, DRAIN CURRENT (AMPS)
D
Figure 3. Common Source Unity Current Gain
Frequency versus Drain Current
Figure 4. DC Safe Operating Area
MOTOROLA RF DEVICE DATA
MRF175LU MRF175LV
3
TYPICAL CHARACTERISTICS
1.2
5
V
= 28 V
DD
4
3
2
V
= 10 V
DS
1.1
1
I
= 4 A
D
3 A
2 A
TYPICAL DEVICE SHOWN, V
= 3 V
GS(th)
0.9
1
0
100 mA
0.8
–25
1
2
3
4
5
6
0
25
50
75
100
125
150
175
V
, GATE–SOURCE VOLTAGE (VOLTS)
T
, CASE TEMPERATURE (°C)
GS
C
Figure 5. Drain Current versus Gate Voltage
(Transfer Characteristics)
Figure 6. Gate–Source Voltage versus
Case Temperature
1000
500
V
= 0 V
GS
f = 1 MHz
C
C
oss
200
100
iss
50
C
rss
20
0
0
5
10
15
20
25
V
, DRAIN–SOURCE VOLTAGE (VOLTS)
DS
Figure 7. Capacitance versus Drain–Source Voltage
MRF175LU MRF175LV
4
MOTOROLA RF DEVICE DATA
TYPICAL CHARACTERISTICS
MRF175LV
MRF175LU
160
140
120
100
80
160
140
120
P
= 6 W
P
= 14 W
in
in
100
80
60
40
20
4 W
2 W
10 W
6 W
60
40
f = 225 MHz
I
= 100 mA
DQ
f = 400 MHz
20
I
= 100 mA
DQ
12
16
20
24
28
12
14
16
18
20
22
24
26
28
V
, SUPPLY VOLTAGE (VOLTS)
SUPPLY VOLTAGE (VOLTS)
DD
Figure 8. Output Power versus Supply Voltage
Figure 9. Output Power versus Supply Voltage
30
25
20
15
160
140
120
100
80
f = 225 MHz
400 MHz
60
40
V
I
= 28 V
= 100 mA
= 100 W
DS
DQ
10
5
V
I
= 28 V
= 100 mA
DD
DQ
20
P
out
0
5
10
20
50
100
200
500
0
2
4
6
8
10
12
14
16
18
20
f, FREQUENCY (MHz)
P
, INPUT POWER (WATTS)
in
Figure 10. Power Gain versus Frequency
Figure 11. Output Power versus Input Power
MOTOROLA RF DEVICE DATA
MRF175LU MRF175LV
5
INPUT AND OUTPUT IMPEDANCE
V
= 28 V, I
(P
out
= 100 mA,
DD
DQ
= 100 W)
f
Z
Z
*
in
Ohms
OL
Ohms
MHz
30
2.80 – j4.00 3.65 – j1.30
1.40 – j2.80 2.60 – j1.50
1.10 – j1.90 2.10 – j1.40
1.00 – j1.25 1.80 – j1.20
0.95 – j0.65 1.50 – j0.80
0.95 + j0.20 1.35 – j0.30
1.05 + j1.15 1.45 + j0.55
300
225
100
150
175
225
300
400
f = 400 MHz
f = 400 MHz
175
150
Z
300
175
225
150
100
in
Z
*
OL
100
Z
* = CONJUGATE OF THE OPTIMUM
OL
LOAD IMPEDANCE INTO WHICH THE
30
30
DEVICE OUTPUT OPERATES AT A GIVEN
OUTPUT POWER, VOLTAGE AND FREQUENCY.
Z
= 10 Ω
o
RF POWER MOSFET CONSIDERATIONS
MOSFET CAPACITANCES
The physical structure of a MOSFET results in capacitors
between the terminals. The metal oxide gate structure deter-
mines the capacitors from gate–to–drain (C ), and gate–to–
source (C ). The PN junction formed during the fabrication
gs
of the FET results in a junction capacitance from drain–to–
rent level. This is equivalent to f for bipolar transistors.
Since this test is performed at a fast sweep speed, heating of
the device does not occur. Thus, in normal use, the higher
temperatures may degrade these characteristics to some ex-
tent.
T
gd
source (C ).
DRAIN CHARACTERISTICS
One figure of merit for a FET is its static resistance in the
full–on condition. This on–resistance, V
linear region of the output characteristic and is specified un-
der specific test conditions for gate–source voltage and drain
ds
These capacitances are characterized as input (C ), out-
iss
put (C
oss
) and reverse transfer (C ) capacitances on data
rss
, occurs in the
DS(on)
sheets. The relationships between the inter–terminal capaci-
tances and those given on data sheets are shown below. The
C
can be specified in two ways:
current. For MOSFETs, V
has a positive temperature
iss
DS(on)
coefficient and constitutes an important design consideration
at high temperatures, because it contributes to the power
dissipation within the device.
1. Drain shorted to source and positive voltage at the gate.
2. Positivevoltageofthedraininrespecttosourceandzero
volts at the gate. In the latter case the numbers are lower.
However, neither method represents the actual operat-
ing conditions in RF applications.
GATE CHARACTERISTICS
The gate of the FET is a polysilicon material, and is electri-
cally isolated from the source by a layer of oxide. The input
DRAIN
9
resistance is very high — on the order of 10 ohms — result-
C
gd
ing in a leakage current of a few nanoamperes.
Gate control is achieved by applying a positive voltage
slightly in excess of the gate–to–source threshold voltage,
GATE
C
C
C
= C + C
gd
iss
gs
ds
C
= C + C
ds
oss
rss
gd
gd
= C
V
.
GS(th)
Gate Voltage Rating — Never exceed the gate voltage
rating. Exceeding the rated V can result in permanent
C
gs
SOURCE
GS
damage to the oxide layer in the gate region.
LINEARITY AND GAIN CHARACTERISTICS
Gate Termination — The gates of these devices are
essentially capacitors. Circuits that leave the gate open–cir-
cuited or floating should be avoided. These conditions can
result in turn–on of the devices due to voltage build–up on
the input capacitor due to leakage currents or pickup.
In addition to the typical IMD and power gain data pres-
ented, Figure 3 may give the designer additional information
on the capabilities of this device. The graph represents the
small signal unity current gain frequency at a given drain cur-
MRF175LU MRF175LV
6
MOTOROLA RF DEVICE DATA
Gate Protection — These devices do not have an internal
monolithic zener diode from gate–to–source. If gate protec-
tion is required, an external zener diode is recommended.
Using a resistor to keep the gate–to–source impedance
low also helps damp transients and serves another important
function. Voltage transients on the drain can be coupled to
the gate through the parasitic gate–drain capacitance. If the
gate–to–source impedance and the rate of voltage change
on the drain are both high, then the signal coupled to the gate
may be large enough to exceed the gate–threshold voltage
and turn the device on.
Motorola Application Note AN211A, FETs in Theory and
Practice, is suggested reading for those not familiar with the
construction and characteristics of FETs.
The major advantages of RF power FETs include high
gain, low noise, simple bias systems, relative immunity from
thermal runaway, and the ability to withstand severely mis-
matched loads without suffering damage. Power output can
be varied over a wide range with a low power dc control sig-
nal.
DC BIAS
The MRF175L is an enhancement mode FET and, there-
fore, does not conduct when drain voltage is applied. Drain
current flows when a positive voltage is applied to the gate.
RF power FETs require forward bias for optimum perfor-
HANDLING CONSIDERATIONS
When shipping, the devices should be transported only in
antistatic bags or conductive foam. Upon removal from the
packaging, careful handling procedures should be adhered
to. Those handling the devices should wear grounding straps
and devices not in the antistatic packaging should be kept in
metal tote bins. MOSFETs should be handled by the case
and not by the leads, and when testing the device, all leads
should make good electrical contact before voltage is ap-
plied. As a final note, when placing the FET into the system it
is designed for, soldering should be done with a grounded
iron.
mance. The value of quiescent drain current (I
) is not criti-
DQ
cal for many applications. The MRF175L was characterized
at I = 100 mA, each side, which is the suggested minimum
DQ
value of I
. For special applications such as linear amplifi-
DQ
may have to be selected to optimize the critical
cation, I
DQ
parameters.
The gate is a dc open circuit and draws no current. There-
fore, the gate bias circuit may be just a simple resistive divid-
er network. Some applications may require a more elaborate
bias sytem.
DESIGN CONSIDERATIONS
GAIN CONTROL
The MRF175L is a RF power N–channel enhancement
mode field–effect transistor (FETs) designed for HF, VHF and
UHF power amplifier applications. Motorola FETs feature a
vertical structure with a planar design.
Power output of the MRF175L may be controlled from its
rated value down to zero (negative gain) by varying the dc
gate voltage. This feature facilitates the design of manual
gain control, AGC/ALC and modulation systems.
MOTOROLA RF DEVICE DATA
MRF175LU MRF175LV
7
PACKAGE DIMENSIONS
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
–A–
N
Q 2 PL
M
M
M
0.13 (0.005)
T
A
B
D
INCHES
MILLIMETERS
DIM
A
B
C
D
E
MIN
MAX
0.985
0.410
0.290
0.210
0.115
0.235
MIN
24.51
9.91
6.73
4.83
2.42
5.47
18.42 BSC
3.94
0.10
MAX
25.02
10.41
7.36
5.33
2.92
0.965
0.390
0.250
0.190
0.095
0.215
K
–B–
K
2
1
3
P
F
5.96
G
H
J
K
L
N
P
Q
0.725 BSC
0.155
0.004
0.195
0.740
0.415
0.390
0.120
0.175
0.006
0.205
0.770
0.425
0.400
0.135
4.44
0.15
5.21
19.55
10.80
10.16
3.42
4
4.95
18.80
10.54
9.91
F
G
3.05
STYLE 1:
PIN 1. EMITTER
J
N
2. COLLECTOR
3. EMITTER
4. BASE
N
C
H
SEATING
PLANE
–T–
CASE 333–04
ISSUE E
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
andspecificallydisclaimsanyandallliability, includingwithoutlimitationconsequentialorincidentaldamages. “Typical” parameters can and do vary in different
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MRF175LU/D
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